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114 lines
6.4 KiB
Plaintext
114 lines
6.4 KiB
Plaintext
; 6502bench SNES SA-1 registers symbol
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; Reference:
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; Super Nintendo Entertainment System Development Manual
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; Registers | Super Famicom Development Wiki
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; https://wiki.superfamicom.org/sa-1-registers
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; Copyright 2022 absindx
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; Follow the original license. (Apache 2.0)
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*SYNOPSIS Super NES SA-1 registers
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; SA-1 internal registers
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; bank = $00-$3F, $80-$BF
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; %?0??????xxxxxxxxxxxxxxxx
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; %010000000000000000000000 CompareMask (0/1)
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; %000000000000000000000000 CompareValue (1)
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; %000000001111111111111111 AddressMask (x)
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*MULTI_MASK %010000000000000000000000 %000000000000000000000000 %000000001111111111111111
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; Write registers $xx2200
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SA1_CCNT > $2200 ;W IRrN mmmm SA-1 CPU control
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SA1_SIE > $2201 ;W I-C- ---- Super NES CPU int enable
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SA1_SIC > $2202 ;W I-C- ---- Super NES CPU int clear
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SA1_CRVL > $2203 ;W aaaa aaaa SA-1 CPU reset vector (Low)
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SA1_CRVH > $2204 ;W aaaa aaaa SA-1 CPU reset vector (High)
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SA1_CNVL > $2205 ;W aaaa aaaa SA-1 CPU NMI vector (Low)
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SA1_CNVH > $2206 ;W aaaa aaaa SA-1 CPU NMI vector (High)
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SA1_CIVL > $2207 ;W aaaa aaaa SA-1 CPU IRQ vector (Low)
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SA1_CIVH > $2208 ;W aaaa aaaa SA-1 CPU IRQ vector (High)
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SA1_SCNT > $2209 ;W IS-N mmmm Super NES CPU control
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SA1_CIE > $220A ;W ITDN ---- SA-1 CPU int enable
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SA1_CIC > $220B ;W ITDN ---- SA-1 CPU int clear
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SA1_SNVL > $220C ;W aaaa aaaa Super NES CPU NMI vector (Low)
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SA1_SNVH > $220D ;W aaaa aaaa Super NES CPU NMI vector (High)
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SA1_SIVL > $220E ;W aaaa aaaa Super NES CPU IRQ vector (Low)
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SA1_SIVH > $220F ;W aaaa aaaa Super NES CPU IRQ vector (High)
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SA1_TMC > $2210 ;W T--- --VH H/V timer control
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SA1_CTR > $2211 ;W ---- ---- SA-1 CPU timer restart
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SA1_HCNTL > $2212 ;W HHHH HHHH Set H-Count (Low)
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SA1_HCNTH > $2213 ;W ---- ---H Set H-Count (High)
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SA1_VCNTL > $2214 ;W VVVV VVVV Set V-Count (Low)
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SA1_VCNTH > $2215 ;W ---- ---V Set V-Count (High)
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SA1_CXB > $2220 ;W B--- -AAA Set Super MMC bank C
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SA1_DXB > $2221 ;W B--- -AAA Set Super MMC bank D
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SA1_EXB > $2222 ;W B--- -AAA Set Super MMC bank E
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SA1_FXB > $2223 ;W B--- -AAA Set Super MMC bank F
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SA1_BMAPS > $2224 ;W ---B BBBB Super NES CPU BW-RAM address mapping
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SA1_BMAP > $2225 ;W SBBB BBBB SA-1 CPU BW-RAM address mapping
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SA1_SBWE > $2226 ;W P--- ---- Super NES CPU BW-RAM write enable
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SA1_CBWE > $2227 ;W P--- ---- SA-1 CPU BW-RAM write enable
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SA1_BWPA > $2228 ;W ---- AAAA BW-RAM Write-Protected area
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SA1_SIWP > $2229 ;W 7654 3210 Super NES I-RAM wirte protection
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SA1_CIWP > $222A ;W 7654 3210 SA-1 I-RAM wirte protection
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SA1_DCNT > $2230 ;W CPMT -DSS DMA control
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SA1_CDMA > $2231 ;W E--S SSCC Character conversion DMA parameters
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SA1_SDAL > $2232 ;W AAAA AAAA DMA source device start address (Low)
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SA1_SDAH > $2233 ;W AAAA AAAA DMA source device start address (Middle)
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SA1_SDAB > $2234 ;W AAAA AAAA DMA source device start address (High)
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SA1_DDAL > $2235 ;W AAAA AAAA DMA destination start address (Low)
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SA1_DDAH > $2236 ;W AAAA AAAA DMA destination start address (Middle)
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SA1_DDAB > $2237 ;W AAAA AAAA DMA destination start address (High)
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SA1_DTCL > $2238 ;W CCCC CCCC DMA terminal counter (Low)
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SA1_DTCH > $2239 ;W CCCC CCCC DMA terminal counter (High)
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SA1_BBF > $223F ;W C--- ---- BW-RAM bit map format
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SA1_BRF0 > $2240 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF1 > $2241 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF2 > $2242 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF3 > $2243 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF4 > $2244 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF5 > $2245 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF6 > $2246 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF7 > $2247 ;W BBBB BBBB Bit map register file (Buffer 1)
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SA1_BRF8 > $2248 ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRF9 > $2249 ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRFA > $224A ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRFB > $224B ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRFC > $224C ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRFD > $224D ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRFE > $224E ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_BRFF > $224F ;W BBBB BBBB Bit map register file (Buffer 2)
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SA1_MCNT > $2250 ;W ---- --OO Arithmetic control
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SA1_MAL > $2251 ;W NNNN NNNN Arithmetic parameters: Multiplicand / Dividend (Low)
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SA1_MAH > $2252 ;W NNNN NNNN Arithmetic parameters: Multiplicand / Dividend (High)
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SA1_MBL > $2253 ;W NNNN NNNN Arithmetic parameters: Multiplier / Divisor (Low)
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SA1_MBH > $2254 ;W NNNN NNNN Arithmetic parameters: Multiplier / Divisor (High)
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SA1_VBD > $2258 ;W H--- VVVV Variable-Length bit processing
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SA1_VDAL > $2259 ;W AAAA AAAA Variable-Length bit game pak ROM start address (Low)
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SA1_VDAH > $225A ;W AAAA AAAA Variable-Length bit game pak ROM start address (Middle)
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SA1_VDAB > $225B ;W AAAA AAAA Variable-Length bit game pak ROM start address (High)
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; Read registers $xx2300
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SA1_SFR < $2300 ;R IVDN mmmm Super NES CPU flag read
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SA1_CFR < $2301 ;R ITDN mmmm SA-1 CPU flag read
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SA1_HCRL < $2302 ;R HHHH HHHH H-Count read (Low)
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SA1_HCRH < $2303 ;R ---- ---H H-Count read (High)
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SA1_VCRL < $2304 ;R VVVV VVVV V-Count read (Low)
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SA1_VCRH < $2305 ;R ---- ---V V-Count read (High)
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SA1_MR1 < $2306 ;R DDDD DDDD Arithmetic result (product/quotient/cumulative sum)
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SA1_MR2 < $2307 ;R DDDD DDDD Arithmetic result (product/quotient/cumulative sum)
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SA1_MR3 < $2308 ;R DDDD DDDD Arithmetic result (product/remainder/cumulative sum)
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SA1_MR4 < $2309 ;R DDDD DDDD Arithmetic result (product/remainder/cumulative sum)
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SA1_MR5 < $230A ;R DDDD DDDD Arithmetic result (cumulative sum)
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SA1_OF < $230B ;R O--- ---- Arithmetic overflow flag
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SA1_VDPL < $230C ;R DDDD DDDD Variable-Length data read port (Low)
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SA1_VDPH < $230D ;R DDDD DDDD Variable-Length data read port (High)
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SA1_VC < $230E ;R VVVV VVVV Version code register
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