mirror of
https://github.com/fadden/6502bench.git
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5f472b60cf
Split ".org" into ".arstart" and ".arend" (address range start/end). Address range ends are now shown in the code list view, and the pseudo-op can be edited in app settings. Address range starts are now shown after notes and long comments, rather than before, which brings the on-screen display in sync with generated code. Reworked the address range editor UI to include the new features. The implementation is fully broken. More changes to the AddressMap API, putting the resolved region length into a separate ActualLength field. Added FindRegion(). Renamed some things. Code generation changed slightly: the blank line before a region-end line now comes after it, and ACME's "} ;!pseudopc" is now just "}". This required minor updates to some of the regression test results.
303 lines
6.1 KiB
ArmAsm
303 lines
6.1 KiB
ArmAsm
!cpu 6510
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* = $1000
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jsr L1035
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jsr L1038
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jsr L1059
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jsr L107D
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jsr L109E
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jsr L10BD
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jsr L10C0
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jsr L10E1
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jsr L1100
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jsr L1103
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jsr L1116
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jsr L1124
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jsr L1169
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jsr L11AE
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jsr L11F3
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jsr L1238
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nop
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nop
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nop
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brk
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!byte $80
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L1035 ora (L0080,x)
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jam
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L1038 slo (L0080,x)
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!byte $04,$80
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ora+1 L0080
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asl+1 L0080
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slo+1 L0080
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php
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ora #$80
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asl
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anc #$80
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!byte $0c,$86,$00
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ora+2 L0086
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asl+2 L0086
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slo+2 L0086
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bpl @L1056
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@L1056 ora (L0080),y
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!byte $12
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L1059 slo (L0080),y
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!byte $14,$80
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ora+1 L0080,x
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asl+1 L0080,x
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slo+1 L0080,x
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clc
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ora L0086,y
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!byte $1a
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slo L0086,y
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!byte $1c,$86,$00
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ora+2 L0086,x
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asl+2 L0086,x
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slo+2 L0086,x
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jsr L0086
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and (L0080,x)
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!byte $22
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L107D rla (L0080,x)
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bit+1 L0080
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and+1 L0080
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rol+1 L0080
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rla+1 L0080
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plp
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and #$80
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rol
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!byte $2b,$80
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bit+2 L0086
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and+2 L0086
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rol+2 L0086
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rla+2 L0086
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bmi @L109B
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@L109B and (L0080),y
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!byte $32
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L109E rla (L0080),y
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!byte $34,$80
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and+1 L0080,x
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rol+1 L0080,x
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rla+1 L0080,x
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sec
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and L0086,y
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!byte $3a
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rla L0086,y
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!byte $3c,$86,$00
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and+2 L0086,x
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rol+2 L0086,x
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rla+2 L0086,x
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rti
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L10BD eor (L0080,x)
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!byte $42
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L10C0 sre (L0080,x)
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!byte $44,$80
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eor+1 L0080
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lsr+1 L0080
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sre+1 L0080
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pha
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eor #$80
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lsr
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asr #$80
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jmp @L10D3
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@L10D3 eor+2 L0086
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lsr+2 L0086
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sre+2 L0086
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bvc @L10DE
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@L10DE eor (L0080),y
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!byte $52
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L10E1 sre (L0080),y
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!byte $54,$80
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eor+1 L0080,x
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lsr+1 L0080,x
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sre+1 L0080,x
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cli
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eor L0086,y
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!byte $5a
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sre L0086,y
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!byte $5c,$86,$00
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eor+2 L0086,x
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lsr+2 L0086,x
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sre+2 L0086,x
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rts
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L1100 adc (L0080,x)
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!byte $62
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L1103 rra (L0080,x)
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!byte $64,$80
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adc+1 L0080
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ror+1 L0080
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rra+1 L0080
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pla
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adc #$80
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ror
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arr #$80
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jmp (L0086)
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L1116 adc+2 L0086
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ror+2 L0086
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rra+2 L0086
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bvs @L1121
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@L1121 adc (L0080),y
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!byte $72
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L1124 rra (L0080),y
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!byte $74,$80
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adc+1 L0080,x
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ror+1 L0080,x
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rra+1 L0080,x
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sei
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adc L0086,y
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!byte $7a
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rra L0086,y
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!byte $7c,$86,$00
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adc+2 L0086,x
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ror+2 L0086,x
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rra+2 L0086,x
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!byte $80,$80
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sta (L0080,x)
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!byte $82,$80
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sax (L0080,x)
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sty+1 L0080
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sta+1 L0080
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stx+1 L0080
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sax+1 L0080
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dey
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!byte $89,$80
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txa
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ane #$80
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sty+2 L0086
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sta+2 L0086
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stx+2 L0086
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sax+2 L0086
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bcc @L1166
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@L1166 sta (L0080),y
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!byte $92
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L1169 sha (L0080),y
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sty+1 L0080,x
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sta+1 L0080,x
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stx+1 L0080,y
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sax+1 L0080,y
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tya
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sta L0086,y
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txs
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tas L0086,y
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shy+2 L0086,x
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sta+2 L0086,x
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shx L0086,y
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sha L0086,y
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ldy #$80
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lda (L0080,x)
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ldx #$80
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lax (L0080,x)
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ldy+1 L0080
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lda+1 L0080
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ldx+1 L0080
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lax+1 L0080
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tay
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lda #$80
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tax
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!byte $ab,$80
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ldy+2 L0086
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lda+2 L0086
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ldx+2 L0086
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lax+2 L0086
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bcs @L11AB
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@L11AB lda (L0080),y
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!byte $b2
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L11AE lax (L0080),y
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ldy+1 L0080,x
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lda+1 L0080,x
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ldx+1 L0080,y
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lax+1 L0080,y
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clv
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lda L0086,y
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tsx
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las L0086,y
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ldy+2 L0086,x
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lda+2 L0086,x
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ldx+2 L0086,y
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lax+2 L0086,y
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cpy #$80
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cmp (L0080,x)
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!byte $c2,$80
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dcp (L0080,x)
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cpy+1 L0080
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cmp+1 L0080
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dec+1 L0080
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dcp+1 L0080
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iny
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cmp #$80
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dex
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sbx #$80
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cpy+2 L0086
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cmp+2 L0086
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dec+2 L0086
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dcp+2 L0086
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bne @L11F0
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@L11F0 cmp (L0080),y
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!byte $d2
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L11F3 dcp (L0080),y
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!byte $d4,$80
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cmp+1 L0080,x
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dec+1 L0080,x
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dcp+1 L0080,x
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cld
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cmp L0086,y
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!byte $da
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dcp L0086,y
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!byte $dc,$86,$00
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cmp+2 L0086,x
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dec+2 L0086,x
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dcp+2 L0086,x
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cpx #$80
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sbc (L0080,x)
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!byte $e2,$80
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isc (L0080,x)
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cpx+1 L0080
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sbc+1 L0080
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inc+1 L0080
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isc+1 L0080
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inx
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sbc #$80
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nop
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!byte $eb,$80
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cpx+2 L0086
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sbc+2 L0086
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inc+2 L0086
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isc+2 L0086
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beq @L1235
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@L1235 sbc (L0080),y
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!byte $f2
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L1238 isc (L0080),y
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!byte $f4,$80
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sbc+1 L0080,x
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inc+1 L0080,x
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isc+1 L0080,x
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sed
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sbc L0086,y
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!byte $fa
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isc L0086,y
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!byte $fc,$86,$00
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sbc+2 L0086,x
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inc+2 L0086,x
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isc+2 L0086,x
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!pseudopc $0080 {
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L0080 bit+1 @L0082
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@L0082 bit+1 @L0082
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bit+1 @L0082
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L0086 bit+2 L0086
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}
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