mirror of
https://github.com/fadden/6502bench.git
synced 2024-12-01 22:50:35 +00:00
387b50d827
Added support for "relative" address regions to the Merlin 32 and cc65 code generators. These generate "flat" address directives, and so were a little more complicated. Suppressed generation of relative operands for non-addressable regions. Also, tweaked the 20250-nested-regions test to include a negative relative region offset.
98 lines
1.6 KiB
ArmAsm
98 lines
1.6 KiB
ArmAsm
.cpu "6502"
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* = $0000
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.word $3000 ;load address
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.logical $1000
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.logical *+$1000
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.logical *+$1000
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L3000 bit L3000
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_L3003 lda _L3003
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and _LE003
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jmp _L200C
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.here
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_L200C bit _L200C
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jmp _L1012
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.here
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_L1012 bit _L1012
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jsr _L4000
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.logical $0000
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.byte $00
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.null "Null-term PETSCII string"
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.byte $80
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.word _L3003
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.word _LE003
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.byte $80
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.here
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.logical $4000
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_L4000 bit _L4000
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bit _L5000
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bit _L500F
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bit _L500F
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nop
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jmp _L4020
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.logical $5000
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_L5000 bit _L5000
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bit _L4000
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nop
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nop
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_L5008 bit _L5008
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bit _L5017
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nop
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_L500F rts
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.here
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_L4020 bit _L4020
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bit _L500F
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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jmp _L4040
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.logical $5008
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_L5008_0 bit _L5008_0
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bit _L5000
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nop
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_L500F_0 bit _L500F_0
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nop
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nop
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nop
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nop
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nop
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_L5017 rts
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.here
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_L4040 bit _L4040
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bit _L5017
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nop
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jmp _LE000
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.here
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.logical *+$cf7e
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_LE000 bit _L200C
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_LE003 nop
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jmp _LD000
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.logical *-$1007
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_LD000 bit _LD000
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jmp _LF000
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.logical $f000
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_LF000 bit _LF000
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lda _L3003
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and _LE003
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nop
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rts
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.here
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.here
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.here
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.here
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