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The PPU registers are mirrored from $2000-3FFF.
54 lines
2.0 KiB
Plaintext
54 lines
2.0 KiB
Plaintext
; Copyright 2018 faddenSoft. All Rights Reserved.
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; See the LICENSE.txt file for distribution terms (Apache 2.0).
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;
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; Adapted from various online references, notably https://wiki.nesdev.com/
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*SYNOPSIS Nintendo Entertainment System registers
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; PPU registers ($2000-2007, repeating every 8 bytes to $3FFF)
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; (see https://wiki.nesdev.com/w/index.php/PPU_registers)
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;
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; pattern: 001? ???? ???? ?xxx
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*MULTI_MASK %0010000000000000 %0010000000000000 %0000000000000111
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PPUCTRL @ $2000 ;W VPHB SINN various
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PPUMASK @ $2001 ;W BGRs bMmG various
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PPUSTATUS @ $2002 ;R VSO- ---- various; read resets $2005/2006
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OAMADDR @ $2003 ;W OAM read/write address
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OAMDATA @ $2004 ;RW OAM data read/write
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PPUSCROLL @ $2005 ;WW fine scroll position (two writes: X,Y)
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PPUADDR @ $2006 ;WW PPU read/write address (two writes: MSB, LSB)
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PPUDATA @ $2007 ;RW PPU data read/write
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*MULTI_MASK
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; APU and I/O registers
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; (see https://wiki.nesdev.com/w/index.php/2A03)
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SQ1_VOL @ $4000 ;DDLC VVVV
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SQ1_SWEEP @ $4001 ;EPPP NSSS
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SQ1_LO @ $4002 ;TTTT TTTT
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SQ1_HI @ $4003 ;LLLL LTTT
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SQ2_VOL @ $4004 ;DDLC VVVV
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SQ2_SWEEP @ $4005 ;EPPP NSSS
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SQ2_LO @ $4006 ;TTTT TTTT
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SQ2_HI @ $4007 ;LLLL LTTT
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TRI_LINEAR @ $4008 ;CRRR RRRR
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TRI_UNU @ $4009
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TRI_LO @ $400a ;TTTT TTTT
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TRI_HI @ $400b ;LLLL LTTT
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NOISE_VOL @ $400c ;--LC VVVV
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NOISE_UNU @ $400d
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NOISE_LO @ $400e ;L--- PPPP
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NOISE_HI @ $400f ;LLLL L---
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DMC_FREQ @ $4010 ;IL-- RRRR
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DMC_RAW @ $4011 ;-DDD DDDD
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DMC_START @ $4012 ;AAAA AAAA
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DMC_LEN @ $4013 ;LLLL LLLL
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OAMDMA @ $4014 ;AAAA AAAA OAM DMA high address
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SND_CHN @ $4015 ;W:---D NT21 R:IF-D NT21
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JOY1 @ $4016 ;joystick 1 data (R) and joystick strobe (W)
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JOY2 @ $4017 ;joystick 2 data (R) and frame counter (W)
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; $4018-401F normally disabled, but used in test mode
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; (see http://wiki.nesdev.com/w/index.php/CPU_Test_Mode)
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