mirror of
https://github.com/fadden/6502bench.git
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3ff0fbae34
The regression tests were written with the assumption that all cross assemblers would support 6502, 65C02, and 65816 code. There are a few that support 65816 partially (e.g. ACME) or not at all. To best support these, we need to split some of the tests into pieces, so that important 6502 tests aren't skipped simply because parts of the test also exercise 65816 code. The first step is to change the regression test naming scheme. The old system used 1xxx for tests without project files, and 2xxx for tests with project files. The new system uses 1xxxN / 2xxxN, where N indicates the CPU type: 0 for 6502, 1 for 65C02, and 2 for 65816. For the 1xxxN tests the new value determines which CPU is used, which allows us to move the "allops" 6502/65C02 tests into the no-project category. For 2xxxN it just allows the 6502 and 65816 versions to have the same base name and number. This change updates the first batch of tests. It involves minor changes to the test harness and a whole bunch of renaming.
286 lines
4.3 KiB
ArmAsm
286 lines
4.3 KiB
ArmAsm
!cpu 65816
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* = $1000
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!as
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!rs
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clc
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xce
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sep #$ff
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clv
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cld
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cli
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clc
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lda #$80
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lda #$01
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sed
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sei
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sec
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lda #$ff
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adc #$00
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sep #$ff
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rep #$80
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rep #$40
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rep #$20
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!al
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rep #$10
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!rl
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rep #$08
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rep #$04
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rep #$02
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rep #$01
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sep #$00
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sep #$ff
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!as
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!rs
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rep #$00
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rep #$ff
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!al
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!rl
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lda #$feed
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sec
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xce
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!as
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!rs
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lda #$ff
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rep #$30
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lda #$ff
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clc
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xce
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lda #$ff
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rep #$20
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!al
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sep #$10
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lda #$0000
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ldx #$01
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ldy #$02
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sep #$20
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!as
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rep #$10
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!rl
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lda #$01
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ldx #$0000
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ldy #$0000
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sep #$30
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!rs
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lda #$00
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pha
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plp
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rep #$80
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bpl L105F
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!byte $00
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!byte $00
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L105F sep #$80
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bpl @L1065
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bmi @L1067
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@L1065 !byte $00
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!byte $00
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@L1067 rep #$40
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bvc @L106D
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!byte $00
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!byte $00
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@L106D sep #$40
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bvs @L1073
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!byte $00
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!byte $00
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@L1073 rep #$01
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bcc @L1079
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!byte $00
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!byte $00
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@L1079 sep #$01
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bcs @L107F
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!byte $00
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!byte $00
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@L107F rep #$02
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bne @L1085
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!byte $00
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!byte $00
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@L1085 sep #$02
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beq @L108B
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!byte $00
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!byte $00
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@L108B sep #$ff
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lda #$01
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bne @L1093
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!byte $00
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!byte $db
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@L1093 lda #$00
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beq @L1099
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!byte $00
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!byte $db
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@L1099 bpl @L109D
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!byte $00
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!byte $db
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@L109D lda #$80
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bmi @L10A3
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!byte $00
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!byte $db
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@L10A3 lda #$ff
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and #$00
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beq @L10AB
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!byte $00
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!byte $db
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@L10AB lda #$00
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ldx #$80
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and #$ff
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beq @L10B5
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bne @L10B5
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@L10B5 lda #$ff
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ldx #$00
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and #$7f
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beq @L10BF
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bne @L10BF
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@L10BF bpl @L10C3
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!byte $00
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!byte $db
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@L10C3 lda #$ff
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and #$80
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bmi @L10CB
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brk
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!byte $db
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@L10CB lda #$00
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ldx #$80
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bne @L10D3
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!byte $00
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!byte $db
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@L10D3 ora #$00
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beq @L10D9
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bne @L10D9
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@L10D9 ora #$01
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bne @L10DF
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!byte $00
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!byte $db
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@L10DF lda #$00
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ldx #$80
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bmi @L10E7
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!byte $00
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!byte $db
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@L10E7 ora #$7f
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bpl @L10EF
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bmi @L10EF
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!byte $00
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!byte $db
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@L10EF ora #$80
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bmi @L10F5
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!byte $00
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!byte $db
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@L10F5 lda @L10F5
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sec
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ror
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bmi @L10FE
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!byte $00
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!byte $dc
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@L10FE clc
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ror
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bpl @L1104
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!byte $00
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!byte $dc
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@L1104 lda #$00
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sec
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rol
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bne @L110C
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!byte $00
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!byte $dc
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@L110C lda #$ff
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lsr
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bpl @L1113
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!byte $00
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!byte $dd
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@L1113 clc
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php
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sec
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plp
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bcc @L111B
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!byte $00
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!byte $00
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@L111B sec
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bcs @L111F
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@L111E clc
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@L111F lda $33
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beq @L111E
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bcs @L1127
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lda $44
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@L1127 nop
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rep #$20
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!al
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sep #$10
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jsr @L1143
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rep #$30
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!rl
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jsr @L1149
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sep #$30
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!as
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!rs
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jsr @L1149
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rep #$20
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!al
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sep #$10
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jsr @L1143
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sep #$30
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!as
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rts
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!al
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@L1143 lda #$1234
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ldx #$ff
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rts
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!as
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@L1149 lda #$ff
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ldx #$ee
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ldy #$dd
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rts
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