mirror of
https://github.com/fadden/6502bench.git
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e8608770b9
Implemented "is relative" flag. This only affects source code generation, replacing ".arstart <addr>" with ".arstart *+<value>". Only output by 64tass and ACME generators. Added a bold-text summary to radio buttons in address region edit dialog. This makes it much easier to see what you're doing. Added a warning to the label edit dialog when a label is being placed in a non-addressable region. Modified double-click behavior for .arstart/.arend to jump to the other end when the opcode is clicked on. This matches the behavior of instructions with address operands. Reordered Actions menu, putting "edit operand" at the top. Fixed AddressMap entry collision testing. Fixed PRG issue with multiple address regions at offset +000002. Added regression tests. Most of the complicated stuff with regions is tested by unit tests inside AddressMap, but we still need to exercise nested region code generation.
98 lines
1.6 KiB
ArmAsm
98 lines
1.6 KiB
ArmAsm
!cpu 6502
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* = $0000
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!word $3000 ;load address
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!pseudopc $1000 {
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!pseudopc *+$1000 {
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!pseudopc *+$1000 {
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L3000 bit L3000
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@L3003 lda @L3003
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and @LD003
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jmp @L200C
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}
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@L200C bit @L200C
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jmp @L1012
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}
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@L1012 bit @L1012
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jsr @L4000
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!pseudopc $0000 {
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!byte $00
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!pet "Null-term PETSCII string",$00
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!byte $80
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!word @L3003
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!word @LD003
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!byte $80
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}
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!pseudopc $4000 {
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@L4000 bit @L4000
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bit @L5000
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bit @L500F
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bit @L500F
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nop
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jmp @L4020
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!pseudopc $5000 {
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@L5000 bit @L5000
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bit @L4000
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nop
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nop
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@L5008 bit @L5008
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bit @L5017
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nop
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@L500F rts
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}
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@L4020 bit @L4020
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bit @L500F
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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jmp @L4040
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!pseudopc $5008 {
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@L5008_0 bit @L5008_0
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bit @L5000
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nop
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@L500F_0 bit @L500F_0
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nop
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nop
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nop
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nop
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nop
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@L5017 rts
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}
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@L4040 bit @L4040
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bit @L5017
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nop
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jmp @LD000
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}
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!pseudopc *+$bf7e {
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@LD000 bit @L200C
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@LD003 nop
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jmp @LE000
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!pseudopc $e000 {
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@LE000 bit @LE000
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jmp @LF000
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!pseudopc $f000 {
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@LF000 bit @LF000
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lda @L3003
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and @LD003
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nop
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rts
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}
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}
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}
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}
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