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https://github.com/fadden/6502bench.git
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e137db2b5c
Added an address-to-offset test in the GeneratePlatformSymbolRefs() method, which sets the operand symbols for anything that lands outside the scope of the file. Because the region isolation code prevented symbols from being associated with the operands in the initial code scan, those operands were being examined here. Without the additional test, the inappropriate label associations were getting a second chance. Added "[!in]" and "[!out]" to the comment field of .addrs lines. This is only for the on-screen display and text exports, not asm gen. Bumped the project file CONTENT_VERSION. Added a regression test (20290-region-isolation). The test turned up an existing problem: pre-labels are emitted by the asm generators on their own line, but the code that puts excessively long labels on a separate line wasn't taking that into account. This has been fixed. No changes to existing regression tests, which didn't happen to use long labels.
243 lines
5.7 KiB
ArmAsm
243 lines
5.7 KiB
ArmAsm
; Copyright 2024 faddenSoft. All Rights Reserved.
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; See the LICENSE.txt file for distribution terms (Apache 2.0).
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;
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; Assembler: 64tass
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; % tass64 --ascii --case-sensitive --nostart 20290-region-isolation.S
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;
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; This is pretending to be a multi-bank ROM, with 256 bytes per bank.
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.cpu "6502"
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;
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; Initial region. This should end before region1, rather than span
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; all sub-regions, so that we're exercising top-level regions for
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; regions 1-4.
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;
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* = $0800
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BANK = $c080
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jsr region1
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jsr region2
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jsr region3
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jsr region4
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lda inner1
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lda inner2
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lda inner3
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lda inner4
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; Local reference, can use "do not follow" to avoid mid-instruction branch.
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self lda $eaea
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call jsr altbnk1
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jsr altbnk2
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jmp done
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; These pretend to be code that switches the ROM bank, so the code
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; after the BIT instruction is actually in a different ROM, and the
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; BNE goes to something else.
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; EDIT: mark individual BNE as "do not follow"
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altbnk1 bit BANK ;e.g. trigger a ROM bank switch
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lda self+1
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bne self+2
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rts
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; EDIT: put this in a separate region, mark "disallow outbound"
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altbnk2 bit BANK
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lda self+1
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bne self+2
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ldx call ;EDIT: set symbol explicitly, should work
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rts
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done nop
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rts
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.align 256
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;
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; region 1x: fully closed
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;
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; This overlaps with region 1. By closing it we should prevent any
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; of the external references from resolving here.
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;
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.logical $1000
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region1x lda region1x
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.fill 50,$ea
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rts
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.align 256
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.endlogical
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;
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; region 1: fully open
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;
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.logical $1000 ;*
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region1 lda region1 ;*
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pha
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ldy #inner1_end-inner1-1 ;*
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nop
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_copy lda inner1_pre,y ;*
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sta inner1,y ;*
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dey
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bpl _copy
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bit inner1_pre+4 ;* should be an unresolved hole
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jsr inner1 ;*
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jmp finish1 ;*
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; relocated inner chunk
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inner1_pre ;*
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.logical region1+$8000 ;*
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inner1 ldx inner1 ;*
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ldy #$aa
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ldy finish1
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ldy finish2
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ldy finish3
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ldy finish4
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rts
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inner1_end ;*
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.endlogical
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finish1 ldy finish1 ;*
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ldx region1
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ldx region2
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ldx region3
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ldx region4
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lda inner1
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lda inner2
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lda inner3
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lda inner4
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pla
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rts
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.align 256 ;pad chunk to 256 bytes
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.endlogical
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;
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; region 2: disallow outbound
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;
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.logical $2000
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region2 lda region2
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pha
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ldy #inner2_end-inner2-1 ;*
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nop
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_copy lda inner2_pre,y ;*
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sta inner2,y ;*
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dey
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bpl _copy
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bit inner2_pre+4 ;* should be an unresolved hole
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jsr inner2 ;*
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jmp finish2 ;*
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; relocated inner chunk
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inner2_pre ;*
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.logical region2+$8000 ;*
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inner2 ldx inner2 ;*
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ldy #$aa
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ldy finish1
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ldy finish2
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ldy finish3
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ldy finish4
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rts
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inner2_end ;*
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.endlogical
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finish2 ldy finish2 ;*
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ldx region1
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ldx region2
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ldx region3
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ldx region4
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pla
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rts
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.align 256 ;pad chunk to 256 bytes
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.endlogical
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;
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; region 3: disallow inbound
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;
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.logical $3000
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region3 lda region3
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pha
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ldy #inner3_end-inner3-1 ;*
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nop
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_copy lda inner3_pre,y ;*
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sta inner3,y ;*
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dey
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bpl _copy
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bit inner3_pre+4 ;* should be an unresolved hole
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jsr inner3 ;*
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jmp finish3 ;*
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; relocated inner chunk
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inner3_pre ;*
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.logical region3+$8000 ;*
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inner3 ldx inner3 ;*
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ldy #$aa
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ldy finish1
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ldy finish2
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ldy finish3
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ldy finish4
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rts
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inner3_end ;*
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.endlogical
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finish3 ldy finish3 ;*
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ldx region1
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ldx region2
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ldx region3
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ldx region4
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pla
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rts
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.align 256 ;pad chunk to 256 bytes
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.endlogical
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;
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; region 4: disallow both
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;
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.logical $4000
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region4 lda region4
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pha
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ldy #inner4_end-inner4-1 ;*
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nop
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_copy lda inner4_pre,y ;*
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sta inner4,y ;*
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dey
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bpl _copy
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bit inner4_pre+4 ;* should be an unresolved hole
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jsr inner4 ;*
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jmp finish4 ;*
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; relocated inner chunk
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inner4_pre ;*
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.logical region4+$8000 ;*
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inner4 ldx inner4 ;*
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ldy #$aa
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ldy finish1
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ldy finish2
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ldy finish3
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ldy finish4
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rts
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inner4_end ;*
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.endlogical
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finish4 ldy finish4 ;*
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ldx region1
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ldx region2
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ldx region3
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ldx region4
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pla
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rts
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.align 256 ;pad chunk to 256 bytes
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.endlogical
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; Not sure how to force asm to output alignment padding at end of file.
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; Leave this marked as non-addressable.
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.byte $ff
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