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fix bit instructions (0-7, not 0-9)

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This commit is contained in:
Kelvin Sherlock 2016-12-30 21:02:39 -05:00
parent d1ece35946
commit 2636a5db93
1 changed files with 1 additions and 3 deletions
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4
Syntaxes/MPW Asm IIgs.tmLanguage
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@ -6,8 +6,6 @@
<array> <array>
<string>aii</string> <string>aii</string>
</array> </array>
<key>isDisabled</key>
<false/>
<key>name</key> <key>name</key>
<string>MPW Asm IIgs</string> <string>MPW Asm IIgs</string>
<key>patterns</key> <key>patterns</key>
@ -46,7 +44,7 @@
<key>comment</key> <key>comment</key>
<string>Rockwell/m740</string> <string>Rockwell/m740</string>
<key>match</key> <key>match</key>
<string>\b(?:BBC|BBR|BBS|CLB|RMB|SEB|SMB)[0-9]\b</string> <string>\b(?:BBC|BBR|BBS|CLB|RMB|SEB|SMB)[0-7]\b</string>
<key>name</key> <key>name</key>
<string>keyword.mnemonic.other</string> <string>keyword.mnemonic.other</string>
</dict> </dict>