mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-11-23 06:32:11 +00:00
64 lines
1.1 KiB
Plaintext
64 lines
1.1 KiB
Plaintext
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.inesprg 1 ; 1x 16KB PRG code
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.ineschr 1 ; 1x 8KB CHR data
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.inesmap 0 ; mapper 0 = NROM, no bank swapping
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.inesmir 1 ; background mirroring
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;;;;;;;;;;;;;;;
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.bank 0
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.org $C000
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RESET:
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SEI ; disable IRQs
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CLD ; disable decimal mode
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LDX #$40
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STX $4017 ; disable APU frame IRQ
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LDX #$FF
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TXS ; Set up stack
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INX ; now X = 0
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STX $2000 ; disable NMI
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STX $2001 ; disable rendering
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STX $4010 ; disable DMC IRQs
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vblankwait1: ; First wait for vblank to make sure PPU is ready
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BIT $2002
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BPL vblankwait1
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clrmem:
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LDA #$00
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STA $0000, x
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STA $0100, x
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STA $0400, x
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STA $0500, x
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STA $0600, x
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STA $0700, x
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LDA #$FE
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STA $0300, x
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INX
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BNE clrmem
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vblankwait2: ; Second wait for vblank, PPU is ready after this
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BIT $2002
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BPL vblankwait2
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Foreverloop:
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JMP Foreverloop ;jump back to Forever, infinite loop
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IRQ:
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NMI:
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RTI
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;;;;;;;;;;;;;;
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.bank 1
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.org $FFFA
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.dw NMI
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.dw RESET
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.dw IRQ
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;;;;;;;;;;;;;;
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.bank 2
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.org $0000
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.incbin "jroatch.chr" ;include CHR ROM
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