2019-03-13 18:52:30 +00:00
|
|
|
SYMBOLS {
|
|
|
|
__STACKSIZE__: type = weak, value = $0300; # 3 pages stack
|
|
|
|
}
|
|
|
|
MEMORY {
|
|
|
|
ZP: file = "", start = $0002, size = $00FE, type = rw, define = yes;
|
|
|
|
|
|
|
|
# INES Cartridge Header
|
|
|
|
HEADER: file = %O, start = $0000, size = $0010, fill = yes;
|
|
|
|
|
2019-04-05 12:58:26 +00:00
|
|
|
# 3 16K ROM Banks @ $8000
|
2019-03-13 18:52:30 +00:00
|
|
|
PRG0: start = $8000, size = $2000, file = %O ,fill = yes, define = yes;
|
|
|
|
PRG1: start = $8000, size = $2000, file = %O ,fill = yes, define = yes;
|
|
|
|
PRG2: start = $8000, size = $2000, file = %O ,fill = yes, define = yes;
|
|
|
|
|
2019-04-05 12:58:26 +00:00
|
|
|
# 3 16K ROM Banks @ $a000
|
|
|
|
PRG3: start = $a000, size = $2000, file = %O ,fill = yes, define = yes;
|
|
|
|
PRG4: start = $a000, size = $2000, file = %O ,fill = yes, define = yes;
|
2019-03-13 18:52:30 +00:00
|
|
|
PRG5: start = $a000, size = $2000, file = %O ,fill = yes, define = yes;
|
2019-04-05 12:58:26 +00:00
|
|
|
|
|
|
|
# fixed 16K ROM banks @ $c000
|
2019-03-13 18:52:30 +00:00
|
|
|
PRG6: start = $c000, size = $2000, file = %O ,fill = yes, define = yes;
|
|
|
|
|
|
|
|
# final bank has
|
|
|
|
# - startup
|
|
|
|
# - code
|
|
|
|
# - vectors
|
|
|
|
PRG7: file = %O, start = $E000, size = $1FFA, fill = yes, define = yes;
|
|
|
|
VECTORS: file = %O, start = $FFFA, size = $0006, fill = yes;
|
|
|
|
|
|
|
|
# 8 8k CHR Banks (64k)
|
|
|
|
CHR: file = %O, start = $0000, size = $10000, fill = yes;
|
|
|
|
|
|
|
|
# standard 2k SRAM (-zeropage)
|
|
|
|
# $0100-$0200 cpu stack
|
|
|
|
# $0200-$0500 3 pages for ppu memory write buffer
|
|
|
|
# $0500-$0800 3 pages for cc65 parameter stack
|
|
|
|
SRAM: file = "", start = $0500, size = __STACKSIZE__, define = yes;
|
|
|
|
|
|
|
|
# additional 8K SRAM Bank
|
|
|
|
# - data (run)
|
|
|
|
# - bss
|
|
|
|
# - heap
|
|
|
|
RAM: file = "", start = $6000, size = $2000, define = yes;
|
|
|
|
}
|
|
|
|
SEGMENTS {
|
|
|
|
ZEROPAGE: load = ZP, type = zp;
|
|
|
|
HEADER: load = HEADER, type = ro;
|
|
|
|
CODE0: load = PRG0, type = ro, define = yes, optional = yes;
|
|
|
|
CODE1: load = PRG1, type = ro, define = yes, optional = yes;
|
|
|
|
CODE2: load = PRG2, type = ro, define = yes, optional = yes;
|
|
|
|
CODE3: load = PRG3, type = ro, define = yes, optional = yes;
|
|
|
|
CODE4: load = PRG4, type = ro, define = yes, optional = yes;
|
|
|
|
CODE5: load = PRG5, type = ro, define = yes, optional = yes;
|
|
|
|
CODE6: load = PRG6, type = ro, define = yes, optional = yes;
|
|
|
|
RODATA: load = PRG6, type = ro, define = yes;
|
|
|
|
ONCE: load = PRG6, type = ro, optional = yes;
|
|
|
|
DATA: load = PRG6, run = RAM, type = rw, define = yes;
|
|
|
|
STARTUP: load = PRG6, type = ro, define = yes;
|
|
|
|
CODE: load = PRG7, type = ro, define = yes;
|
|
|
|
VECTORS: load = VECTORS, type = rw;
|
|
|
|
CHARS: load = CHR, type = rw;
|
|
|
|
BSS: load = SRAM, type = bss, define = yes;
|
|
|
|
}
|
|
|
|
FEATURES {
|
|
|
|
CONDES: type = constructor,
|
|
|
|
label = __CONSTRUCTOR_TABLE__,
|
|
|
|
count = __CONSTRUCTOR_COUNT__,
|
|
|
|
segment = ONCE;
|
|
|
|
CONDES: type = destructor,
|
|
|
|
label = __DESTRUCTOR_TABLE__,
|
|
|
|
count = __DESTRUCTOR_COUNT__,
|
|
|
|
segment = RODATA;
|
|
|
|
CONDES: type = interruptor,
|
|
|
|
label = __INTERRUPTOR_TABLE__,
|
|
|
|
count = __INTERRUPTOR_COUNT__,
|
|
|
|
segment = RODATA,
|
|
|
|
import = __CALLIRQ__;
|
|
|
|
}
|