From 3766576bae3f5fdb7239930950ac0eb8f603cbb1 Mon Sep 17 00:00:00 2001
From: Steven Hugg <hugg@fasterlight.com>
Date: Wed, 13 Jul 2022 13:23:18 -0500
Subject: [PATCH] z80: fixed bug in "add iy,sp"

---
 src/common/cpu/ZilogZ80.ts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/common/cpu/ZilogZ80.ts b/src/common/cpu/ZilogZ80.ts
index 648753ec..f15ce40d 100644
--- a/src/common/cpu/ZilogZ80.ts
+++ b/src/common/cpu/ZilogZ80.ts
@@ -1125,7 +1125,7 @@ let do_ix_add = function(operand)
    flags.H = (((ix & 0xfff) + (operand & 0xfff)) & 0x1000) ? 1 : 0;
    update_xy_flags((result & 0xff00) >>> 8);
    
-   ix = result;
+   ix = result & 0xffff;
 };