vcs: ca65 support, fixed segment offset parsing in listing
This commit is contained in:
Steven Hugg
parent
4addfe7ae2
commit
64fcbdc9d5
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@ -154,6 +154,7 @@ TODO:
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- publishing Markdown file loads default file?
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- better text/binary detection (e.g. 0xa9 copyright)
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- going into repo chooses wrong file if republished with different main
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- renaming main file doesn't change repo def.
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- keyboard shortcuts
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- ctrl+alt+l on ubuntu locks screen
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- alt-D doesn't work anymore
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@ -362,6 +362,7 @@ body {
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<script src="src/codemirror/inform6.js"></script>
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<script src="src/codemirror/fastbasic.js"></script>
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<script src="src/codemirror/basic.js"></script>
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<script src="src/codemirror/wiz.js"></script>
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<link rel="stylesheet" href="css/codemirror.css">
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<script src="codemirror/addon/edit/matchbrackets.js"></script>
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<script src="codemirror/addon/search/search.js"></script>
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@ -0,0 +1,32 @@
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.include "vcs-ca65.h"
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.zeropage
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Temp: .byte 0
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.segment "CODE"
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Reset:
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CLEAN_START
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NextFrame:
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FRAME_START
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lda #$80
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sta COLUBK
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KERNEL_START
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KERNEL_END
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FRAME_END
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jmp NextFrame
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.segment "VECTORS"
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.word Reset
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.word Reset
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.word Reset
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@ -0,0 +1,232 @@
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.setcpu "6502X"
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; TIA write registers
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VSYNC := $00 ; ---- --1- This address controls vertical sync time by writing D1 into the VSYNC latch.
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VBLANK := $01 ; 76-- --1- 1=Start VBLANK, 6=Enable INPT4, INPT5 latches, 7=Dump INPT1,2,3,6 to ground
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WSYNC := $02 ; ---- ---- This address halts microprocessor by clearing RDY latch to zero. RDY is set true again by the leading edge of horizontal blank.
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RSYNC := $03 ; ---- ---- This address resets the horizontal sync counter to define the beginning of horizontal blank time, and is used in chip testing.
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NUSIZ0 := $04 ; --54 -210 \ 0,1,2: player copys'n'size, 4,5: missile size: 2^x pixels
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NUSIZ1 := $05 ; --54 -210 /
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COLUP0 := $06 ; 7654 321- color player 0
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COLUP1 := $07 ; 7654 321- color player 1
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COLUPF := $08 ; 7654 321- color playfield
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COLUBK := $09 ; 7654 321- color background
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CTRLPF := $0A ; --54 -210 0=reflect playfield, 1=pf uses player colors, 2=playfield over sprites 4,5=ballsize:2^x
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REFP0 := $0B ; ---- 3--- reflect player 0
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REFP1 := $0C ; ---- 3--- reflect player 1
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PF0 := $0D ; DCBA ---- \ Playfield bits: ABCDEFGHIJKLMNOPQRST
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PF1 := $0E ; EFGH IJKL > normal: ABCDEFGHIJKLMNOPQRSTABCDEFGHIJKLMNOPQRST
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PF2 := $0F ; TSRQ PONM / reflect: ABCDEFGHIJKLMNOPQRSTTSRQPONMLKJIHGFEDCBA
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RESP0 := $10 ; ---- ---- \
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RESP1 := $11 ; ---- ---- \
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RESM0 := $12 ; ---- ---- > reset players, missiles and the ball. The object will begin its serial graphics at the time of a horizontal line at which the reset address occurs.
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RESM1 := $13 ; ---- ---- /
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RESBL := $14 ; ---- ---- /
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AUDC0 := $15 ; ---- 3210 audio control voice 0
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AUDC1 := $16 ; ---- 3210 audio control voice 1
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AUDF0 := $17 ; ---4 3210 frequency divider voice 0
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AUDF1 := $18 ; ---4 3210 frequency divider voice 1
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AUDV0 := $19 ; ---- 3210 audio volume voice 0
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AUDV1 := $1A ; ---- 3210 audio volume voice 1
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GRP0 := $1B ; 7654 3210 graphics player 0
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GRP1 := $1C ; 7654 3210 graphics player 1
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ENAM0 := $1D ; ---- --1- enable missile 0
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ENAM1 := $1E ; ---- --1- enable missile 1
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ENABL := $1F ; ---- --1- enable ball
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HMP0 := $20 ; 7654 ---- write data (horizontal motion values) into the horizontal motion registers
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HMP1 := $21 ; 7654 ---- write data (horizontal motion values) into the horizontal motion registers
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HMM0 := $22 ; 7654 ---- write data (horizontal motion values) into the horizontal motion registers
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HMM1 := $23 ; 7654 ---- write data (horizontal motion values) into the horizontal motion registers
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HMBL := $24 ; 7654 ---- write data (horizontal motion values) into the horizontal motion registers
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VDELP0 := $25 ; ---- ---0 delay player 0 by one vertical line
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VDELP1 := $26 ; ---- ---0 delay player 1 by one vertical line
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VDELBL := $27 ; ---- ---0 delay ball by one vertical line
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RESMP0 := $28 ; ---- --1- keep missile 0 aligned with player 0
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RESMP1 := $29 ; ---- --1- keep missile 1 aligned with player 1
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HMOVE := $2A ; ---- ---- This address causes the horizontal motion register values to be acted upon during the horizontal blank time in which it occurs.
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HMCLR := $2B ; ---- ---- This address clears all horizontal motion registers to zero (no motion).
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CXCLR := $2C ; ---- ---- clears all collision latches
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; TIA read registers
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CXM0P := $00 ; xx00 0000 Read Collision M0-P1 M0-P0
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CXM1P := $01 ; xx00 0000 M1-P0 M1-P1
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CXP0FB := $02 ; xx00 0000 P0-PF P0-BL
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CXP1FB := $03 ; xx00 0000 P1-PF P1-BL
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CXM0FB := $04 ; xx00 0000 M0-PF M0-BL
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CXM1FB := $05 ; xx00 0000 M1-PF M1-BL
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CXBLPF := $06 ; x000 0000 BL-PF -----
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CXPPMM := $07 ; xx00 0000 P0-P1 M0-M1
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INPT0 := $08 ; x000 0000 Read Pot Port 0
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INPT1 := $09 ; x000 0000 Read Pot Port 1
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INPT2 := $0A ; x000 0000 Read Pot Port 2
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INPT3 := $0B ; x000 0000 Read Pot Port 3
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INPT4 := $0C ; x000 0000 Read Input (Trigger) 0
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INPT5 := $0D ; x000 0000 Read Input (Trigger) 1
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; RIOT
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SWCHA := $0280
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SWACNT := $0281
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SWCHB := $0282
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SWBCNT := $0283
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INTIM := $0284 ; Timer output
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TIMINT := $0285
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TIM1T := $0294
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TIM8T := $0295
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TIM64T := $0296
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TIM1024T := $0297
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;-------------------------------------------------------------------------------
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; SLEEP duration
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; Original author: Thomas Jentzsch
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; Inserts code which takes the specified number of cycles to execute. This is
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; useful for code where precise timing is required.
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; ILLEGAL-OPCODE VERSION DOES NOT AFFECT FLAGS OR REGISTERS.
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; LEGAL OPCODE VERSION MAY AFFECT FLAGS
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; Uses illegal opcode (DASM 2.20.01 onwards).
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.macro SLEEP cycles
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.if cycles < 2
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.error "MACRO ERROR: 'SLEEP': Duration must be > 1"
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.endif
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.if cycles & 1
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.ifndef NO_ILLEGAL_OPCODES
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nop 0
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.else
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bit VSYNC
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.endif
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.repeat (cycles-3)/2
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nop
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.endrep
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.else
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.repeat cycles/2
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nop
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.endrep
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.endif
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.endmacro
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;-------------------------------------------------------------------------------
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; VERTICAL_SYNC
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; revised version by Edwin Blink -- saves bytes!
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; Inserts the code required for a proper 3 scanline vertical sync sequence
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; Note: Alters the accumulator
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; OUT: A = 0
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.macro VERTICAL_SYNC
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lda #%1110 ; each '1' bits generate a VSYNC ON line (bits 1..3)
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.local VSLP1
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VSLP1: sta WSYNC ; 1st '0' bit resets Vsync, 2nd '0' bit exit loop
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sta VSYNC
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lsr
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bne VSLP1 ; branch until VYSNC has been reset
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.endmacro
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;-------------------------------------------------------
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; Usage: TIMER_SETUP lines
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; where lines is the number of scanlines to skip (> 2).
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; The timer will be set so that it expires before this number
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; of scanlines. A WSYNC will be done first.
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.macro TIMER_SETUP lines
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.local cycles
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cycles = ((lines * 76) - 13)
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; special case for when we have two timer events in a line
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; and our 2nd event straddles the WSYNC boundary
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.if (cycles .mod 64) < 12
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lda #(cycles / 64) - 1
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sta WSYNC
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.else
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lda #(cycles / 64)
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sta WSYNC
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.endif
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sta TIM64T
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.endmacro
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;-------------------------------------------------------
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; Use with TIMER_SETUP to wait for timer to complete.
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; Performs a WSYNC afterwards.
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.macro TIMER_WAIT
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.local waittimer
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waittimer:
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lda INTIM
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bne waittimer
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sta WSYNC
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.endmacro
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;-------------------------------------------------------------------------------
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; CLEAN_START
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; Original author: Andrew Davie
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; Standardised start-up code, clears stack, all TIA registers and RAM to 0
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; Sets stack pointer to $FF, and all registers to 0
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; Sets decimal mode off, sets interrupt flag (kind of un-necessary)
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; Use as very first section of code on boot (ie: at reset)
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; Code written to minimise total ROM usage - uses weird 6502 knowledge :)
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.macro CLEAN_START
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.local CLEAR_STACK
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sei
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cld
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ldx #0
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txa
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tay
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CLEAR_STACK: dex
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txs
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pha
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bne CLEAR_STACK ; SP=$FF, X = A = Y = 0
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.endmacro
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; assume NTSC unless PAL defined
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.ifndef PAL
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PAL = 0
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.endif
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; 192 visible scanlines for NTSC, 228 for PAL
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.if PAL
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SCANLINES = 228
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.else
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SCANLINES = 192
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.endif
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; start of frame -- vsync and set back porch timer
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.macro FRAME_START
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VERTICAL_SYNC
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.if PAL
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TIMER_SETUP 44
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.else
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TIMER_SETUP 36
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.endif
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.endmacro
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; end of back porch -- start kernel
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.macro KERNEL_START
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TIMER_WAIT
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lda #0
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sta VBLANK
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.if !PAL
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TIMER_SETUP 194
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.endif
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.endmacro
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; end of kernel -- start front porch timer
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.macro KERNEL_END
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.if !PAL
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TIMER_WAIT
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.endif
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lda #2
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sta VBLANK
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.if PAL
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TIMER_SETUP 36
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.else
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TIMER_SETUP 28
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.endif
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.endmacro
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; end of frame -- jump to frame start
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.macro FRAME_END
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TIMER_WAIT
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.endmacro
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@ -265,6 +265,7 @@ class VCSPlatform extends BasePlatform {
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getToolForFilename(fn) {
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if (fn.endsWith(".wiz")) return "wiz";
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if (fn.endsWith(".bb") || fn.endsWith(".bas")) return "bataribasic";
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if (fn.endsWith(".ca65")) return "ca65";
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return "dasm";
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}
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getDefaultExtension() { return ".a"; }
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@ -434,6 +435,9 @@ class VCSMAMEPlatform extends BaseMAMEPlatform implements Platform {
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getPresets = function() { return VCS_PRESETS; }
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getToolForFilename = function(fn) {
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if (fn.endsWith(".wiz")) return "wiz";
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if (fn.endsWith(".bb") || fn.endsWith(".bas")) return "bataribasic";
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if (fn.endsWith(".ca65")) return "ca65";
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return "dasm";
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}
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getDefaultExtension = function() { return ".a"; };
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@ -0,0 +1,20 @@
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# Linker config file for targeting the Atari 2600.
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# From http://wiki.cc65.org/doku.php?id=cc65:atari_2600
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MEMORY {
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RAM: start = $80, size=$80, type = rw, define = yes;
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ROM: start = $F000, size=$1000, type = ro, file = %O, define = yes;
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TIA: start = $00, size=$40, type = rw, define = yes;
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RIOT: start = $280, size=$20, type = rw, define = yes;
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}
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SEGMENTS {
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RODATA: load=ROM, type=ro, align = $100;
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CODE: load=ROM, type=ro, define=yes;
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DATA: load=ROM, run=RAM, type=rw, define=yes;
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BSS: load=RAM, type=bss, define=yes;
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VECTORS: load=ROM, type=ro, start=$FFFA;
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ZEROPAGE: load=RAM, type=zp;
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TIA: load=TIA, type=rw, define = yes, optional = yes;
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RIOT: load=RIOT, type=rw, define = yes, optional = yes;
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}
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@ -60,7 +60,9 @@ var PLATFORM_PARAMS = {
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data_start: 0x80,
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data_size: 0x80,
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wiz_rom_ext: '.a26',
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wiz_inc_dir: '2600'
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wiz_inc_dir: '2600',
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extra_link_files: ['atari2600.cfg'],
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cfgfile: 'atari2600.cfg',
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},
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'mw8080bw': {
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arch: 'z80',
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@ -575,6 +577,7 @@ function setupFS(FS, name:string) {
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if (name === '65-vector') name = '65-sim6502'; // TODO
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if (name === '65-atari7800') name = '65-sim6502'; // TODO
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if (name === '65-devel') name = '65-sim6502'; // TODO
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if (name === '65-vcs') name = '65-sim6502'; // TODO
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if (!fsMeta[name]) throw Error("No filesystem for '" + name + "'");
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FS.mkdir('/share');
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FS.mount(WORKERFS, {
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@ -915,6 +918,7 @@ function parseCA65Listing(code, symbols, params, dbg) {
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var dbgLineMatch = /^([0-9A-F]+)([r]?)\s+(\d+)\s+[.]dbg\s+(\w+), "([^"]+)", (.+)/;
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var funcLineMatch = /"(\w+)", (\w+), "(\w+)"/;
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var insnLineMatch = /^([0-9A-F]+)([r]?)\s{1,2}(\d+)\s{1,2}([0-9A-Frx ]{11})\s+(.*)/;
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var segMatch = /[.]segment\s+"(\w+)"/i;
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var lines = [];
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var linenum = 0;
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// TODO: only does .c functions, not all .s files
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@ -945,28 +949,37 @@ function parseCA65Listing(code, symbols, params, dbg) {
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}
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} else {
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var linem = insnLineMatch.exec(line);
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if (linem) linenum++;
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if (linem && linem[1]) {
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var topfile = linem && linem[3] == '1';
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if (topfile) linenum++;
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if (topfile && linem[1]) {
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var offset = parseInt(linem[1], 16);
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var insns = linem[4].trim();
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if (insns.length) {
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lines.push({
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line:linenum,
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offset:offset + segofs,
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insns:insns
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});
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// take back one to honor the long .byte line
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if (linem[5].length == 0) linenum--;
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if (linem[5].length == 0) {
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linenum--;
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} else {
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lines.push({
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line:linenum,
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offset:offset + segofs,
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insns:insns
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});
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}
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} else {
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var sym = linem[5];
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if (sym && sym.endsWith(':')) {
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sym = sym.substring(0, sym.length-1);
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var symofs = symbols[sym];
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var segm = sym && segMatch.exec(sym);
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if (segm && segm[1]) {
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var symofs = symbols['__' + segm[1] + '_RUN__'];
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if (typeof symofs === 'number') {
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offset = parseInt(linem[1], 16);
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segofs = symofs - offset;
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segofs = symofs;
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//console.log(sym, symofs, '-', offset);
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}
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} else if (sym.endsWith(':') && !sym.startsWith('@')) {
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var symofs = symbols[sym.substring(0,sym.length-1)];
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if (typeof symofs === 'number') {
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segofs = symofs - offset;
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//console.log(sym, segofs, symofs, offset);
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}
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}
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}
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}
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@ -2866,6 +2879,7 @@ var TOOL_PRELOADFS = {
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'ca65-atari7800': '65-sim6502',
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'cc65-devel': '65-sim6502',
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'ca65-devel': '65-sim6502',
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'ca65-vcs': '65-sim6502',
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'sdasz80': 'sdcc',
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'sdcc': 'sdcc',
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'sccz80': 'sccz80',
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