1
0
mirror of https://github.com/sehugg/8bitworkshop.git synced 2026-04-21 21:16:51 +00:00

tests: createTestDOM() function

This commit is contained in:
Steven Hugg
2020-07-27 08:04:48 -05:00
parent a5c69fa274
commit 68f19fbf11
5 changed files with 22 additions and 13 deletions
+1 -10
View File
@@ -4,16 +4,7 @@ var fs = require('fs');
var wtu = require('./workertestutils.js');
var PNG = require('pngjs').PNG;
const jsdom = require('jsdom');
const { JSDOM } = jsdom;
//const { window } = new JSDOM();
const dom = new JSDOM(`<!DOCTYPE html><div id="emulator"><div id="javatari-screen"></div></div>`);
global.window = dom.window;
global.document = dom.window.document;
dom.window.Audio = null;
global.Image = function() { }
global['$'] = require("jquery/jquery.min.js");
const dom = createTestDOM();
includeInThisContext('src/common/cpu/6809.js');
includeInThisContext("javatari.js/release/javatari/javatari.js");
Javatari.AUTO_START = false;
+4 -2
View File
@@ -2,6 +2,7 @@
var assert = require('assert');
var fs = require('fs');
var wtu = require('./workertestutils.js');
createTestDOM();
var emu = require('gen/common/emu.js');
var verilog = require('gen/platform/verilog.js');
@@ -21,7 +22,7 @@ function loadPlatform(msg) {
platform.loadROM("ROM", msg.output);
platform.loadROM("ROM", msg.output);
verilog.vl_finished = verilog.vl_stopped = false;
for (var i=0; i<10000 && !(verilog.vl_finished||verilog.vl_stopped); i++) {
for (var i=0; i<100000 && !(verilog.vl_finished||verilog.vl_stopped); i++) {
platform.tick();
}
assert.ok(!verilog.vl_stopped);
@@ -42,7 +43,7 @@ function loadPlatform(msg) {
function testPerf(msg) {
var platform = new VerilogPlatform();
platform.loadROM("ROM", msg.output);
var niters = 2000000;
var niters = 5000000;
console.time("before");
for (var i=0; i<niters; i++)
@@ -154,6 +155,7 @@ describe('Verilog Worker', function() {
testVerilator('test/cli/verilog/t_clk_condflop.v', ['BLKSEQ']);
testVerilator('presets/verilog/hvsync_generator.v');
testVerilator('presets/verilog/cpu6502.v');
/*
it('should compile verilog example', function(done) {
var csource = ab2str(fs.readFileSync('presets/verilog/hvsync_generator.v'));
+12
View File
@@ -127,3 +127,15 @@ global.fetch = function(path) {
}
});
}
global.createTestDOM = function() {
const jsdom = require('jsdom');
const { JSDOM } = jsdom;
const dom = new JSDOM(`<!DOCTYPE html><div id="emulator"><div id="javatari-screen"></div></div>`);
global.window = dom.window;
global.document = dom.window.document;
global['$'] = require("jquery/jquery.min.js");
dom.window.Audio = null;
global.Image = function() { }
return dom;
}