diff --git a/index.html b/index.html
index 9ee75f71..76f735bc 100644
--- a/index.html
+++ b/index.html
@@ -165,6 +165,14 @@ a.dropdown-toggle {
     -moz-border-radius:6px 0 6px 6px;
     border-radius:6px 0 6px 6px;
 }
+canvas {
+  image-rendering: optimizeSpeed;             /* Older versions of FF          */
+  image-rendering: -moz-crisp-edges;          /* FF 6.0+                       */
+  image-rendering: -webkit-optimize-contrast; /* Safari                        */
+  image-rendering: -o-crisp-edges;            /* OS X & Windows Opera (12.02+) */
+  image-rendering: pixelated;                 /* Awesome future-browsers       */
+  -ms-interpolation-mode: nearest-neighbor;   /* IE                            */
+}
 </style>
 </head>
 <body>
@@ -177,14 +185,14 @@ a.dropdown-toggle {
     <ul class="dropdown-menu" aria-labelledby="dropdownMenuButton">
       <li><a class="dropdown-item" href="#" id="item_new_file">New File...</a></li>
       <li><a class="dropdown-item" href="#" id="item_share_file">Share File...</a></li>
-      <li><a class="dropdown-item" href="#" id="item_reset_file">Reset to Original...</a></li>
+      <li><a class="dropdown-item" href="#" id="item_reset_file">Revert to Original...</a></li>
       <li class="dropdown dropdown-submenu">
           <a tabindex="-1" href="#">Platform</a>
           <ul class="dropdown-menu">
             <li><a class="dropdown-item" href="?platform=vcs" id="item_platform_vcs">Atari VCS</a></li>
             <li><a class="dropdown-item" href="?platform=apple2" id="item_platform_apple2">Apple ][</a></li>
             <li><a class="dropdown-item" href="?platform=atarivec" id="item_platform_atarivec">Asteroids</a></li>
-            <li><a class="dropdown-item" href="?platform=exidy" id="item_platform_exidy">Exidy</a></li>
+            <li><a class="dropdown-item" href="?platform=spaceinv" id="item_platform_spaceinv">Space Invaders</a></li>
           </ul>
       </li>
       <li class="dropdown dropdown-submenu">
@@ -202,9 +210,9 @@ a.dropdown-toggle {
     <button id="dbg_go" type="button" title="Run"><img src="images/play.png"></button>
     <button id="dbg_step" type="submit" title="Step"><img src="images/singlestep.png"></button>
     <button id="dbg_toline" type="submit" title="Run To Line"><img src="images/runtoline.png"></button>
-    <button id="dbg_reset" type="submit" title="Reset and Run To Line"><img src="images/resetandrun.png"></button>
     <button id="dbg_stepout" type="submit" title="Step Out of Subroutine">RTS</button>
     <button id="dbg_stepback" type="submit" title="Step Backwards">&lt;&lt;</button>
+    <button id="dbg_reset" type="submit" title="Reset and Break"><img src="images/resetandrun.png"></button>
     <button id="dbg_timing" type="submit" title="See Timing" style="display:none"><img src="images/timing.png"></button>
     <button id="dbg_disasm" type="submit" title="Toggle Disassembly">#</button>
   </span>
@@ -261,13 +269,14 @@ a.dropdown-toggle {
 <link rel="stylesheet" href="codemirror/addon/dialog/dialog.css">
 
 <script src="javatari.js/release/javatari/javatari.js"></script>
+<script src="src/cpu/z80.js"></script>
 <script src="src/emu.js"></script>
 <script src="src/util.js"></script>
 <script src="src/disasm.js"></script>
 <script src="src/platform/vcs.js"></script>
 <script src="src/platform/apple2.js"></script>
 <script src="src/platform/atarivec.js"></script>
-<script src="src/platform/exidy.js"></script>
+<script src="src/platform/spaceinv.js"></script>
 <script src="src/ui.js"></script>
 
 </body>
diff --git a/src/cpu/z80.coffee b/src/cpu/z80.coffee
new file mode 100644
index 00000000..29450709
--- /dev/null
+++ b/src/cpu/z80.coffee
@@ -0,0 +1,2661 @@
+###
+Z80 core.
+To avoid mass repetition of code across the numerous instruction variants
+the code for this component is built up programmatically and evaluated in
+the global scope. CoffeeScript is used here for its support of multi-line
+strings, and expression interpolation in strings.
+###
+
+
+###
+Registers are stored in a typed array as a way of automatically casting
+calculations to 8/16 bit, and to allow accessing them interchangeably as
+register pairs or individual registers by having two arrays backed by the
+same buffer. For the latter to work, we need to find out the endianness
+of the host processor, as typed arrays are native-endian
+	(http://lists.w3.org/Archives/Public/public-script-coord/2010AprJun/0048.html,
+	http://cat-in-136.blogspot.com/2011/03/javascript-typed-array-use-native.html)
+###
+
+window.buildZ80 = (opts) ->
+	opts ?= {}
+	endianTestBuffer = new ArrayBuffer(2)
+	endianTestUint16 = new Uint16Array(endianTestBuffer)
+	endianTestUint8 = new Uint8Array(endianTestBuffer)
+	endianTestUint16[0] = 0x0100
+	isBigEndian = (endianTestUint8[0] == 0x01)
+
+	# Offsets into register set when read as register pairs
+	rpAF = 0
+	rpBC = 1
+	rpDE = 2
+	rpHL = 3
+	rpAF_ = 4
+	rpBC_ = 5
+	rpDE_ = 6
+	rpHL_ = 7
+	rpIX = 8
+	rpIY = 9
+	rpIR = 10
+	rpSP = 11
+	rpPC = 12
+
+	registerPairIndexes = {
+		'IX': 8, 'IY': 9
+	}
+
+	if isBigEndian
+		rA = 0; rF = 1
+		rB = 2; rC = 3
+		rD = 4; rE = 5
+		rH = 6; rL = 7
+		rA_ = 8; rF_ = 9
+		rB_ = 10; rC_ = 11
+		rD_ = 12; rE_ = 13
+		rH_ = 14; rL_ = 15
+		rIXH = 16; rIXL = 17
+		rIYH = 18; rIYL = 19
+		rI = 20; rR = 21
+		registerIndexes = {
+			A: 0, F: 1
+			B: 2, C: 3
+			D: 4, E: 5
+			H: 6, L: 7
+			IXH: 16, IXL: 17
+			IYH: 18, IYL: 19
+		}
+	else
+		# little-endian
+		rF = 0; rA = 1
+		rC = 2; rB = 3
+		rE = 4; rD = 5
+		rL = 6; rH = 7
+		rF_ = 8; rA_ = 9
+		rC_ = 10; rB_ = 11
+		rE_ = 12; rD_ = 13
+		rL_ = 14; rH_ = 15
+		rIXL = 16; rIXH = 17
+		rIYL = 18; rIYH = 19
+		rR = 20; rI = 21
+		registerIndexes = {
+			F: 0, A: 1
+			C: 2, B: 3
+			E: 4, D: 5
+			L: 6, H: 7
+			IXL: 16, IXH: 17
+			IYL: 18, IYH: 19
+		}
+
+	FLAG_C = 0x01
+	FLAG_N = 0x02
+	FLAG_P = 0x04
+	FLAG_V = 0x04
+	FLAG_3 = 0x08
+	FLAG_H = 0x10
+	FLAG_5 = 0x20
+	FLAG_Z = 0x40
+	FLAG_S = 0x80
+
+	# JS block setting up internal Z80 state and lookup tables
+
+	setUpStateJS = """
+		var memory = opts.memory;
+		var ioBus = opts.ioBus;
+		var display = opts.display;
+
+		var registerBuffer = new ArrayBuffer(26);
+		/* Expose registerBuffer as both register pairs and individual registers */
+		var regPairs = new Uint16Array(registerBuffer);
+		var regs = new Uint8Array(registerBuffer);
+
+		var tstates = 0; /* number of tstates since start of this frame */
+		var iff1 = 0;
+		var iff2 = 0;
+		var im = 0;
+		var halted = false;
+
+		/* tables for setting Z80 flags */
+
+		/*
+			Whether a half carry occurred or not can be determined by looking at
+			the 3rd bit of the two arguments and the result; these are hashed
+			into this table in the form r12, where r is the 3rd bit of the
+			result, 1 is the 3rd bit of the 1st argument and 2 is the
+			third bit of the 2nd argument; the tables differ for add and subtract
+			operations
+		*/
+		var halfcarryAddTable = new Uint8Array([0, #{FLAG_H}, #{FLAG_H}, #{FLAG_H}, 0, 0, 0, #{FLAG_H}]);
+		var halfcarrySubTable = new Uint8Array([0, 0, #{FLAG_H}, 0, #{FLAG_H}, 0, #{FLAG_H}, #{FLAG_H}]);
+
+		/*
+			Similarly, overflow can be determined by looking at the 7th bits; again
+			the hash into this table is r12
+		*/
+		var overflowAddTable = new Uint8Array([0, 0, 0, #{FLAG_V}, #{FLAG_V}, 0, 0, 0]);
+		var overflowSubTable = new Uint8Array([0, #{FLAG_V}, 0, 0, 0, 0, #{FLAG_V}, 0]);
+
+		var sz53Table = new Uint8Array(0x100); /* The S, Z, 5 and 3 bits of the index */
+		var parityTable = new Uint8Array(0x100); /* The parity of the lookup value */
+		var sz53pTable = new Uint8Array(0x100); /* OR the above two tables together */
+
+		for (var i = 0; i < 0x100; i++) {
+			sz53Table[i] = i & ( #{FLAG_3 | FLAG_5 | FLAG_S} );
+			var j = i;
+			var parity = 0;
+			for (var k = 0; k < 8; k++) {
+				parity ^= j & 1;
+				j >>=1;
+			}
+
+			parityTable[i] = (parity ? 0 : #{FLAG_P});
+			sz53pTable[i] = sz53Table[i] | parityTable[i];
+
+			sz53Table[0] |= #{FLAG_Z};
+			sz53pTable[0] |= #{FLAG_Z};
+		}
+
+		var interruptible = true;
+		var interruptPending = false;
+		var interruptDataBus = 0;
+		var opcodePrefix = '';
+	"""
+
+	###
+		Boilerplate generator: a helper to deal with classes of opcodes which perform
+		the same task on different types of operands: e.g. XOR B, XOR (HL), XOR nn, XOR (IX+nn).
+		This function accepts the parameter in question, and returns a set of canned strings
+		for use in the opcode runner body:
+		'getter': a block of code that performs any necessary memory access etc in order to
+			make 'v' a valid expression;
+		'v': an expression with no side effects, evaluating to the operand's value. (Must also be a valid lvalue for assignment)
+		'trunc': an expression such as '& 0xff' to truncate v back to its proper range, if appropriate
+		'setter': a block of code that writes an updated value back to its proper location, if any
+
+		Passing hasIXOffsetAlready = true indicates that we have already read the offset value of (IX+nn)/(IY+nn)
+		into a variable 'offset' (necessary because DDCB/FFCB instructions put this before the final opcode byte).
+	###
+	getParamBoilerplate = (param, hasIXOffsetAlready = false) ->
+		if param.match(/^[AFBCDEHL]|I[XY][HL]$/)
+			regNum = registerIndexes[param]
+			{
+				'getter': ''
+				'v': "regs[#{regNum}]"
+				'trunc': ''
+				'setter': ''
+			}
+		else if param == '(HL)'
+			{
+				'getter': "var val = READMEM(regPairs[#{rpHL}]);"
+				'v': 'val'
+				'trunc': '& 0xff'
+				'setter': """
+					CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+					WRITEMEM(regPairs[#{rpHL}], val);
+				"""
+			}
+		else if param == 'nn'
+			{
+				'getter': "var val = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;"
+				'v': 'val'
+				'trunc': '& 0xff'
+				'setter': ''
+			}
+		else if (match = param.match(/^\((I[XY])\+nn\)$/))
+			rp = registerPairIndexes[match[1]]
+			if hasIXOffsetAlready
+				getter = ''
+			else
+				getter = """
+					var offset = READMEM(regPairs[#{rpPC}]);
+					if (offset & 0x80) offset -= 0x100;
+					CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+					CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+					CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+					CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+					CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+					regPairs[#{rpPC}]++;
+				"""
+			getter += """
+				var addr = (regPairs[#{rp}] + offset) & 0xffff;
+				var val = READMEM(addr);
+			"""
+			{
+				'getter': getter
+				'v': 'val'
+				'trunc': '& 0xff'
+				'setter': """
+					CONTEND_READ_NO_MREQ(addr, 1);
+					WRITEMEM(addr, val);
+				"""
+			}
+		else if param == 'add'
+			# special case for incorporating ADD/SUB into DAA calculation using a custom variable 'add'
+			{
+				'getter': ''
+				'v': 'add'
+				'trunc': ''
+				'setter': ''
+			}
+		else
+			throw "Unknown param format: #{param}"
+
+	###
+		Opcode generator functions: each returns a string of Javascript that performs the opcode
+		when executed within this module's scope. Note that instructions with DDCBnn opcodes also
+		require an 'offset' variable to be defined as nn (as a signed byte).
+	###
+	ADC_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			var adctemp = regs[#{rA}] + #{operand.v} + (regs[#{rF}] & #{FLAG_C});
+			var lookup = ( (regs[#{rA}] & 0x88) >> 3 ) | ( (#{operand.v} & 0x88) >> 2 ) | ( (adctemp & 0x88) >> 1 );
+			regs[#{rA}] = adctemp;
+			regs[#{rF}] = ( adctemp & 0x100 ? #{FLAG_C} : 0 ) | halfcarryAddTable[lookup & 0x07] | overflowAddTable[lookup >> 4] | sz53Table[regs[#{rA}]];
+		"""
+
+	ADC_HL_RR = (rp2) ->
+		"""
+			var add16temp = regPairs[#{rpHL}] + regPairs[#{rp2}] + (regs[#{rF}] & #{FLAG_C});
+			var lookup = (
+				( (regPairs[#{rpHL}] & 0x8800) >> 11 ) |
+				( (regPairs[#{rp2}] & 0x8800) >> 10 ) |
+				( (add16temp & 0x8800) >>  9 )
+			);
+			regPairs[#{rpHL}] = add16temp;
+			regs[#{rF}] = (
+				(add16temp & 0x10000 ? #{FLAG_C} : 0) |
+				overflowAddTable[lookup >> 4] |
+				(regs[#{rH}] & #{FLAG_3 | FLAG_5 | FLAG_S}) |
+				halfcarryAddTable[lookup & 0x07] |
+				(regPairs[#{rpHL}] ? 0 : #{FLAG_Z})
+			);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+		"""
+
+	ADD_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			var addtemp = regs[#{rA}] + #{operand.v};
+			var lookup = ( (regs[#{rA}] & 0x88) >> 3 ) | ( (#{operand.v} & 0x88) >> 2 ) | ( (addtemp & 0x88) >> 1 );
+			regs[#{rA}] = addtemp;
+			regs[#{rF}] = ( addtemp & 0x100 ? #{FLAG_C} : 0 ) | halfcarryAddTable[lookup & 0x07] | overflowAddTable[lookup >> 4] | sz53Table[regs[#{rA}]];
+		"""
+
+	ADD_RR_RR = (rp1, rp2) ->
+		"""
+			var add16temp = regPairs[#{rp1}] + regPairs[#{rp2}];
+			var lookup = ( (regPairs[#{rp1}] & 0x0800) >> 11 ) | ( (regPairs[#{rp2}] & 0x0800) >> 10 ) | ( (add16temp & 0x0800) >>  9 );
+			regPairs[#{rp1}] = add16temp;
+			regs[#{rF}] = ( regs[#{rF}] & ( #{FLAG_V | FLAG_Z | FLAG_S} ) ) | ( add16temp & 0x10000 ? #{FLAG_C} : 0 ) | ( ( add16temp >> 8 ) & ( #{FLAG_3 | FLAG_5} ) ) | halfcarryAddTable[lookup];
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+		"""
+
+	AND_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			regs[#{rA}] &= #{operand.v};
+			regs[#{rF}] = #{FLAG_H} | sz53pTable[regs[#{rA}]];
+		"""
+
+	BIT_N_iRRpNNi = (bit, rp) -> # requires 'offset'
+		if bit == 7
+			updateSignFlag = "if (value & 0x80) regs[#{rF}] |= #{FLAG_S};"
+		else
+			updateSignFlag = ""
+
+		"""
+			var addr = (regPairs[#{rp}] + offset) & 0xffff;
+			var value = READMEM(addr);
+			regs[#{rF}] = ( regs[#{rF}] & #{FLAG_C} ) | #{FLAG_H} | ( ( addr >> 8 ) & #{FLAG_3 | FLAG_5} );
+			if ( !(value & #{0x01 << bit}) ) regs[#{rF}] |= #{FLAG_P | FLAG_Z};
+			#{updateSignFlag}
+			CONTEND_READ_NO_MREQ(addr, 1);
+		"""
+
+	BIT_N_iHLi = (bit) ->
+		if bit == 7
+			updateSignFlag = "if (value & 0x80) regs[#{rF}] |= #{FLAG_S};"
+		else
+			updateSignFlag = ""
+
+		"""
+			var addr = regPairs[#{rpHL}];
+			var value = READMEM(addr);
+			CONTEND_READ_NO_MREQ(addr, 1);
+			regs[#{rF}] = ( regs[#{rF}] & #{FLAG_C} ) | #{FLAG_H} | ( value & #{FLAG_3 | FLAG_5} );
+			if( !(value & #{0x01 << bit}) ) regs[#{rF}] |= #{FLAG_P | FLAG_Z};
+			#{updateSignFlag}
+		"""
+
+	BIT_N_R = (bit, r) ->
+		if bit == 7
+			updateSignFlag = "if (regs[#{r}] & 0x80) regs[#{rF}] |= #{FLAG_S};"
+		else
+			updateSignFlag = ""
+		"""
+			regs[#{rF}] = ( regs[#{rF}] & #{FLAG_C} ) | #{FLAG_H} | ( regs[#{r}] & #{FLAG_3 | FLAG_5} );
+			if( !(regs[#{r}] & #{0x01 << bit}) ) regs[#{rF}] |= #{FLAG_P | FLAG_Z};
+			#{updateSignFlag}
+		"""
+
+	CALL_C_NN = (flag, sense) ->
+		condition = "regs[#{rF}] & #{flag}"
+		condition = "!(#{condition})" if not sense
+		"""
+			if (#{condition}) {
+				var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+				var h = READMEM(regPairs[#{rpPC}]);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				regPairs[#{rpPC}]++;
+				regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] >> 8);
+				regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] & 0xff);
+				regPairs[#{rpPC}] = (h<<8) | l;
+			} else {
+				CONTEND_READ(regPairs[#{rpPC}], 3);
+				regPairs[#{rpPC}]++;
+				CONTEND_READ(regPairs[#{rpPC}], 3);
+				regPairs[#{rpPC}]++;
+			}
+		"""
+
+	CALL_NN = () ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			regPairs[#{rpPC}]++;
+			regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] >> 8);
+			regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] & 0xff);
+			regPairs[#{rpPC}] = (h<<8) | l;
+		"""
+
+	CCF = () ->
+		"""
+			regs[#{rF}] = ( regs[#{rF}] & #{FLAG_P | FLAG_Z | FLAG_S} ) | ( (regs[#{rF}] & #{FLAG_C}) ? #{FLAG_H} : #{FLAG_C} ) | ( regs[#{rA}] & #{FLAG_3 | FLAG_5} );
+		"""
+
+	CP_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			var cptemp = regs[#{rA}] - #{operand.v};
+			var lookup = ( (regs[#{rA}] & 0x88) >> 3 ) | ( (#{operand.v} & 0x88) >> 2 ) | ( (cptemp & 0x88) >> 1 );
+			regs[#{rF}] = ( cptemp & 0x100 ? #{FLAG_C} : ( cptemp ? 0 : #{FLAG_Z} ) ) | #{FLAG_N} | halfcarrySubTable[lookup & 0x07] | overflowSubTable[lookup >> 4] | ( #{operand.v} & #{FLAG_3 | FLAG_5} ) | ( cptemp & #{FLAG_S} );
+		"""
+
+	CPI_CPD = (modifier) ->
+		"""
+			var value = READMEM(regPairs[#{rpHL}]);
+			var bytetemp = (regs[#{rA}] - value) & 0xff;
+			var lookup = ((regs[#{rA}] & 0x08) >> 3) | ((value & 0x08) >> 2) | ((bytetemp & 0x08) >> 1);
+			var originalHL = regPairs[#{rpHL}];
+			CONTEND_READ_NO_MREQ(originalHL, 1);
+			CONTEND_READ_NO_MREQ(originalHL, 1);
+			CONTEND_READ_NO_MREQ(originalHL, 1);
+			CONTEND_READ_NO_MREQ(originalHL, 1);
+			CONTEND_READ_NO_MREQ(originalHL, 1);
+			regPairs[#{rpHL}]#{modifier}; regPairs[#{rpBC}]--;
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | (regPairs[#{rpBC}] ? #{FLAG_V | FLAG_N} : #{FLAG_N}) | halfcarrySubTable[lookup] | (bytetemp ? 0 : #{FLAG_Z}) | (bytetemp & #{FLAG_S});
+			if (regs[#{rF}] & #{FLAG_H}) bytetemp--;
+			regs[#{rF}] |= (bytetemp & #{FLAG_3}) | ( (bytetemp & 0x02) ? #{FLAG_5} : 0 );
+		"""
+
+	CPIR_CPDR = (modifier) ->
+		"""
+			#{CPI_CPD(modifier)}
+			if ((regs[#{rF}] & #{FLAG_V | FLAG_Z}) == #{FLAG_V}) {
+				regPairs[#{rpPC}] -= 2;
+				CONTEND_READ_NO_MREQ(originalHL, 1);
+				CONTEND_READ_NO_MREQ(originalHL, 1);
+				CONTEND_READ_NO_MREQ(originalHL, 1);
+				CONTEND_READ_NO_MREQ(originalHL, 1);
+				CONTEND_READ_NO_MREQ(originalHL, 1);
+			}
+		"""
+
+	CPD = () ->
+		CPI_CPD('--')
+
+	CPI = () ->
+		CPI_CPD('++')
+
+	CPDR = () ->
+		CPIR_CPDR('--')
+
+	CPIR = () ->
+		CPIR_CPDR('++')
+
+
+	DAA = () ->
+		subClause = SUB_A('add')
+		addClause = ADD_A('add')
+		"""
+			var add = 0;
+			var carry = regs[#{rF}] & #{FLAG_C};
+			if( ( regs[#{rF}] & #{FLAG_H} ) || ( ( regs[#{rA}] & 0x0f ) > 9 ) ) add = 6;
+			if( carry || ( regs[#{rA}] > 0x99 ) ) add |= 0x60;
+			if( regs[#{rA}] > 0x99 ) carry = #{FLAG_C};
+			if( regs[#{rF}] & #{FLAG_N} ) {
+				#{subClause}
+			} else {
+				#{addClause}
+			}
+			regs[#{rF}] = ( regs[#{rF}] & #{~( FLAG_C | FLAG_P )} ) | carry | parityTable[regs[#{rA}]];
+		"""
+
+	CPL = () ->
+		"""
+			regs[#{rA}] ^= 0xff;
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C | FLAG_P | FLAG_Z | FLAG_S}) | (regs[#{rA}] & #{FLAG_3 | FLAG_5}) | #{FLAG_N | FLAG_H};
+		"""
+
+	DEC = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C} ) | ( #{operand.v} & 0x0f ? 0 : #{FLAG_H} ) | #{FLAG_N};
+			#{operand.v} = (#{operand.v} - 1) #{operand.trunc};
+
+			#{operand.setter}
+			regs[#{rF}] |= (#{operand.v} == 0x7f ? #{FLAG_V} : 0) | sz53Table[#{operand.v}];
+		"""
+
+	DEC_RR = (rp) ->
+		"""
+			regPairs[#{rp}]--;
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+		"""
+
+	DI = () ->
+		"""
+			iff1 = iff2 = 0;
+		"""
+
+	DJNZ_N = () ->
+		"""
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			regs[#{rB}]--;
+			if (regs[#{rB}]) {
+				/* take branch */
+				var offset = READMEM(regPairs[#{rpPC}]);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				regPairs[#{rpPC}]++;
+				regPairs[#{rpPC}] += (offset & 0x80 ? offset - 0x100 : offset);
+			} else {
+				/* do not take branch */
+				CONTEND_READ(regPairs[#{rpPC}], 3);
+				regPairs[#{rpPC}]++;
+			}
+		"""
+
+	EI = () ->
+		"""
+			iff1 = iff2 = 1;
+			interruptible = false;
+		"""
+
+	EX_iSPi_RR = (rp) ->
+		"""
+			var l = READMEM(regPairs[#{rpSP}]);
+			var spPlus1 = (regPairs[#{rpSP}] + 1) & 0xffff;
+			var h = READMEM(spPlus1);
+			CONTEND_READ_NO_MREQ(spPlus1, 1);
+			WRITEMEM(spPlus1, regPairs[#{rp}] >> 8);
+			WRITEMEM(regPairs[#{rpSP}], regPairs[#{rp}] & 0xff);
+			regPairs[#{rp}] = (h<<8) | l;
+			CONTEND_WRITE_NO_MREQ(regPairs[#{rpSP}], 1);
+			CONTEND_WRITE_NO_MREQ(regPairs[#{rpSP}], 1);
+		"""
+
+	EX_RR_RR = (rp1, rp2) ->
+		"""
+			var temp = regPairs[#{rp1}];
+			regPairs[#{rp1}] = regPairs[#{rp2}];
+			regPairs[#{rp2}] = temp;
+		"""
+
+	EXX = () ->
+		"""
+			var wordtemp;
+			wordtemp = regPairs[#{rpBC}]; regPairs[#{rpBC}] = regPairs[#{rpBC_}]; regPairs[#{rpBC_}] = wordtemp;
+			wordtemp = regPairs[#{rpDE}]; regPairs[#{rpDE}] = regPairs[#{rpDE_}]; regPairs[#{rpDE_}] = wordtemp;
+			wordtemp = regPairs[#{rpHL}]; regPairs[#{rpHL}] = regPairs[#{rpHL_}]; regPairs[#{rpHL_}] = wordtemp;
+		"""
+
+	HALT = () ->
+		"""
+			halted = true;
+			regPairs[#{rpPC}]--;
+		"""
+
+	IM = (val) ->
+		"""
+			im = #{val};
+		"""
+
+	IN_A_N = () ->
+		"""
+			var val = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var port = (regs[#{rA}] << 8) | val;
+			CONTEND_PORT_EARLY(port);
+			regs[#{rA}] = ioBus.read(port);
+			CONTEND_PORT_LATE(port);
+		"""
+
+	IN_F_iCi = () ->
+		# as IN_R_iCi, but result is written to a local variable rather than a register
+		"""
+			var port = regPairs[#{rpBC}];
+			CONTEND_PORT_EARLY(port);
+			var result = ioBus.read(port);
+			CONTEND_PORT_LATE(port);
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | sz53pTable[result];
+		"""
+
+	IN_R_iCi = (r) ->
+		"""
+			var port = regPairs[#{rpBC}];
+			CONTEND_PORT_EARLY(port);
+			regs[#{r}] = ioBus.read(port);
+			CONTEND_PORT_LATE(port);
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | sz53pTable[regs[#{r}]];
+		"""
+
+	INC = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | (#{operand.v} & 0x0f ? 0 : #{FLAG_H}) | #{FLAG_N};
+			#{operand.v} = (#{operand.v} + 1) #{operand.trunc};
+
+			#{operand.setter}
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | ( #{operand.v} == 0x80 ? #{FLAG_V} : 0 ) | ( #{operand.v} & 0x0f ? 0 : #{FLAG_H} ) | sz53Table[#{operand.v}];
+		"""
+
+	INC_RR = (rp) ->
+		"""
+			regPairs[#{rp}]++;
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+		"""
+
+	INI_IND = (modifier) ->
+		"""
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_PORT_EARLY(regPairs[#{rpBC}]);
+			var initemp = ioBus.read(regPairs[#{rpBC}]);
+			CONTEND_PORT_LATE(regPairs[#{rpBC}]);
+			WRITEMEM(regPairs[#{rpHL}], initemp);
+			regs[#{rB}]--;
+			var originalHL = regPairs[#{rpHL}];
+			regPairs[#{rpHL}]#{modifier}#{modifier};
+			var initemp2 = (initemp + regs[#{rC}] #{modifier} 1) & 0xff;
+
+			regs[#{rF}] = (initemp & 0x80 ? #{FLAG_N} : 0) | ((initemp2 < initemp) ? #{FLAG_H | FLAG_C} : 0 ) | ( parityTable[ (initemp2 & 0x07) ^ regs[#{rB}] ] ? #{FLAG_P} : 0 ) | sz53Table[regs[#{rB}]];
+		"""
+
+	INIR_INDR = (modifier) ->
+		"""
+			#{INI_IND(modifier)}
+			if (regs[#{rB}]) {
+				CONTEND_WRITE_NO_MREQ(originalHL, 1);
+				CONTEND_WRITE_NO_MREQ(originalHL, 1);
+				CONTEND_WRITE_NO_MREQ(originalHL, 1);
+				CONTEND_WRITE_NO_MREQ(originalHL, 1);
+				CONTEND_WRITE_NO_MREQ(originalHL, 1);
+				regPairs[#{rpPC}] -= 2;
+			}
+		"""
+
+	INI = () ->
+		INI_IND('+')
+
+	IND = () ->
+		INI_IND('-')
+
+	INIR = () ->
+		INIR_INDR('+')
+
+	INDR = () ->
+		INIR_INDR('-')
+
+	JP_C_NN = (flag, sense) ->
+		condition = "regs[#{rF}] & #{flag}"
+		condition = "!(#{condition})" if not sense
+		"""
+			if (#{condition}) {
+				var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+				var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+				regPairs[#{rpPC}] = (h<<8) | l;
+			} else {
+				CONTEND_READ(regPairs[#{rpPC}], 3);
+				regPairs[#{rpPC}]++;
+				CONTEND_READ(regPairs[#{rpPC}], 3);
+				regPairs[#{rpPC}]++;
+			}
+		"""
+
+	JP_RR = (rp) ->
+		"""
+			regPairs[#{rpPC}] = regPairs[#{rp}];
+		"""
+
+	JP_NN = () ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			regPairs[#{rpPC}] = (h<<8) | l;
+		"""
+
+	JR_C_N = (flag, sense) ->
+		condition = "regs[#{rF}] & #{flag}"
+		condition = "!(#{condition})" if not sense
+		"""
+			if (#{condition}) {
+				var offset = READMEM(regPairs[#{rpPC}]);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+				regPairs[#{rpPC}]++;
+				regPairs[#{rpPC}] += (offset & 0x80 ? offset - 0x100 : offset);
+			} else {
+				CONTEND_READ(regPairs[#{rpPC}], 3);
+				regPairs[#{rpPC}]++; /* skip past offset byte */
+			}
+		"""
+
+	JR_N = () ->
+		"""
+			var offset = READMEM(regPairs[#{rpPC}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			regPairs[#{rpPC}]++;
+			regPairs[#{rpPC}] += (offset & 0x80 ? offset - 0x100 : offset);
+		"""
+
+	LD_A_iNNi = () ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var addr = (h<<8) | l;
+			regs[#{rA}] = READMEM(addr);
+		"""
+
+	LD_iNNi_A = () ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var addr = (h<<8) | l;
+			WRITEMEM(addr, regs[#{rA}]);
+		"""
+
+	LD_iNNi_RR = (rp) ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var addr = (h<<8) | l;
+			WRITEMEM(addr, regPairs[#{rp}] & 0xff);
+			addr = (addr + 1) & 0xffff;
+			WRITEMEM(addr, regPairs[#{rp}] >> 8);
+		"""
+
+	LD_iRRi_N = (rp) ->
+		"""
+			var n = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			WRITEMEM(regPairs[#{rp}], n);
+		"""
+
+	LD_iRRi_R = (rp, r) ->
+		"""
+			WRITEMEM(regPairs[#{rp}], regs[#{r}]);
+		"""
+
+	LD_iRRpNNi_N = (rp) ->
+		"""
+			var offset = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			if (offset & 0x80) offset -= 0x100;
+			var addr = (regPairs[#{rp}] + offset) & 0xffff;
+
+			var val = READMEM(regPairs[#{rpPC}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			regPairs[#{rpPC}]++;
+			WRITEMEM(addr, val);
+		"""
+
+	LD_iRRpNNi_R = (rp, r) ->
+		"""
+			var offset = READMEM(regPairs[#{rpPC}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			regPairs[#{rpPC}]++;
+			if (offset & 0x80) offset -= 0x100;
+			var addr = (regPairs[#{rp}] + offset) & 0xffff;
+
+			WRITEMEM(addr, regs[#{r}]);
+		"""
+
+	LD_R_iRRi = (r, rp) ->
+		"""
+			regs[#{r}] = READMEM(regPairs[#{rp}]);
+		"""
+
+	LD_R_iRRpNNi = (r, rp) ->
+		"""
+			var offset = READMEM(regPairs[#{rpPC}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+			regPairs[#{rpPC}]++;
+			if (offset & 0x80) offset -= 0x100;
+			var addr = (regPairs[#{rp}] + offset) & 0xffff;
+
+			regs[#{r}] = READMEM(addr);
+		"""
+
+	LD_R_N = (r) ->
+		"""
+			regs[#{r}] = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+		"""
+
+	LD_R_R = (r1, r2) ->
+		if r1 == rI || r2 == rI || r1 == rR || r2 == rR
+			output = """
+				CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+				regs[#{r1}] = regs[#{r2}];
+			"""
+			if (r1 == rA)
+				output += """
+					regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | sz53Table[regs[#{rA}]] | ( iff2 ? #{FLAG_V} : 0 );
+				"""
+			output
+		else
+			"""
+				regs[#{r1}] = regs[#{r2}];
+			"""
+
+	LD_RR_iNNi = (rp, shifted) ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var addr = (h<<8) | l;
+			l = READMEM(addr);
+			addr = (addr + 1) & 0xffff;
+			h = READMEM(addr);
+			regPairs[#{rp}] = (h<<8) | l;
+		"""
+
+	LD_RR_NN = (rp) ->
+		"""
+			var l = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			var h = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			regPairs[#{rp}] = (h<<8) | l;
+		"""
+
+	LD_RR_RR = (rp1, rp2) ->
+		# only used for LD SP,HL/IX/IY
+		"""
+			regPairs[#{rp1}] = regPairs[#{rp2}];
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+		"""
+
+	LDBITOP = (regName, opcode, bit, rp) ->
+		# load (rp+nn) into register regName, perform opcode, write back to (rp+nn)
+		regNum = registerIndexes[regName]
+		"""
+			var addr = (regPairs[#{rp}] + offset) & 0xffff;
+			regs[#{regNum}] = READMEM(addr);
+			#{opcode(bit, regName)}
+			CONTEND_READ_NO_MREQ(addr, 1);
+			WRITEMEM(addr, regs[#{regNum}]);
+		"""
+
+	LDI_LDD = (modifier) ->
+		"""
+			var bytetemp = READMEM(regPairs[#{rpHL}]);
+			regPairs[#{rpBC}]--;
+			WRITEMEM(regPairs[#{rpDE}],bytetemp);
+			var originalDE = regPairs[#{rpDE}];
+			regPairs[#{rpDE}]#{modifier}; regPairs[#{rpHL}]#{modifier};
+			bytetemp = (bytetemp + regs[#{rA}]) & 0xff;
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C | FLAG_Z | FLAG_S}) | (regPairs[#{rpBC}] ? #{FLAG_V} : 0) | (bytetemp & #{FLAG_3}) | ((bytetemp & 0x02) ? #{FLAG_5} : 0);
+			CONTEND_READ_NO_MREQ(originalDE, 1);
+			CONTEND_READ_NO_MREQ(originalDE, 1);
+		"""
+
+	LDIR_LDDR = (modifier) ->
+		"""
+			#{LDI_LDD(modifier)}
+			if (regPairs[#{rpBC}]) {
+				regPairs[#{rpPC}]-=2;
+				CONTEND_READ_NO_MREQ(originalDE, 1);
+				CONTEND_READ_NO_MREQ(originalDE, 1);
+				CONTEND_READ_NO_MREQ(originalDE, 1);
+				CONTEND_READ_NO_MREQ(originalDE, 1);
+				CONTEND_READ_NO_MREQ(originalDE, 1);
+			}
+		"""
+
+	LDI = () ->
+		LDI_LDD('++')
+
+	LDD = () ->
+		LDI_LDD('--')
+
+	LDIR = () ->
+		LDIR_LDDR('++')
+
+	LDDR = () ->
+		LDIR_LDDR('--')
+
+	LDSHIFTOP = (regName, opcode, rp) ->
+		# load (rp+nn) into register regName, perform opcode, write back to (rp+nn)
+		regNum = registerIndexes[regName]
+		"""
+			var addr = (regPairs[#{rp}] + offset) & 0xffff;
+			regs[#{regNum}] = READMEM(addr);
+			#{opcode(regName)}
+			CONTEND_READ_NO_MREQ(addr, 1);
+			WRITEMEM(addr, regs[#{regNum}]);
+		"""
+
+	NEG = () ->
+		"""
+			var val = regs[#{rA}];
+			var subtemp = -val;
+			var lookup = ( (val & 0x88) >> 2 ) | ( (subtemp & 0x88) >> 1 );
+			regs[#{rA}] = subtemp;
+			regs[#{rF}] = ( subtemp & 0x100 ? #{FLAG_C} : 0 ) | #{FLAG_N} | halfcarrySubTable[lookup & 0x07] | overflowSubTable[lookup >> 4] | sz53Table[regs[#{rA}]];
+		"""
+
+	NOP = () ->
+		"""
+		"""
+
+	OR_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+
+			regs[#{rA}] |= #{operand.v};
+			regs[#{rF}] = sz53pTable[regs[#{rA}]];
+		"""
+
+	OUT_iCi_0 = (r) ->
+		"""
+			CONTEND_PORT_EARLY(regPairs[#{rpBC}]);
+			ioBus.write(regPairs[#{rpBC}], 0, tstates);
+			CONTEND_PORT_LATE(regPairs[#{rpBC}]);
+		"""
+
+	OUT_iCi_R = (r) ->
+		"""
+			CONTEND_PORT_EARLY(regPairs[#{rpBC}]);
+			ioBus.write(regPairs[#{rpBC}], regs[#{r}], tstates);
+			CONTEND_PORT_LATE(regPairs[#{rpBC}]);
+		"""
+
+	OUT_iNi_A = () ->
+		"""
+			var port = (regs[#{rA}] << 8) | READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+			CONTEND_PORT_EARLY(port);
+			ioBus.write(port, regs[#{rA}], tstates);
+			CONTEND_PORT_LATE(port);
+		"""
+
+	OUTI_OUTD = (modifier) ->
+		"""
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			var outitemp = READMEM(regPairs[#{rpHL}]);
+			regs[#{rB}]--;	/* This does happen first, despite what the specs say */
+			CONTEND_PORT_EARLY(regPairs[#{rpBC}]);
+			ioBus.write(regPairs[#{rpBC}], outitemp, tstates);
+			CONTEND_PORT_LATE(regPairs[#{rpBC}]);
+
+			regPairs[#{rpHL}]#{modifier};
+			outitemp2 = (outitemp + regs[#{rL}]) & 0xff;
+			regs[#{rF}] = (outitemp & 0x80 ? #{FLAG_N} : 0) | ( (outitemp2 < outitemp) ? #{FLAG_H | FLAG_C} : 0) | (parityTable[ (outitemp2 & 0x07) ^ regs[#{rB}] ] ? #{FLAG_P} : 0 ) | sz53Table[ regs[#{rB}] ];
+		"""
+
+	OTIR_OTDR = (modifier) ->
+		"""
+			#{OUTI_OUTD(modifier)}
+			if (regs[#{rB}]) {
+				regPairs[#{rpPC}]-=2;
+				CONTEND_READ_NO_MREQ(regPairs[#{rpBC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpBC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpBC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpBC}], 1);
+				CONTEND_READ_NO_MREQ(regPairs[#{rpBC}], 1);
+			}
+		"""
+
+	OUTD = () ->
+		OUTI_OUTD('--');
+
+	OUTI = () ->
+		OUTI_OUTD('++');
+
+	OTDR = () ->
+		OTIR_OTDR('--');
+
+	OTIR = () ->
+		OTIR_OTDR('++');
+
+	POP_RR = (rp) ->
+		"""
+			var l = READMEM(regPairs[#{rpSP}]); regPairs[#{rpSP}]++;
+			var h = READMEM(regPairs[#{rpSP}]); regPairs[#{rpSP}]++;
+			regPairs[#{rp}] = (h<<8) | l;
+		"""
+
+	PUSH_RR = (rp) ->
+		"""
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rp}] >> 8);
+			regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rp}] & 0xff);
+		"""
+
+	RES = (bit, param) ->
+		operand = getParamBoilerplate(param, true)
+		hexMask = 0xff ^ (1 << bit)
+		"""
+			#{operand.getter}
+			#{operand.v} &= #{hexMask};
+			#{operand.setter}
+		"""
+
+	RET = () ->
+		"""
+			var l = READMEM(regPairs[#{rpSP}]); regPairs[#{rpSP}]++;
+			var h = READMEM(regPairs[#{rpSP}]); regPairs[#{rpSP}]++;
+			regPairs[#{rpPC}] = (h<<8) | l;
+		"""
+
+	RET_C = (flag, sense) ->
+		condition = "regs[#{rF}] & #{flag}"
+		condition = "!(#{condition})" if not sense
+		"""
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			if (#{condition}) {
+				var l = READMEM(regPairs[#{rpSP}]); regPairs[#{rpSP}]++;
+				var h = READMEM(regPairs[#{rpSP}]); regPairs[#{rpSP}]++;
+				regPairs[#{rpPC}] = (h<<8) | l;
+			}
+		"""
+
+	RETN = () ->
+		"""
+			iff1 = iff2;
+			#{RET()}
+		"""
+
+	RL = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			var rltemp = #{operand.v};
+			#{operand.v} = ( (#{operand.v} << 1) | (regs[#{rF}] & #{FLAG_C}) ) #{operand.trunc};
+			regs[#{rF}] = ( rltemp >> 7 ) | sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	RLA = () ->
+		"""
+			var bytetemp = regs[#{rA}];
+			regs[#{rA}] = (regs[#{rA}] << 1) | (regs[#{rF}] & #{FLAG_C});
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_P | FLAG_Z | FLAG_S}) | (regs[#{rA}] & #{FLAG_3 | FLAG_5}) | (bytetemp >> 7);
+		"""
+
+	RLC = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			#{operand.v} = ( (#{operand.v} << 1) | (#{operand.v} >> 7) ) #{operand.trunc};
+			regs[#{rF}] = (#{operand.v} & #{FLAG_C}) | sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	RLD = () ->
+		"""
+			var bytetemp =  READMEM(regPairs[#{rpHL}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			var val = (bytetemp << 4) | (regs[#{rA}] & 0x0f);
+			WRITEMEM(regPairs[#{rpHL}], val);
+			regs[#{rA}] = (regs[#{rA}] & 0xf0) | (bytetemp >> 4);
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | sz53pTable[regs[#{rA}]];
+		"""
+
+	RLCA = () ->
+		"""
+			regs[#{rA}] = (regs[#{rA}] << 1) | (regs[#{rA}] >> 7);
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_P | FLAG_Z | FLAG_S}) | (regs[#{rA}] & #{FLAG_C | FLAG_3 | FLAG_5});
+		"""
+
+	RR = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			var rrtemp = #{operand.v};
+			#{operand.v} = ( (#{operand.v} >> 1) | ( regs[#{rF}] << 7 ) ) #{operand.trunc};
+			regs[#{rF}] = (rrtemp & #{FLAG_C}) | sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	RRA = () ->
+		"""
+			var bytetemp = regs[#{rA}];
+			regs[#{rA}] = (bytetemp >> 1) | (regs[#{rF}] << 7);
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_P | FLAG_Z | FLAG_S}) | (regs[#{rA}] & #{FLAG_3 | FLAG_5}) | (bytetemp & #{FLAG_C});
+		"""
+
+	RRC = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			regs[#{rF}] = #{operand.v} & #{FLAG_C};
+			#{operand.v} = ( (#{operand.v} >> 1) | (#{operand.v} << 7) ) #{operand.trunc};
+			regs[#{rF}] |= sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	RRCA = () ->
+		"""
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_P | FLAG_Z | FLAG_S}) | (regs[#{rA}] & #{FLAG_C});
+			regs[#{rA}] = (regs[#{rA}] >> 1) | (regs[#{rA}] << 7);
+			regs[#{rF}] |= (regs[#{rA}] & #{FLAG_3 | FLAG_5});
+		"""
+
+	RRD = () ->
+		"""
+			var bytetemp = READMEM(regPairs[#{rpHL}]);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpHL}], 1);
+			var val = (regs[#{rA}] << 4) | (bytetemp >> 4);
+			WRITEMEM(regPairs[#{rpHL}], val);
+			regs[#{rA}] = (regs[#{rA}] & 0xf0) | (bytetemp & 0x0f);
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_C}) | sz53pTable[regs[#{rA}]];
+		"""
+
+	RST = (addr) ->
+		"""
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] >> 8);
+			regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] & 0xff);
+			regPairs[#{rpPC}] = #{addr};
+		"""
+
+	SBC_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+			var sbctemp = regs[#{rA}] - #{operand.v} - (regs[#{rF}] & #{FLAG_C});
+			var lookup = ( (regs[#{rA}] & 0x88) >> 3 ) | ( (#{operand.v} & 0x88) >> 2 ) | ( (sbctemp & 0x88) >> 1 );
+			regs[#{rA}] = sbctemp;
+			regs[#{rF}] = ( sbctemp & 0x100 ? #{FLAG_C} : 0 ) | #{FLAG_N} | halfcarrySubTable[lookup & 0x07] | overflowSubTable[lookup >> 4] | sz53Table[regs[#{rA}]];
+		"""
+
+	SBC_HL_RR = (rp) ->
+		"""
+			var sub16temp = regPairs[#{rpHL}] - regPairs[#{rp}] - (regs[#{rF}] & #{FLAG_C});
+			var lookup = ( (regPairs[#{rpHL}] & 0x8800) >> 11 ) | ( (regPairs[#{rp}] & 0x8800) >> 10 ) | ( (sub16temp & 0x8800) >>  9 );
+			regPairs[#{rpHL}] = sub16temp;
+			regs[#{rF}] = ( sub16temp & 0x10000 ? #{FLAG_C} : 0 ) | #{FLAG_N} | overflowSubTable[lookup >> 4] | (regs[#{rH}] & #{FLAG_3 | FLAG_5 | FLAG_S}) | halfcarrySubTable[lookup&0x07] | (regPairs[#{rpHL}] ? 0 : #{FLAG_Z});
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+			CONTEND_READ_NO_MREQ(regPairs[#{rpIR}], 1);
+		"""
+
+	SCF = () ->
+		"""
+			regs[#{rF}] = (regs[#{rF}] & #{FLAG_P | FLAG_Z | FLAG_S}) | (regs[#{rA}] & #{FLAG_3 | FLAG_5}) | #{FLAG_C};
+		"""
+
+	SET = (bit, param) ->
+		hexMask = 1 << bit
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			#{operand.v} |= #{hexMask};
+			#{operand.setter}
+		"""
+
+	SHIFT = (prefix) ->
+		# Fake instruction for shifted opcodes - passes control to a secondary opcode table
+		"""
+			opcodePrefix = '#{prefix}';
+			interruptible = false;
+		"""
+
+	SLA = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			regs[#{rF}] = #{operand.v} >> 7;
+			#{operand.v} = (#{operand.v} << 1) #{operand.trunc};
+			regs[#{rF}] |= sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	SLL = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			regs[#{rF}] =  #{operand.v} >> 7;
+			#{operand.v} = (((#{operand.v}) << 1) #{operand.trunc}) | 0x01;
+			regs[#{rF}] |= sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	SRA = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			regs[#{rF}] = #{operand.v} & #{FLAG_C};
+			#{operand.v} = ( (#{operand.v} & 0x80) | (#{operand.v} >> 1) ) #{operand.trunc};
+			regs[#{rF}] |= sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	SRL = (param) ->
+		operand = getParamBoilerplate(param, true)
+		"""
+			#{operand.getter}
+			regs[#{rF}] =  #{operand.v} & #{FLAG_C};
+			#{operand.v} >>= 1;
+			regs[#{rF}] |= sz53pTable[#{operand.v}];
+			#{operand.setter}
+		"""
+
+	SUB_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+			var subtemp = regs[#{rA}] - #{operand.v};
+			var lookup = ( (regs[#{rA}] & 0x88) >> 3 ) | ( (#{operand.v} & 0x88) >> 2 ) | ( (subtemp & 0x88) >> 1 );
+			regs[#{rA}] = subtemp;
+			regs[#{rF}] = ( subtemp & 0x100 ? #{FLAG_C} : 0 ) | #{FLAG_N} | halfcarrySubTable[lookup & 0x07] | overflowSubTable[lookup >> 4] | sz53Table[regs[#{rA}]];
+		"""
+
+	XOR_A = (param) ->
+		operand = getParamBoilerplate(param)
+		"""
+			#{operand.getter}
+			regs[#{rA}] ^= #{operand.v};
+			regs[#{rF}] = sz53pTable[regs[#{rA}]];
+		"""
+
+	###
+	Given a table mapping opcodes to Javascript snippets (and optionally a fallback
+	table for opcodes that aren't defined in the first one), build an enormous
+	switch statement for them
+	###
+	opcodeSwitch = (runStringTable, fallbackTable = {}, traps = []) ->
+		clauses = []
+		for i in [0...0x100]
+			runString = runStringTable[i]
+			if not runString?
+				runString = fallbackTable[i]
+			if runString?
+				relevantTraps = ([address, action] for [address, opcode, action] in traps when opcode == i)
+				trapCode = (
+					"if (regPairs[#{rpPC}] == #{(address + 1) & 0xffff} && !(#{action})) break;" for [address, action] in relevantTraps
+				)
+				clauses.push """
+					case #{i}:
+						#{trapCode.join("\n")}
+						#{runString}
+						break;
+				"""
+		"""
+			switch (opcode) {
+				#{clauses.join('')}
+				default:
+					var addr = regPairs[#{rpPC}] - 1;
+					throw("Unimplemented opcode " + opcode + " in page #{runStringTable[0x100]} - PC = " + addr);
+			}
+		"""
+
+	# Tables mapping opcodes to Javascript snippets
+	OPCODE_RUN_STRINGS_CB = {
+		0x00: RLC "B"         # RLC B
+		0x01: RLC "C"         # RLC C
+		0x02: RLC "D"         # RLC D
+		0x03: RLC "E"         # RLC E
+		0x04: RLC "H"         # RLC H
+		0x05: RLC "L"         # RLC L
+		0x06: RLC "(HL)"         # RLC (HL)
+		0x07: RLC "A"         # RLC A
+		0x08: RRC "B"         # RRC B
+		0x09: RRC "C"         # RRC C
+		0x0a: RRC "D"         # RRC D
+		0x0b: RRC "E"         # RRC E
+		0x0c: RRC "H"         # RRC H
+		0x0d: RRC "L"         # RRC L
+		0x0e: RRC "(HL)"         # RRC (HL)
+		0x0f: RRC "A"         # RRC A
+		0x10: RL 'B'         # RL B
+		0x11: RL 'C'         # RL C
+		0x12: RL 'D'         # RL D
+		0x13: RL 'E'         # RL E
+		0x14: RL 'H'         # RL H
+		0x15: RL 'L'         # RL L
+		0x16: RL '(HL)'         # RL (HL)
+		0x17: RL 'A'         # RL A
+		0x18: RR 'B'         # RR B
+		0x19: RR 'C'         # RR C
+		0x1a: RR 'D'         # RR D
+		0x1b: RR 'E'         # RR E
+		0x1c: RR 'H'         # RR H
+		0x1d: RR 'L'         # RR L
+		0x1e: RR '(HL)'         # RR (HL)
+		0x1f: RR 'A'         # RR A
+		0x20: SLA 'B'         # SLA B
+		0x21: SLA 'C'         # SLA C
+		0x22: SLA 'D'         # SLA D
+		0x23: SLA 'E'         # SLA E
+		0x24: SLA 'H'         # SLA H
+		0x25: SLA 'L'         # SLA L
+		0x26: SLA '(HL)'         # SLA (HL)
+		0x27: SLA 'A'         # SLA A
+		0x28: SRA 'B'         # SRA B
+		0x29: SRA 'C'         # SRA C
+		0x2a: SRA 'D'         # SRA D
+		0x2b: SRA 'E'         # SRA E
+		0x2c: SRA 'H'         # SRA H
+		0x2d: SRA 'L'         # SRA L
+		0x2e: SRA '(HL)'         # SRA (HL)
+		0x2f: SRA 'A'         # SRA A
+		0x30: SLL 'B'         # SLL B
+		0x31: SLL 'C'         # SLL C
+		0x32: SLL 'D'         # SLL D
+		0x33: SLL 'E'         # SLL E
+		0x34: SLL 'H'         # SLL H
+		0x35: SLL 'L'         # SLL L
+		0x36: SLL '(HL)'         # SLL (HL)
+		0x37: SLL 'A'         # SLL A
+		0x38: SRL 'B'         # SRL B
+		0x39: SRL 'C'         # SRL C
+		0x3a: SRL 'D'         # SRL D
+		0x3b: SRL 'E'         # SRL E
+		0x3c: SRL 'H'         # SRL H
+		0x3d: SRL 'L'         # SRL L
+		0x3e: SRL '(HL)'         # SRL (HL)
+		0x3f: SRL 'A'         # SRL A
+		0x40: BIT_N_R(0, rB)        # BIT 0,B
+		0x41: BIT_N_R(0, rC)        # BIT 0,C
+		0x42: BIT_N_R(0, rD)        # BIT 0,D
+		0x43: BIT_N_R(0, rE)        # BIT 0,E
+		0x44: BIT_N_R(0, rH)        # BIT 0,H
+		0x45: BIT_N_R(0, rL)        # BIT 0,L
+		0x46: BIT_N_iHLi(0)        # BIT 0,(HL)
+		0x47: BIT_N_R(0, rA)        # BIT 0,A
+		0x48: BIT_N_R(1, rB)        # BIT 1,B
+		0x49: BIT_N_R(1, rC)        # BIT 1,C
+		0x4A: BIT_N_R(1, rD)        # BIT 1,D
+		0x4B: BIT_N_R(1, rE)        # BIT 1,E
+		0x4C: BIT_N_R(1, rH)        # BIT 1,H
+		0x4D: BIT_N_R(1, rL)        # BIT 1,L
+		0x4E: BIT_N_iHLi(1)        # BIT 1,(HL)
+		0x4F: BIT_N_R(1, rA)        # BIT 1,A
+		0x50: BIT_N_R(2, rB)        # BIT 2,B
+		0x51: BIT_N_R(2, rC)        # BIT 2,C
+		0x52: BIT_N_R(2, rD)        # BIT 2,D
+		0x53: BIT_N_R(2, rE)        # BIT 2,E
+		0x54: BIT_N_R(2, rH)        # BIT 2,H
+		0x55: BIT_N_R(2, rL)        # BIT 2,L
+		0x56: BIT_N_iHLi(2)        # BIT 2,(HL)
+		0x57: BIT_N_R(2, rA)        # BIT 2,A
+		0x58: BIT_N_R(3, rB)        # BIT 3,B
+		0x59: BIT_N_R(3, rC)        # BIT 3,C
+		0x5A: BIT_N_R(3, rD)        # BIT 3,D
+		0x5B: BIT_N_R(3, rE)        # BIT 3,E
+		0x5C: BIT_N_R(3, rH)        # BIT 3,H
+		0x5D: BIT_N_R(3, rL)        # BIT 3,L
+		0x5E: BIT_N_iHLi(3)        # BIT 3,(HL)
+		0x5F: BIT_N_R(3, rA)        # BIT 3,A
+		0x60: BIT_N_R(4, rB)        # BIT 4,B
+		0x61: BIT_N_R(4, rC)        # BIT 4,C
+		0x62: BIT_N_R(4, rD)        # BIT 4,D
+		0x63: BIT_N_R(4, rE)        # BIT 4,E
+		0x64: BIT_N_R(4, rH)        # BIT 4,H
+		0x65: BIT_N_R(4, rL)        # BIT 4,L
+		0x66: BIT_N_iHLi(4)        # BIT 4,(HL)
+		0x67: BIT_N_R(4, rA)        # BIT 4,A
+		0x68: BIT_N_R(5, rB)        # BIT 5,B
+		0x69: BIT_N_R(5, rC)        # BIT 5,C
+		0x6A: BIT_N_R(5, rD)        # BIT 5,D
+		0x6B: BIT_N_R(5, rE)        # BIT 5,E
+		0x6C: BIT_N_R(5, rH)        # BIT 5,H
+		0x6D: BIT_N_R(5, rL)        # BIT 5,L
+		0x6E: BIT_N_iHLi(5)        # BIT 5,(HL)
+		0x6F: BIT_N_R(5, rA)        # BIT 5,A
+		0x70: BIT_N_R(6, rB)        # BIT 6,B
+		0x71: BIT_N_R(6, rC)        # BIT 6,C
+		0x72: BIT_N_R(6, rD)        # BIT 6,D
+		0x73: BIT_N_R(6, rE)        # BIT 6,E
+		0x74: BIT_N_R(6, rH)        # BIT 6,H
+		0x75: BIT_N_R(6, rL)        # BIT 6,L
+		0x76: BIT_N_iHLi(6)        # BIT 6,(HL)
+		0x77: BIT_N_R(6, rA)        # BIT 6,A
+		0x78: BIT_N_R(7, rB)        # BIT 7,B
+		0x79: BIT_N_R(7, rC)        # BIT 7,C
+		0x7A: BIT_N_R(7, rD)        # BIT 7,D
+		0x7B: BIT_N_R(7, rE)        # BIT 7,E
+		0x7C: BIT_N_R(7, rH)        # BIT 7,H
+		0x7D: BIT_N_R(7, rL)        # BIT 7,L
+		0x7E: BIT_N_iHLi(7)        # BIT 7,(HL)
+		0x7F: BIT_N_R(7, rA)        # BIT 7,A
+		0x80: RES 0, 'B'         # RES 0,B
+		0x81: RES 0, 'C'         # RES 0,C
+		0x82: RES 0, 'D'         # RES 0,D
+		0x83: RES 0, 'E'         # RES 0,E
+		0x84: RES 0, 'H'         # RES 0,H
+		0x85: RES 0, 'L'         # RES 0,L
+		0x86: RES 0, '(HL)'         # RES 0,(HL)
+		0x87: RES 0, 'A'         # RES 0,A
+		0x88: RES 1, 'B'         # RES 1,B
+		0x89: RES 1, 'C'         # RES 1,C
+		0x8A: RES 1, 'D'         # RES 1,D
+		0x8B: RES 1, 'E'         # RES 1,E
+		0x8C: RES 1, 'H'         # RES 1,H
+		0x8D: RES 1, 'L'         # RES 1,L
+		0x8E: RES 1, '(HL)'         # RES 1,(HL)
+		0x8F: RES 1, 'A'         # RES 1,A
+		0x90: RES 2, 'B'         # RES 2,B
+		0x91: RES 2, 'C'         # RES 2,C
+		0x92: RES 2, 'D'         # RES 2,D
+		0x93: RES 2, 'E'         # RES 2,E
+		0x94: RES 2, 'H'         # RES 2,H
+		0x95: RES 2, 'L'         # RES 2,L
+		0x96: RES 2, '(HL)'         # RES 2,(HL)
+		0x97: RES 2, 'A'         # RES 2,A
+		0x98: RES 3, 'B'         # RES 3,B
+		0x99: RES 3, 'C'         # RES 3,C
+		0x9A: RES 3, 'D'         # RES 3,D
+		0x9B: RES 3, 'E'         # RES 3,E
+		0x9C: RES 3, 'H'         # RES 3,H
+		0x9D: RES 3, 'L'         # RES 3,L
+		0x9E: RES 3, '(HL)'         # RES 3,(HL)
+		0x9F: RES 3, 'A'         # RES 3,A
+		0xA0: RES 4, 'B'         # RES 4,B
+		0xA1: RES 4, 'C'         # RES 4,C
+		0xA2: RES 4, 'D'         # RES 4,D
+		0xA3: RES 4, 'E'         # RES 4,E
+		0xA4: RES 4, 'H'         # RES 4,H
+		0xA5: RES 4, 'L'         # RES 4,L
+		0xA6: RES 4, '(HL)'         # RES 4,(HL)
+		0xA7: RES 4, 'A'         # RES 4,A
+		0xA8: RES 5, 'B'         # RES 5,B
+		0xA9: RES 5, 'C'         # RES 5,C
+		0xAA: RES 5, 'D'         # RES 5,D
+		0xAB: RES 5, 'E'         # RES 5,E
+		0xAC: RES 5, 'H'         # RES 5,H
+		0xAD: RES 5, 'L'         # RES 5,L
+		0xAE: RES 5, '(HL)'         # RES 5,(HL)
+		0xAF: RES 5, 'A'         # RES 5,A
+		0xB0: RES 6, 'B'         # RES 6,B
+		0xB1: RES 6, 'C'         # RES 6,C
+		0xB2: RES 6, 'D'         # RES 6,D
+		0xB3: RES 6, 'E'         # RES 6,E
+		0xB4: RES 6, 'H'         # RES 6,H
+		0xB5: RES 6, 'L'         # RES 6,L
+		0xB6: RES 6, '(HL)'         # RES 6,(HL)
+		0xB7: RES 6, 'A'         # RES 6,A
+		0xB8: RES 7, 'B'         # RES 7,B
+		0xB9: RES 7, 'C'         # RES 7,C
+		0xBA: RES 7, 'D'         # RES 7,D
+		0xBB: RES 7, 'E'         # RES 7,E
+		0xBC: RES 7, 'H'         # RES 7,H
+		0xBD: RES 7, 'L'         # RES 7,L
+		0xBE: RES 7, '(HL)'         # RES 7,(HL)
+		0xBF: RES 7, 'A'         # RES 7,A
+		0xC0: SET 0, 'B'         # SET 0,B
+		0xC1: SET 0, 'C'         # SET 0,C
+		0xC2: SET 0, 'D'         # SET 0,D
+		0xC3: SET 0, 'E'         # SET 0,E
+		0xC4: SET 0, 'H'         # SET 0,H
+		0xC5: SET 0, 'L'         # SET 0,L
+		0xC6: SET 0, '(HL)'         # SET 0,(HL)
+		0xC7: SET 0, 'A'         # SET 0,A
+		0xC8: SET 1, 'B'         # SET 1,B
+		0xC9: SET 1, 'C'         # SET 1,C
+		0xCA: SET 1, 'D'         # SET 1,D
+		0xCB: SET 1, 'E'         # SET 1,E
+		0xCC: SET 1, 'H'         # SET 1,H
+		0xCD: SET 1, 'L'         # SET 1,L
+		0xCE: SET 1, '(HL)'         # SET 1,(HL)
+		0xCF: SET 1, 'A'         # SET 1,A
+		0xD0: SET 2, 'B'         # SET 2,B
+		0xD1: SET 2, 'C'         # SET 2,C
+		0xD2: SET 2, 'D'         # SET 2,D
+		0xD3: SET 2, 'E'         # SET 2,E
+		0xD4: SET 2, 'H'         # SET 2,H
+		0xD5: SET 2, 'L'         # SET 2,L
+		0xD6: SET 2, '(HL)'         # SET 2,(HL)
+		0xD7: SET 2, 'A'         # SET 2,A
+		0xD8: SET 3, 'B'         # SET 3,B
+		0xD9: SET 3, 'C'         # SET 3,C
+		0xDA: SET 3, 'D'         # SET 3,D
+		0xDB: SET 3, 'E'         # SET 3,E
+		0xDC: SET 3, 'H'         # SET 3,H
+		0xDD: SET 3, 'L'         # SET 3,L
+		0xDE: SET 3, '(HL)'         # SET 3,(HL)
+		0xDF: SET 3, 'A'         # SET 3,A
+		0xE0: SET 4, 'B'         # SET 4,B
+		0xE1: SET 4, 'C'         # SET 4,C
+		0xE2: SET 4, 'D'         # SET 4,D
+		0xE3: SET 4, 'E'         # SET 4,E
+		0xE4: SET 4, 'H'         # SET 4,H
+		0xE5: SET 4, 'L'         # SET 4,L
+		0xE6: SET 4, '(HL)'         # SET 4,(HL)
+		0xE7: SET 4, 'A'         # SET 4,A
+		0xE8: SET 5, 'B'         # SET 5,B
+		0xE9: SET 5, 'C'         # SET 5,C
+		0xEA: SET 5, 'D'         # SET 5,D
+		0xEB: SET 5, 'E'         # SET 5,E
+		0xEC: SET 5, 'H'         # SET 5,H
+		0xED: SET 5, 'L'         # SET 5,L
+		0xEE: SET 5, '(HL)'         # SET 5,(HL)
+		0xEF: SET 5, 'A'         # SET 5,A
+		0xF0: SET 6, 'B'         # SET 6,B
+		0xF1: SET 6, 'C'         # SET 6,C
+		0xF2: SET 6, 'D'         # SET 6,D
+		0xF3: SET 6, 'E'         # SET 6,E
+		0xF4: SET 6, 'H'         # SET 6,H
+		0xF5: SET 6, 'L'         # SET 6,L
+		0xF6: SET 6, '(HL)'         # SET 6,(HL)
+		0xF7: SET 6, 'A'         # SET 6,A
+		0xF8: SET 7, 'B'         # SET 7,B
+		0xF9: SET 7, 'C'         # SET 7,C
+		0xFA: SET 7, 'D'         # SET 7,D
+		0xFB: SET 7, 'E'         # SET 7,E
+		0xFC: SET 7, 'H'         # SET 7,H
+		0xFD: SET 7, 'L'         # SET 7,L
+		0xFE: SET 7, '(HL)'         # SET 7,(HL)
+		0xFF: SET 7, 'A'         # SET 7,A
+		0x100: 'cb'
+	}
+
+	# Generate the opcode runner lookup table for either the DDCB or FDCB set
+	generateddfdcbOpcodeSet = (prefix) ->
+		if prefix == 'DDCB'
+			rp = rpIX
+			rh = rIXH
+			rl = rIXL
+
+			rpn = 'IX'
+			rhn = 'IXH'
+			rln = 'IXL'
+		else # prefix == 'FDCB'
+			rp = rpIY
+			rh = rIYH
+			rl = rIYL
+
+			rpn = 'IY'
+			rhn = 'IYH'
+			rln = 'IYL'
+		return {
+			0x00: LDSHIFTOP('B', RLC, rp)        # LD B,RLC (REGISTER+dd)
+			0x01: LDSHIFTOP('C', RLC, rp)        # LD C,RLC (REGISTER+dd)
+			0x02: LDSHIFTOP('D', RLC, rp)        # LD D,RLC (REGISTER+dd)
+			0x03: LDSHIFTOP('E', RLC, rp)        # LD E,RLC (REGISTER+dd)
+			0x04: LDSHIFTOP('H', RLC, rp)        # LD H,RLC (REGISTER+dd)
+			0x05: LDSHIFTOP('L', RLC, rp)        # LD L,RLC (REGISTER+dd)
+			0x06: RLC "(#{rpn}+nn)"         # RLC (IX+nn)
+			0x07: LDSHIFTOP('A', RLC, rp)        # LD A,RLC (REGISTER+dd)
+			0x08: LDSHIFTOP('B', RRC, rp)        # LD B,RRC (REGISTER+dd)
+			0x09: LDSHIFTOP('C', RRC, rp)        # LD C,RRC (REGISTER+dd)
+			0x0A: LDSHIFTOP('D', RRC, rp)        # LD D,RRC (REGISTER+dd)
+			0x0B: LDSHIFTOP('E', RRC, rp)        # LD E,RRC (REGISTER+dd)
+			0x0C: LDSHIFTOP('H', RRC, rp)        # LD H,RRC (REGISTER+dd)
+			0x0D: LDSHIFTOP('L', RRC, rp)        # LD L,RRC (REGISTER+dd)
+			0x0E: RRC "(#{rpn}+nn)"         # RRC (IX+nn)
+			0x0F: LDSHIFTOP('A', RRC, rp)        # LD A,RRC (REGISTER+dd)
+			0x10: LDSHIFTOP('B', RL, rp)        # LD B,RL (REGISTER+dd)
+			0x11: LDSHIFTOP('C', RL, rp)        # LD C,RL (REGISTER+dd)
+			0x12: LDSHIFTOP('D', RL, rp)        # LD D,RL (REGISTER+dd)
+			0x13: LDSHIFTOP('E', RL, rp)        # LD E,RL (REGISTER+dd)
+			0x14: LDSHIFTOP('H', RL, rp)        # LD H,RL (REGISTER+dd)
+			0x15: LDSHIFTOP('L', RL, rp)        # LD L,RL (REGISTER+dd)
+			0x16: RL "(#{rpn}+nn)"         # RL (IX+nn)
+			0x17: LDSHIFTOP('A', RL, rp)        # LD A,RL (REGISTER+dd)
+			0x18: LDSHIFTOP('B', RR, rp)        # LD B,RR (REGISTER+dd)
+			0x19: LDSHIFTOP('C', RR, rp)        # LD C,RR (REGISTER+dd)
+			0x1A: LDSHIFTOP('D', RR, rp)        # LD D,RR (REGISTER+dd)
+			0x1B: LDSHIFTOP('E', RR, rp)        # LD E,RR (REGISTER+dd)
+			0x1C: LDSHIFTOP('H', RR, rp)        # LD H,RR (REGISTER+dd)
+			0x1D: LDSHIFTOP('L', RR, rp)        # LD L,RR (REGISTER+dd)
+			0x1E: RR "(#{rpn}+nn)"         # RR (IX+nn)
+			0x1F: LDSHIFTOP('A', RR, rp)        # LD A,RR (REGISTER+dd)
+			0x20: LDSHIFTOP('B', SLA, rp)        # LD B,SLA (REGISTER+dd)
+			0x21: LDSHIFTOP('C', SLA, rp)        # LD C,SLA (REGISTER+dd)
+			0x22: LDSHIFTOP('D', SLA, rp)        # LD D,SLA (REGISTER+dd)
+			0x23: LDSHIFTOP('E', SLA, rp)        # LD E,SLA (REGISTER+dd)
+			0x24: LDSHIFTOP('H', SLA, rp)        # LD H,SLA (REGISTER+dd)
+			0x25: LDSHIFTOP('L', SLA, rp)        # LD L,SLA (REGISTER+dd)
+			0x26: SLA "(#{rpn}+nn)"         # SLA (IX+nn)
+			0x27: LDSHIFTOP('A', SLA, rp)        # LD A,SLA (REGISTER+dd)
+			0x28: LDSHIFTOP('B', SRA, rp)        # LD B,SRA (REGISTER+dd)
+			0x29: LDSHIFTOP('C', SRA, rp)        # LD C,SRA (REGISTER+dd)
+			0x2A: LDSHIFTOP('D', SRA, rp)        # LD D,SRA (REGISTER+dd)
+			0x2B: LDSHIFTOP('E', SRA, rp)        # LD E,SRA (REGISTER+dd)
+			0x2C: LDSHIFTOP('H', SRA, rp)        # LD H,SRA (REGISTER+dd)
+			0x2D: LDSHIFTOP('L', SRA, rp)        # LD L,SRA (REGISTER+dd)
+			0x2E: SRA "(#{rpn}+nn)"         # SRA (IX+nn)
+			0x2F: LDSHIFTOP('A', SRA, rp)        # LD A,SRA (REGISTER+dd)
+			0x30: LDSHIFTOP('B', SLL, rp)        # LD B,SLL (REGISTER+dd)
+			0x31: LDSHIFTOP('C', SLL, rp)        # LD C,SLL (REGISTER+dd)
+			0x32: LDSHIFTOP('D', SLL, rp)        # LD D,SLL (REGISTER+dd)
+			0x33: LDSHIFTOP('E', SLL, rp)        # LD E,SLL (REGISTER+dd)
+			0x34: LDSHIFTOP('H', SLL, rp)        # LD H,SLL (REGISTER+dd)
+			0x35: LDSHIFTOP('L', SLL, rp)        # LD L,SLL (REGISTER+dd)
+			0x36: SLL "(#{rpn}+nn)"         # SLL (IX+nn)
+			0x37: LDSHIFTOP('A', SLL, rp)        # LD A,SLL (REGISTER+dd)
+			0x38: LDSHIFTOP('B', SRL, rp)        # LD B,SRL (REGISTER+dd)
+			0x39: LDSHIFTOP('C', SRL, rp)        # LD C,SRL (REGISTER+dd)
+			0x3A: LDSHIFTOP('D', SRL, rp)        # LD D,SRL (REGISTER+dd)
+			0x3B: LDSHIFTOP('E', SRL, rp)        # LD E,SRL (REGISTER+dd)
+			0x3C: LDSHIFTOP('H', SRL, rp)        # LD H,SRL (REGISTER+dd)
+			0x3D: LDSHIFTOP('L', SRL, rp)        # LD L,SRL (REGISTER+dd)
+			0x3E: SRL "(#{rpn}+nn)"         # SRL (IX+nn)
+			0x3F: LDSHIFTOP('A', SRL, rp)        # LD A,SRL (REGISTER+dd)
+			0x40: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x41: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x42: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x43: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x44: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x45: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x46: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x47: BIT_N_iRRpNNi(0, rp)         # BIT 0,(IX+nn)
+			0x48: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x49: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x4A: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x4B: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x4C: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x4D: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x4E: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x4F: BIT_N_iRRpNNi(1, rp)         # BIT 1,(IX+nn)
+			0x50: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x51: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x52: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x53: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x54: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x55: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x56: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x57: BIT_N_iRRpNNi(2, rp)         # BIT 2,(IX+nn)
+			0x58: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x59: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x5A: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x5B: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x5C: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x5D: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x5E: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x5F: BIT_N_iRRpNNi(3, rp)         # BIT 3,(IX+nn)
+			0x60: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x61: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x62: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x63: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x64: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x65: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x66: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x67: BIT_N_iRRpNNi(4, rp)         # BIT 4,(IX+nn)
+			0x68: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x69: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x6A: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x6B: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x6C: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x6D: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x6E: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x6F: BIT_N_iRRpNNi(5, rp)         # BIT 5,(IX+nn)
+			0x70: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x71: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x72: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x73: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x74: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x75: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x76: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x77: BIT_N_iRRpNNi(6, rp)         # BIT 6,(IX+nn)
+			0x78: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x79: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x7A: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x7B: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x7C: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x7D: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x7E: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x7F: BIT_N_iRRpNNi(7, rp)         # BIT 7,(IX+nn)
+			0x80: LDBITOP('B', RES, 0, rp)        # LD B,RES 0,(IX+dd)
+			0x81: LDBITOP('C', RES, 0, rp)        # LD C,RES 0,(IX+dd)
+			0x82: LDBITOP('D', RES, 0, rp)        # LD D,RES 0,(IX+dd)
+			0x83: LDBITOP('E', RES, 0, rp)        # LD E,RES 0,(IX+dd)
+			0x84: LDBITOP('H', RES, 0, rp)        # LD H,RES 0,(IX+dd)
+			0x85: LDBITOP('L', RES, 0, rp)        # LD L,RES 0,(IX+dd)
+			0x86: RES 0, "(#{rpn}+nn)"         # RES 0,(IX+nn)
+			0x87: LDBITOP('A', RES, 0, rp)        # LD A,RES 0,(IX+dd)
+			0x88: LDBITOP('B', RES, 1, rp)        # LD B,RES 1,(IX+dd)
+			0x89: LDBITOP('C', RES, 1, rp)        # LD C,RES 1,(IX+dd)
+			0x8A: LDBITOP('D', RES, 1, rp)        # LD D,RES 1,(IX+dd)
+			0x8B: LDBITOP('E', RES, 1, rp)        # LD E,RES 1,(IX+dd)
+			0x8C: LDBITOP('H', RES, 1, rp)        # LD H,RES 1,(IX+dd)
+			0x8D: LDBITOP('L', RES, 1, rp)        # LD L,RES 1,(IX+dd)
+			0x8E: RES 1, "(#{rpn}+nn)"         # RES 1,(IX+nn)
+			0x8F: LDBITOP('A', RES, 1, rp)        # LD A,RES 1,(IX+dd)
+			0x90: LDBITOP('B', RES, 2, rp)        # LD B,RES 2,(IX+dd)
+			0x91: LDBITOP('C', RES, 2, rp)        # LD C,RES 2,(IX+dd)
+			0x92: LDBITOP('D', RES, 2, rp)        # LD D,RES 2,(IX+dd)
+			0x93: LDBITOP('E', RES, 2, rp)        # LD E,RES 2,(IX+dd)
+			0x94: LDBITOP('H', RES, 2, rp)        # LD H,RES 2,(IX+dd)
+			0x95: LDBITOP('L', RES, 2, rp)        # LD L,RES 2,(IX+dd)
+			0x96: RES 2, "(#{rpn}+nn)"         # RES 2,(IX+nn)
+			0x97: LDBITOP('A', RES, 2, rp)        # LD A,RES 2,(IX+dd)
+			0x98: LDBITOP('B', RES, 3, rp)        # LD B,RES 3,(IX+dd)
+			0x99: LDBITOP('C', RES, 3, rp)        # LD C,RES 3,(IX+dd)
+			0x9A: LDBITOP('D', RES, 3, rp)        # LD D,RES 3,(IX+dd)
+			0x9B: LDBITOP('E', RES, 3, rp)        # LD E,RES 3,(IX+dd)
+			0x9C: LDBITOP('H', RES, 3, rp)        # LD H,RES 3,(IX+dd)
+			0x9D: LDBITOP('L', RES, 3, rp)        # LD L,RES 3,(IX+dd)
+			0x9E: RES 3, "(#{rpn}+nn)"         # RES 3,(IX+nn)
+			0x9F: LDBITOP('A', RES, 3, rp)        # LD A,RES 3,(IX+dd)
+			0xA0: LDBITOP('B', RES, 4, rp)        # LD B,RES 4,(IX+dd)
+			0xA1: LDBITOP('C', RES, 4, rp)        # LD C,RES 4,(IX+dd)
+			0xA2: LDBITOP('D', RES, 4, rp)        # LD D,RES 4,(IX+dd)
+			0xA3: LDBITOP('E', RES, 4, rp)        # LD E,RES 4,(IX+dd)
+			0xA4: LDBITOP('H', RES, 4, rp)        # LD H,RES 4,(IX+dd)
+			0xA5: LDBITOP('L', RES, 4, rp)        # LD L,RES 4,(IX+dd)
+			0xA6: RES 4, "(#{rpn}+nn)"         # RES 4,(IX+nn)
+			0xA7: LDBITOP('A', RES, 4, rp)        # LD A,RES 4,(IX+dd)
+			0xA8: LDBITOP('B', RES, 5, rp)        # LD B,RES 5,(IX+dd)
+			0xA9: LDBITOP('C', RES, 5, rp)        # LD C,RES 5,(IX+dd)
+			0xAA: LDBITOP('D', RES, 5, rp)        # LD D,RES 5,(IX+dd)
+			0xAB: LDBITOP('E', RES, 5, rp)        # LD E,RES 5,(IX+dd)
+			0xAC: LDBITOP('H', RES, 5, rp)        # LD H,RES 5,(IX+dd)
+			0xAD: LDBITOP('L', RES, 5, rp)        # LD L,RES 5,(IX+dd)
+			0xAE: RES 5, "(#{rpn}+nn)"         # RES 5,(IX+nn)
+			0xAF: LDBITOP('A', RES, 5, rp)        # LD A,RES 5,(IX+dd)
+			0xB0: LDBITOP('B', RES, 6, rp)        # LD B,RES 6,(IX+dd)
+			0xB1: LDBITOP('C', RES, 6, rp)        # LD C,RES 6,(IX+dd)
+			0xB2: LDBITOP('D', RES, 6, rp)        # LD D,RES 6,(IX+dd)
+			0xB3: LDBITOP('E', RES, 6, rp)        # LD E,RES 6,(IX+dd)
+			0xB4: LDBITOP('H', RES, 6, rp)        # LD H,RES 6,(IX+dd)
+			0xB5: LDBITOP('L', RES, 6, rp)        # LD L,RES 6,(IX+dd)
+			0xB6: RES 6, "(#{rpn}+nn)"         # RES 6,(IX+nn)
+			0xB7: LDBITOP('A', RES, 6, rp)        # LD A,RES 6,(IX+dd)
+			0xB8: LDBITOP('B', RES, 7, rp)        # LD B,RES 7,(IX+dd)
+			0xB9: LDBITOP('C', RES, 7, rp)        # LD C,RES 7,(IX+dd)
+			0xBA: LDBITOP('D', RES, 7, rp)        # LD D,RES 7,(IX+dd)
+			0xBB: LDBITOP('E', RES, 7, rp)        # LD E,RES 7,(IX+dd)
+			0xBC: LDBITOP('H', RES, 7, rp)        # LD H,RES 7,(IX+dd)
+			0xBD: LDBITOP('L', RES, 7, rp)        # LD L,RES 7,(IX+dd)
+			0xBE: RES 7, "(#{rpn}+nn)"         # RES 7,(IX+nn)
+			0xBF: LDBITOP('A', RES, 7, rp)        # LD A,RES 7,(IX+dd)
+			0xC0: LDBITOP('B', SET, 0, rp)        # LD B,SET 0,(IX+dd)
+			0xC1: LDBITOP('C', SET, 0, rp)        # LD C,SET 0,(IX+dd)
+			0xC2: LDBITOP('D', SET, 0, rp)        # LD D,SET 0,(IX+dd)
+			0xC3: LDBITOP('E', SET, 0, rp)        # LD E,SET 0,(IX+dd)
+			0xC4: LDBITOP('H', SET, 0, rp)        # LD H,SET 0,(IX+dd)
+			0xC5: LDBITOP('L', SET, 0, rp)        # LD L,SET 0,(IX+dd)
+			0xC6: SET 0, "(#{rpn}+nn)"         # SET 0,(IX+nn)
+			0xC7: LDBITOP('A', SET, 0, rp)        # LD A,SET 0,(IX+dd)
+			0xC8: LDBITOP('B', SET, 1, rp)        # LD B,SET 1,(IX+dd)
+			0xC9: LDBITOP('C', SET, 1, rp)        # LD C,SET 1,(IX+dd)
+			0xCA: LDBITOP('D', SET, 1, rp)        # LD D,SET 1,(IX+dd)
+			0xCB: LDBITOP('E', SET, 1, rp)        # LD E,SET 1,(IX+dd)
+			0xCC: LDBITOP('H', SET, 1, rp)        # LD H,SET 1,(IX+dd)
+			0xCD: LDBITOP('L', SET, 1, rp)        # LD L,SET 1,(IX+dd)
+			0xCE: SET 1, "(#{rpn}+nn)"         # SET 1,(IX+nn)
+			0xCF: LDBITOP('A', SET, 1, rp)        # LD A,SET 1,(IX+dd)
+			0xD0: LDBITOP('B', SET, 2, rp)        # LD B,SET 2,(IX+dd)
+			0xD1: LDBITOP('C', SET, 2, rp)        # LD C,SET 2,(IX+dd)
+			0xD2: LDBITOP('D', SET, 2, rp)        # LD D,SET 2,(IX+dd)
+			0xD3: LDBITOP('E', SET, 2, rp)        # LD E,SET 2,(IX+dd)
+			0xD4: LDBITOP('H', SET, 2, rp)        # LD H,SET 2,(IX+dd)
+			0xD5: LDBITOP('L', SET, 2, rp)        # LD L,SET 2,(IX+dd)
+			0xD6: SET 2, "(#{rpn}+nn)"         # SET 2,(IX+nn)
+			0xD7: LDBITOP('A', SET, 2, rp)        # LD A,SET 2,(IX+dd)
+			0xD8: LDBITOP('B', SET, 3, rp)        # LD B,SET 3,(IX+dd)
+			0xD9: LDBITOP('C', SET, 3, rp)        # LD C,SET 3,(IX+dd)
+			0xDA: LDBITOP('D', SET, 3, rp)        # LD D,SET 3,(IX+dd)
+			0xDB: LDBITOP('E', SET, 3, rp)        # LD E,SET 3,(IX+dd)
+			0xDC: LDBITOP('H', SET, 3, rp)        # LD H,SET 3,(IX+dd)
+			0xDD: LDBITOP('L', SET, 3, rp)        # LD L,SET 3,(IX+dd)
+			0xDE: SET 3, "(#{rpn}+nn)"         # SET 3,(IX+nn)
+			0xDF: LDBITOP('A', SET, 3, rp)        # LD A,SET 3,(IX+dd)
+			0xE0: LDBITOP('B', SET, 4, rp)        # LD B,SET 4,(IX+dd)
+			0xE1: LDBITOP('C', SET, 4, rp)        # LD C,SET 4,(IX+dd)
+			0xE2: LDBITOP('D', SET, 4, rp)        # LD D,SET 4,(IX+dd)
+			0xE3: LDBITOP('E', SET, 4, rp)        # LD E,SET 4,(IX+dd)
+			0xE4: LDBITOP('H', SET, 4, rp)        # LD H,SET 4,(IX+dd)
+			0xE5: LDBITOP('L', SET, 4, rp)        # LD L,SET 4,(IX+dd)
+			0xE6: SET 4, "(#{rpn}+nn)"         # SET 4,(IX+nn)
+			0xE7: LDBITOP('A', SET, 4, rp)        # LD A,SET 4,(IX+dd)
+			0xE8: LDBITOP('B', SET, 5, rp)        # LD B,SET 5,(IX+dd)
+			0xE9: LDBITOP('C', SET, 5, rp)        # LD C,SET 5,(IX+dd)
+			0xEA: LDBITOP('D', SET, 5, rp)        # LD D,SET 5,(IX+dd)
+			0xEB: LDBITOP('E', SET, 5, rp)        # LD E,SET 5,(IX+dd)
+			0xEC: LDBITOP('H', SET, 5, rp)        # LD H,SET 5,(IX+dd)
+			0xED: LDBITOP('L', SET, 5, rp)        # LD L,SET 5,(IX+dd)
+			0xEE: SET 5, "(#{rpn}+nn)"         # SET 5,(IX+nn)
+			0xEF: LDBITOP('A', SET, 5, rp)        # LD A,SET 5,(IX+dd)
+			0xF0: LDBITOP('B', SET, 6, rp)        # LD B,SET 6,(IX+dd)
+			0xF1: LDBITOP('C', SET, 6, rp)        # LD C,SET 6,(IX+dd)
+			0xF2: LDBITOP('D', SET, 6, rp)        # LD D,SET 6,(IX+dd)
+			0xF3: LDBITOP('E', SET, 6, rp)        # LD E,SET 6,(IX+dd)
+			0xF4: LDBITOP('H', SET, 6, rp)        # LD H,SET 6,(IX+dd)
+			0xF5: LDBITOP('L', SET, 6, rp)        # LD L,SET 6,(IX+dd)
+			0xF6: SET 6, "(#{rpn}+nn)"         # SET 6,(IX+nn)
+			0xF7: LDBITOP('A', SET, 6, rp)        # LD A,SET 6,(IX+dd)
+			0xF8: LDBITOP('B', SET, 7, rp)        # LD B,SET 7,(IX+dd)
+			0xF9: LDBITOP('C', SET, 7, rp)        # LD C,SET 7,(IX+dd)
+			0xFA: LDBITOP('D', SET, 7, rp)        # LD D,SET 7,(IX+dd)
+			0xFB: LDBITOP('E', SET, 7, rp)        # LD E,SET 7,(IX+dd)
+			0xFC: LDBITOP('H', SET, 7, rp)        # LD H,SET 7,(IX+dd)
+			0xFD: LDBITOP('L', SET, 7, rp)        # LD L,SET 7,(IX+dd)
+			0xFE: SET 7, "(#{rpn}+nn)"         # SET 7,(IX+nn)
+			0xFF: LDBITOP('A', SET, 7, rp)        # LD A,SET 7,(IX+dd)
+			0x100: 'ddcb'
+		}
+
+	OPCODE_RUN_STRINGS_DDCB = generateddfdcbOpcodeSet('DDCB')
+	OPCODE_RUN_STRINGS_FDCB = generateddfdcbOpcodeSet('FDCB')
+
+	# Generate the opcode runner lookup table for either the DD or FD set, acting on the
+	# specified register pair (IX or IY)
+	generateddfdOpcodeSet = (prefix) ->
+		if prefix == 'DD'
+			rp = rpIX
+			rh = rIXH
+			rl = rIXL
+
+			rpn = 'IX'
+			rhn = 'IXH'
+			rln = 'IXL'
+		else # prefix == 'FD'
+			rp = rpIY
+			rh = rIYH
+			rl = rIYL
+
+			rpn = 'IY'
+			rhn = 'IYH'
+			rln = 'IYL'
+		return {
+			0x09: ADD_RR_RR(rp, rpBC)         # ADD IX,BC
+
+			0x19: ADD_RR_RR(rp, rpDE)         # ADD IX,DE
+
+			0x21: LD_RR_NN(rp)         # LD IX,nnnn
+			0x22: LD_iNNi_RR(rp)         # LD (nnnn),IX
+			0x23: INC_RR(rp)         # INC IX
+			0x24: INC rhn          # INC IXh
+			0x25: DEC rhn          # DEC IXh
+			0x26: LD_R_N(rh)         # LD IXh, nn
+
+			0x29: ADD_RR_RR(rp, rp)         # ADD IX,IX
+			0x2A: LD_RR_iNNi(rp)         # LD IX,(nnnn)
+			0x2B: DEC_RR(rp)         # DEC IX
+			0x2C: INC rln          # INC IXl
+			0x2D: DEC rln          # DEC IXl
+			0x2E: LD_R_N(rl)         # LD IXl, nn
+
+			0x34: INC "(#{rpn}+nn)"         # INC (IX+nn)
+			0x35: DEC "(#{rpn}+nn)"         # DEC (IX+nn)
+			0x36: LD_iRRpNNi_N(rp)         # LD (IX+nn),nn
+
+			0x39: ADD_RR_RR(rp, rpSP)         # ADD IX,SP
+
+			0x44: LD_R_R(rB, rh)         # LD B,IXh
+			0x45: LD_R_R(rB, rl)         # LD B,IXl
+			0x46: LD_R_iRRpNNi(rB, rp)         # LD B,(IX+nn)
+
+			0x4C: LD_R_R(rC, rh)         # LD C,IXh
+			0x4D: LD_R_R(rC, rl)         # LD C,IXl
+			0x4E: LD_R_iRRpNNi(rC, rp)         # LD C,(IX+nn)
+
+			0x54: LD_R_R(rD, rh)         # LD D,IXh
+			0x55: LD_R_R(rD, rl)         # LD D,IXl
+			0x56: LD_R_iRRpNNi(rD, rp)         # LD D,(IX+nn)
+
+			0x5C: LD_R_R(rE, rh)         # LD E,IXh
+			0x5D: LD_R_R(rE, rl)         # LD E,IXl
+			0x5E: LD_R_iRRpNNi(rE, rp)         # LD E,(IX+nn)
+
+			0x60: LD_R_R(rh, rB)         # LD IXh,B
+			0x61: LD_R_R(rh, rC)         # LD IXh,C
+			0x62: LD_R_R(rh, rD)         # LD IXh,D
+			0x63: LD_R_R(rh, rE)         # LD IXh,E
+			0x64: LD_R_R(rh, rh)         # LD IXh,IXh
+			0x65: LD_R_R(rh, rl)         # LD IXh,IXl
+			0x66: LD_R_iRRpNNi(rH, rp)         # LD H,(IX+nn)
+			0x67: LD_R_R(rh, rA)         # LD IXh,A
+			0x68: LD_R_R(rl, rB)         # LD IXl,B
+			0x69: LD_R_R(rl, rC)         # LD IXl,C
+			0x6A: LD_R_R(rl, rD)         # LD IXl,D
+			0x6B: LD_R_R(rl, rE)         # LD IXl,E
+			0x6C: LD_R_R(rl, rh)         # LD IXl,IXh
+			0x6D: LD_R_R(rl, rl)         # LD IXl,IXl
+			0x6E: LD_R_iRRpNNi(rL, rp)         # LD L,(IX+nn)
+			0x6F: LD_R_R(rl, rA)         # LD IXl,A
+			0x70: LD_iRRpNNi_R(rp, rB)         # LD (IX+nn),B
+			0x71: LD_iRRpNNi_R(rp, rC)         # LD (IX+nn),C
+			0x72: LD_iRRpNNi_R(rp, rD)         # LD (IX+nn),D
+			0x73: LD_iRRpNNi_R(rp, rE)         # LD (IX+nn),E
+			0x74: LD_iRRpNNi_R(rp, rH)         # LD (IX+nn),H
+			0x75: LD_iRRpNNi_R(rp, rL)         # LD (IX+nn),L
+			0x77: LD_iRRpNNi_R(rp, rA)         # LD (IX+nn),A
+
+			0x7C: LD_R_R(rA, rh)         # LD A,IXh
+			0x7D: LD_R_R(rA, rl)         # LD A,IXl
+			0x7E: LD_R_iRRpNNi(rA, rp)         # LD A,(IX+nn)
+
+			0x84: ADD_A rhn            # ADD A,IXh
+			0x85: ADD_A rln            # ADD A,IXl
+			0x86: ADD_A "(#{rpn}+nn)"         # ADD A,(IX+nn)
+
+			0x8C: ADC_A rhn            # ADC A,IXh
+			0x8D: ADC_A rln            # ADC A,IXl
+			0x8E: ADC_A "(#{rpn}+nn)"         # ADC A,(IX+nn)
+
+			0x94: SUB_A rhn            # SUB IXh
+			0x95: SUB_A rln            # SUB IXl
+			0x96: SUB_A "(#{rpn}+nn)"         # SUB A,(IX+dd)
+
+			0x9C: SBC_A rhn            # SBC IXh
+			0x9D: SBC_A rln            # SBC IXl
+			0x9E: SBC_A "(#{rpn}+nn)"         # SBC A,(IX+dd)
+
+			0xA4: AND_A rhn            # AND IXh
+			0xA5: AND_A rln            # AND IXl
+			0xA6: AND_A "(#{rpn}+nn)"         # AND (IX+dd)
+
+			0xAC: XOR_A rhn            # XOR IXh
+			0xAD: XOR_A rln            # XOR IXl
+			0xAE: XOR_A "(#{rpn}+nn)"         # XOR A,(IX+dd)
+
+			0xB4: OR_A rhn            # OR IXh
+			0xB5: OR_A rln            # OR IXl
+			0xB6: OR_A "(#{rpn}+nn)"         # OR A,(IX+dd)
+
+			0xBC: CP_A rhn            # CP IXh
+			0xBD: CP_A rln            # CP IXl
+			0xBE: CP_A "(#{rpn}+nn)"         # CP (IX+dd)
+
+			0xCB: SHIFT(prefix + 'CB')        # shift code
+
+			0xDD: SHIFT('DD')         # shift code
+
+			0xE1: POP_RR(rp)         # POP IX
+
+			0xE3: EX_iSPi_RR(rp)         # EX (SP),IX
+
+			0xE5: PUSH_RR(rp)         # PUSH IX
+
+			0xE9: JP_RR(rp)         # JP (IX)
+
+			0xF9: LD_RR_RR(rpSP, rp)         # LD SP,IX
+
+			0xFD: SHIFT('FD')         # shift code
+
+			0x100: 'dd'
+		}
+
+	OPCODE_RUN_STRINGS_DD = generateddfdOpcodeSet('DD')
+
+	OPCODE_RUN_STRINGS_ED = {
+
+		0x40: IN_R_iCi(rB)         # IN B,(C)
+		0x41: OUT_iCi_R(rB)         # OUT (C),B
+		0x42: SBC_HL_RR(rpBC)         # SBC HL,BC
+		0x43: LD_iNNi_RR(rpBC)         # LD (nnnn),BC
+		0x44: NEG()         # NEG
+		0x45: RETN()        # RETN
+		0x46: IM(0)         # IM 0
+		0x47: LD_R_R(rI, rA)         # LD I,A
+		0x48: IN_R_iCi(rC)         # IN C,(C)
+		0x49: OUT_iCi_R(rC)         # OUT (C),C
+		0x4A: ADC_HL_RR(rpBC)        # ADC HL,BC
+		0x4B: LD_RR_iNNi(rpBC)         # LD BC,(nnnn)
+		0x4C: NEG()         # NEG
+		0x4D: RETN()        # RETN
+		0x4E: IM(0)         # IM 0
+		0x4F: LD_R_R(rR, rA)         # LD R,A
+		0x50: IN_R_iCi(rD)         # IN D,(C)
+		0x51: OUT_iCi_R(rD)         # OUT (C),D
+		0x52: SBC_HL_RR(rpDE)         # SBC HL,DE
+		0x53: LD_iNNi_RR(rpDE)         # LD (nnnn),DE
+		0x54: NEG()         # NEG
+		0x55: RETN()        # RETN
+		0x56: IM(1)         # IM 1
+		0x57: LD_R_R(rA, rI)         # LD A,I
+		0x58: IN_R_iCi(rE)         # IN E,(C)
+		0x59: OUT_iCi_R(rE)         # OUT (C),E
+		0x5A: ADC_HL_RR(rpDE)        # ADC HL,DE
+		0x5B: LD_RR_iNNi(rpDE)         # LD DE,(nnnn)
+		0x5C: NEG()         # NEG
+		0x5D: RETN()        # RETN
+		0x5E: IM(2)         # IM 2
+		0x5F: LD_R_R(rA, rR)         # LD A,R
+		0x60: IN_R_iCi(rH)         # IN H,(C)
+		0x61: OUT_iCi_R(rH)         # OUT (C),H
+		0x62: SBC_HL_RR(rpHL)         # SBC HL,HL
+		0x63: LD_iNNi_RR(rpHL)         # LD (nnnn),HL
+		0x64: NEG()         # NEG
+		0x65: RETN()        # RETN
+		0x66: IM(0)         # IM 0
+		0x67: RRD()        # RRD
+		0x68: IN_R_iCi(rL)         # IN L,(C)
+		0x69: OUT_iCi_R(rL)         # OUT (C),L
+		0x6A: ADC_HL_RR(rpHL)        # ADC HL,HL
+		0x6B: LD_RR_iNNi(rpHL, true)         # LD HL,(nnnn)
+		0x6C: NEG()         # NEG
+		0x6D: RETN()        # RETN
+		0x6E: IM(0)         # IM 0
+		0x6F: RLD()        # RLD
+		0x70: IN_F_iCi()        # IN F,(C)
+		0x71: OUT_iCi_0()        # OUT (C),0
+		0x72: SBC_HL_RR(rpSP)         # SBC HL,SP
+		0x73: LD_iNNi_RR(rpSP)         # LD (nnnn),SP
+		0x74: NEG()         # NEG
+		0x75: RETN()        # RETN
+		0x76: IM(1)         # IM 1
+
+		0x78: IN_R_iCi(rA)         # IN A,(C)
+		0x79: OUT_iCi_R(rA)         # OUT (C),A
+		0x7A: ADC_HL_RR(rpSP)        # ADC HL,SP
+		0x7B: LD_RR_iNNi(rpSP)         # LD SP,(nnnn)
+		0x7C: NEG()         # NEG
+		0x7D: RETN()        # RETN
+		0x7E: IM(2)         # IM 2
+
+		0xA0: LDI()         # LDI
+		0xA1: CPI()         # CPI
+		0xA2: INI()         # INI
+		0xA3: OUTI()        # OUTI
+
+		0xA8: LDD()         # LDD
+		0xA9: CPD()         # CPD
+		0xAA: IND()         # IND
+		0xAB: OUTD()        # OUTD
+
+		0xB0: LDIR()         # LDIR
+		0xb1: CPIR()         # CPIR
+		0xB2: INIR()         # INIR
+		0xB3: OTIR()         # OTIR
+
+		0xB8: LDDR()         # LDDR
+		0xb9: CPDR()         # CPDR
+		0xBA: INDR()         # INDR
+		0xBB: OTDR()         # OTDR
+
+		0x100: 'ed'
+	}
+
+	OPCODE_RUN_STRINGS_FD = generateddfdOpcodeSet('FD')
+
+	OPCODE_RUN_STRINGS = {
+		0x00: NOP()         # NOP
+		0x01: LD_RR_NN(rpBC)         # LD BC,nnnn
+		0x02: LD_iRRi_R(rpBC, rA)         # LD (BC),A
+		0x03: INC_RR(rpBC)         # INC BC
+		0x04: INC "B"         # INC B
+		0x05: DEC "B"         # DEC B
+		0x06: LD_R_N(rB)         # LD B,nn
+		0x07: RLCA()         # RLCA
+		0x08: EX_RR_RR(rpAF, rpAF_)         # EX AF,AF'
+		0x09: ADD_RR_RR(rpHL, rpBC)         # ADD HL,BC
+		0x0A: LD_R_iRRi(rA, rpBC)         # LD A,(BC)
+		0x0B: DEC_RR(rpBC)         # DEC BC
+		0x0C: INC "C"         # INC C
+		0x0D: DEC "C"         # DEC C
+		0x0E: LD_R_N(rC)         # LD C,nn
+		0x0F: RRCA()         # RRCA
+		0x10: DJNZ_N()         # DJNZ nn
+		0x11: LD_RR_NN(rpDE)         # LD DE,nnnn
+		0x12: LD_iRRi_R(rpDE, rA)         # LD (DE),A
+		0x13: INC_RR(rpDE)         # INC DE
+		0x14: INC "D"         # INC D
+		0x15: DEC "D"         # DEC D
+		0x16: LD_R_N(rD)         # LD D,nn
+		0x17: RLA()         # RLA
+		0x18: JR_N()         # JR nn
+		0x19: ADD_RR_RR(rpHL, rpDE)         # ADD HL,DE
+		0x1A: LD_R_iRRi(rA, rpDE)         # LD A,(DE)
+		0x1B: DEC_RR(rpDE)         # DEC DE
+		0x1C: INC "E"         # INC E
+		0x1D: DEC "E"         # DEC E
+		0x1E: LD_R_N(rE)         # LD E,nn
+		0x1F: RRA()         # RRA
+		0x20: JR_C_N(FLAG_Z, false)         # JR NZ,nn
+		0x21: LD_RR_NN(rpHL)         # LD HL,nnnn
+		0x22: LD_iNNi_RR(rpHL)         # LD (nnnn),HL
+		0x23: INC_RR(rpHL)         # INC HL
+		0x24: INC "H"         # INC H
+		0x25: DEC "H"         # DEC H
+		0x26: LD_R_N(rH)         # LD H,nn
+		0x27: DAA()           # DAA
+		0x28: JR_C_N(FLAG_Z, true)         # JR Z,nn
+		0x29: ADD_RR_RR(rpHL, rpHL)         # ADD HL,HL
+		0x2A: LD_RR_iNNi(rpHL)         # LD HL,(nnnn)
+		0x2B: DEC_RR(rpHL)         # DEC HL
+		0x2C: INC "L"         # INC L
+		0x2D: DEC "L"         # DEC L
+		0x2E: LD_R_N(rL)         # LD L,nn
+		0x2F: CPL()         # CPL
+		0x30: JR_C_N(FLAG_C, false)         # JR NC,nn
+		0x31: LD_RR_NN(rpSP)         # LD SP,nnnn
+		0x32: LD_iNNi_A()         # LD (nnnn),a
+		0x33: INC_RR(rpSP)         # INC SP
+		0x34: INC "(HL)"         # INC (HL)
+		0x35: DEC "(HL)"         # DEC (HL)
+		0x36: LD_iRRi_N(rpHL)         # LD (HL),nn
+		0x37: SCF()         # SCF
+		0x38: JR_C_N(FLAG_C, true)         # JR C,nn
+		0x39: ADD_RR_RR(rpHL, rpSP)         # ADD HL,SP
+		0x3A: LD_A_iNNi()         # LD A,(nnnn)
+		0x3B: DEC_RR(rpSP)         # DEC SP
+		0x3C: INC "A"         # INC A
+		0x3D: DEC "A"         # DEC A
+		0x3E: LD_R_N(rA)         # LD A,nn
+		0x3F: CCF()         # CCF
+		0x40: LD_R_R(rB, rB)         # LD B,B
+		0x41: LD_R_R(rB, rC)         # LD B,C
+		0x42: LD_R_R(rB, rD)         # LD B,D
+		0x43: LD_R_R(rB, rE)         # LD B,E
+		0x44: LD_R_R(rB, rH)         # LD B,H
+		0x45: LD_R_R(rB, rL)         # LD B,L
+		0x46: LD_R_iRRi(rB, rpHL)         # LD B,(HL)
+		0x47: LD_R_R(rB, rA)         # LD B,A
+		0x48: LD_R_R(rC, rB)         # LD C,B
+		0x49: LD_R_R(rC, rC)         # LD C,C
+		0x4a: LD_R_R(rC, rD)         # LD C,D
+		0x4b: LD_R_R(rC, rE)         # LD C,E
+		0x4c: LD_R_R(rC, rH)         # LD C,H
+		0x4d: LD_R_R(rC, rL)         # LD C,L
+		0x4e: LD_R_iRRi(rC, rpHL)         # LD C,(HL)
+		0x4f: LD_R_R(rC, rA)         # LD C,A
+		0x50: LD_R_R(rD, rB)         # LD D,B
+		0x51: LD_R_R(rD, rC)         # LD D,C
+		0x52: LD_R_R(rD, rD)         # LD D,D
+		0x53: LD_R_R(rD, rE)         # LD D,E
+		0x54: LD_R_R(rD, rH)         # LD D,H
+		0x55: LD_R_R(rD, rL)         # LD D,L
+		0x56: LD_R_iRRi(rD, rpHL)         # LD D,(HL)
+		0x57: LD_R_R(rD, rA)         # LD D,A
+		0x58: LD_R_R(rE, rB)         # LD E,B
+		0x59: LD_R_R(rE, rC)         # LD E,C
+		0x5a: LD_R_R(rE, rD)         # LD E,D
+		0x5b: LD_R_R(rE, rE)         # LD E,E
+		0x5c: LD_R_R(rE, rH)         # LD E,H
+		0x5d: LD_R_R(rE, rL)         # LD E,L
+		0x5e: LD_R_iRRi(rE, rpHL)         # LD E,(HL)
+		0x5f: LD_R_R(rE, rA)         # LD E,A
+		0x60: LD_R_R(rH, rB)         # LD H,B
+		0x61: LD_R_R(rH, rC)         # LD H,C
+		0x62: LD_R_R(rH, rD)         # LD H,D
+		0x63: LD_R_R(rH, rE)         # LD H,E
+		0x64: LD_R_R(rH, rH)         # LD H,H
+		0x65: LD_R_R(rH, rL)         # LD H,L
+		0x66: LD_R_iRRi(rH, rpHL)         # LD H,(HL)
+		0x67: LD_R_R(rH, rA)         # LD H,A
+		0x68: LD_R_R(rL, rB)         # LD L,B
+		0x69: LD_R_R(rL, rC)         # LD L,C
+		0x6a: LD_R_R(rL, rD)         # LD L,D
+		0x6b: LD_R_R(rL, rE)         # LD L,E
+		0x6c: LD_R_R(rL, rH)         # LD L,H
+		0x6d: LD_R_R(rL, rL)         # LD L,L
+		0x6e: LD_R_iRRi(rL, rpHL)         # LD L,(HL)
+		0x6f: LD_R_R(rL, rA)         # LD L,A
+		0x70: LD_iRRi_R(rpHL, rB)         # LD (HL),B
+		0x71: LD_iRRi_R(rpHL, rC)         # LD (HL),C
+		0x72: LD_iRRi_R(rpHL, rD)         # LD (HL),D
+		0x73: LD_iRRi_R(rpHL, rE)         # LD (HL),E
+		0x74: LD_iRRi_R(rpHL, rH)         # LD (HL),H
+		0x75: LD_iRRi_R(rpHL, rL)         # LD (HL),L
+		0x76: HALT()         # HALT
+		0x77: LD_iRRi_R(rpHL, rA)         # LD (HL),A
+		0x78: LD_R_R(rA, rB)         # LD A,B
+		0x79: LD_R_R(rA, rC)         # LD A,C
+		0x7a: LD_R_R(rA, rD)         # LD A,D
+		0x7b: LD_R_R(rA, rE)         # LD A,E
+		0x7c: LD_R_R(rA, rH)         # LD A,H
+		0x7d: LD_R_R(rA, rL)         # LD A,L
+		0x7e: LD_R_iRRi(rA, rpHL)         # LD A,(HL)
+		0x7f: LD_R_R(rA, rA)         # LD A,A
+		0x80: ADD_A "B"         # ADD A,B
+		0x81: ADD_A "C"         # ADD A,C
+		0x82: ADD_A "D"         # ADD A,D
+		0x83: ADD_A "E"         # ADD A,E
+		0x84: ADD_A "H"         # ADD A,H
+		0x85: ADD_A "L"         # ADD A,L
+		0x86: ADD_A "(HL)"         # ADD A,(HL)
+		0x87: ADD_A "A"         # ADD A,A
+		0x88: ADC_A "B"         # ADC A,B
+		0x89: ADC_A "C"         # ADC A,C
+		0x8a: ADC_A "D"         # ADC A,D
+		0x8b: ADC_A "E"         # ADC A,E
+		0x8c: ADC_A "H"         # ADC A,H
+		0x8d: ADC_A "L"         # ADC A,L
+		0x8e: ADC_A "(HL)"         # ADC A,(HL)
+		0x8f: ADC_A "A"         # ADC A,A
+		0x90: SUB_A "B"         # SUB A,B
+		0x91: SUB_A "C"         # SUB A,C
+		0x92: SUB_A "D"         # SUB A,D
+		0x93: SUB_A "E"         # SUB A,E
+		0x94: SUB_A "H"         # SUB A,H
+		0x95: SUB_A "L"         # SUB A,L
+		0x96: SUB_A "(HL)"         # SUB A,(HL)
+		0x97: SUB_A "A"         # SUB A,A
+		0x98: SBC_A "B"         # SBC A,B
+		0x99: SBC_A "C"         # SBC A,C
+		0x9a: SBC_A "D"         # SBC A,D
+		0x9b: SBC_A "E"         # SBC A,E
+		0x9c: SBC_A "H"         # SBC A,H
+		0x9d: SBC_A "L"         # SBC A,L
+		0x9e: SBC_A "(HL)"         # SBC A,(HL)
+		0x9f: SBC_A "A"         # SBC A,A
+		0xa0: AND_A "B"         # AND A,B
+		0xa1: AND_A "C"         # AND A,C
+		0xa2: AND_A "D"         # AND A,D
+		0xa3: AND_A "E"         # AND A,E
+		0xa4: AND_A "H"         # AND A,H
+		0xa5: AND_A "L"         # AND A,L
+		0xa6: AND_A "(HL)"         # AND A,(HL)
+		0xa7: AND_A "A"         # AND A,A
+		0xA8: XOR_A "B"         # XOR B
+		0xA9: XOR_A "C"         # XOR C
+		0xAA: XOR_A "D"         # XOR D
+		0xAB: XOR_A "E"         # XOR E
+		0xAC: XOR_A "H"         # XOR H
+		0xAD: XOR_A "L"         # XOR L
+		0xAE: XOR_A "(HL)"         # XOR (HL)
+		0xAF: XOR_A "A"         # XOR A
+		0xb0: OR_A "B"         # OR B
+		0xb1: OR_A "C"         # OR C
+		0xb2: OR_A "D"         # OR D
+		0xb3: OR_A "E"         # OR E
+		0xb4: OR_A "H"         # OR H
+		0xb5: OR_A "L"         # OR L
+		0xb6: OR_A "(HL)"         # OR (HL)
+		0xb7: OR_A "A"         # OR A
+		0xb8: CP_A "B"         # CP B
+		0xb9: CP_A "C"         # CP C
+		0xba: CP_A "D"         # CP D
+		0xbb: CP_A "E"         # CP E
+		0xbc: CP_A "H"         # CP H
+		0xbd: CP_A "L"         # CP L
+		0xbe: CP_A "(HL)"         # CP (HL)
+		0xbf: CP_A "A"         # CP A
+		0xC0: RET_C(FLAG_Z, false)         # RET NZ
+		0xC1: POP_RR(rpBC)         # POP BC
+		0xC2: JP_C_NN(FLAG_Z, false)         # JP NZ,nnnn
+		0xC3: JP_NN()         # JP nnnn
+		0xC4: CALL_C_NN(FLAG_Z, false)         # CALL NZ,nnnn
+		0xC5: PUSH_RR(rpBC)         # PUSH BC
+		0xC6: ADD_A "nn"         # ADD A,nn
+		0xC7: RST(0x0000)         # RST 0x00
+		0xC8: RET_C(FLAG_Z, true)         # RET Z
+		0xC9: RET()         # RET
+		0xCA: JP_C_NN(FLAG_Z, true)         # JP Z,nnnn
+		0xCB: SHIFT('CB')         # shift code
+		0xCC: CALL_C_NN(FLAG_Z, true)         # CALL Z,nnnn
+		0xCD: CALL_NN()         # CALL nnnn
+		0xCE: ADC_A "nn"         # ADC A,nn
+		0xCF: RST(0x0008)         # RST 0x08
+		0xD0: RET_C(FLAG_C, false)         # RET NC
+		0xD1: POP_RR(rpDE)         # POP DE
+		0xD2: JP_C_NN(FLAG_C, false)         # JP NC,nnnn
+		0xD3: OUT_iNi_A()         # OUT (nn),A
+		0xD4: CALL_C_NN(FLAG_C, false)         # CALL NC,nnnn
+		0xD5: PUSH_RR(rpDE)         # PUSH DE
+		0xD6: SUB_A "nn"         # SUB nn
+		0xD7: RST(0x0010)         # RST 0x10
+		0xD8: RET_C(FLAG_C, true)         # RET C
+		0xD9: EXX()         # EXX
+		0xDA: JP_C_NN(FLAG_C, true)         # JP C,nnnn
+		0xDB: IN_A_N()         # IN A,(nn)
+		0xDC: CALL_C_NN(FLAG_C, true)         # CALL C,nnnn
+		0xDD: SHIFT('DD')         # shift code
+		0xDE: SBC_A "nn"         # SBC A,nn
+		0xDF: RST(0x0018)         # RST 0x18
+		0xE0: RET_C(FLAG_P, false)         # RET PO
+		0xE1: POP_RR(rpHL)         # POP HL
+		0xE2: JP_C_NN(FLAG_P, false)         # JP PO,nnnn
+		0xE3: EX_iSPi_RR(rpHL)         # EX (SP),HL
+		0xE4: CALL_C_NN(FLAG_P, false)         # CALL PO,nnnn
+		0xE5: PUSH_RR(rpHL)         # PUSH HL
+		0xE6: AND_A "nn"         # AND nn
+		0xE7: RST(0x0020)         # RST 0x20
+		0xE8: RET_C(FLAG_P, true)         # RET PE
+		0xE9: JP_RR(rpHL)         # JP (HL)
+		0xEA: JP_C_NN(FLAG_P, true)         # JP PE,nnnn
+		0xEB: EX_RR_RR(rpDE, rpHL)         # EX DE,HL
+		0xEC: CALL_C_NN(FLAG_P, true)         # CALL PE,nnnn
+		0xED: SHIFT('ED')         # shift code
+		0xEE: XOR_A "nn"         # XOR nn
+		0xEF: RST(0x0028)         # RST 0x28
+		0xF0: RET_C(FLAG_S, false)         # RET P
+		0xF1: POP_RR(rpAF)         # POP AF
+		0xF2: JP_C_NN(FLAG_S, false)         # JP NZ,nnnn
+		0xF3: DI()         # DI
+		0xF4: CALL_C_NN(FLAG_S, false)         # CALL P,nnnn
+		0xF5: PUSH_RR(rpAF)         # PUSH AF
+		0xF6: OR_A "nn"         # OR nn
+		0xF7: RST(0x0030)         # RST 0x30
+		0xF8: RET_C(FLAG_S, true)         # RET M
+		0xF9: LD_RR_RR(rpSP, rpHL)         # LD SP,HL
+		0xFA: JP_C_NN(FLAG_S, true)         # JP M,nnnn
+		0xFB: EI()         # EI
+		0xFC: CALL_C_NN(FLAG_S, true)         # CALL M,nnnn
+		0xFD: SHIFT('FD')         # shift code
+		0xFE: CP_A "nn"         # CP nn
+		0xFF: RST(0x0038)         # RST 0x38
+		0x100: 0
+	}
+
+	###
+	Assemble and evaluate the final JS code for the Z80 component.
+	The indirection on 'eval' causes most browsers to evaluate it in the global
+	scope, giving a significant speed boost
+	###
+	defineZ80JS = """
+		window.Z80 = function(opts) {
+			var self = {};
+
+			#{setUpStateJS}
+
+			self.requestInterrupt = function(dataBus) {
+				interruptPending = true;
+				interruptDataBus = dataBus & 0xffff;
+				/* TODO: use event scheduling to keep the interrupt line active for a fixed
+				~48T window, to support retriggered interrupts and interrupt blocking via
+				chains of EI or DD/FD prefixes */
+			}
+			var z80Interrupt = function() {
+				if (iff1) {
+					if (halted) {
+						/* move PC on from the HALT opcode */
+						regPairs[#{rpPC}]++;
+						halted = false;
+					}
+
+					iff1 = iff2 = 0;
+
+					/* push current PC in readiness for call to interrupt handler */
+					regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] >> 8);
+					regPairs[#{rpSP}]--; WRITEMEM(regPairs[#{rpSP}], regPairs[#{rpPC}] & 0xff);
+
+					/* TODO: R register */
+
+					switch (im) {
+						case 0:
+							regPairs[#{rpPC}] = interruptDataBus; // assume always RST
+							tstates += 6;
+							break;
+						case 1:
+							regPairs[#{rpPC}] = 0x0038;
+							tstates += 7;
+							break;
+						case 2:
+							inttemp = (regs[#{rI}] << 8) | (interruptDataBus & 0xff);
+							l = READMEM(inttemp);
+							inttemp = (inttemp+1) & 0xffff;
+							h = READMEM(inttemp);
+							console.log(hex(interruptDataBus), hex(inttemp), hex(l), hex(h));
+							regPairs[#{rpPC}] = (h<<8) | l;
+							tstates += 7;
+							break;
+					}
+				}
+			};
+
+			self.runFrame = function(frameLength) {
+				var lastOpcodePrefix, offset, opcode;
+
+				while (tstates < frameLength || opcodePrefix) {
+					if (interruptible && interruptPending) {
+						z80Interrupt();
+						interruptPending = false;
+					}
+					interruptible = true; /* unless overridden by opcode */
+					lastOpcodePrefix = opcodePrefix;
+					opcodePrefix = '';
+					switch (lastOpcodePrefix) {
+						case '':
+							CONTEND_READ(regPairs[#{rpPC}], 4);
+							opcode = memory.read(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							regs[#{rR}] = ((regs[#{rR}] + 1) & 0x7f) | (regs[#{rR}] & 0x80);
+							#{opcodeSwitch(OPCODE_RUN_STRINGS, null, opts.traps)}
+							break;
+						case 'CB':
+							CONTEND_READ(regPairs[#{rpPC}], 4);
+							opcode = memory.read(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							regs[#{rR}] = ((regs[#{rR}] + 1) & 0x7f) | (regs[#{rR}] & 0x80);
+							#{opcodeSwitch(OPCODE_RUN_STRINGS_CB)}
+							break;
+						case 'DD':
+							CONTEND_READ(regPairs[#{rpPC}], 4);
+							opcode = memory.read(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							regs[#{rR}] = ((regs[#{rR}] + 1) & 0x7f) | (regs[#{rR}] & 0x80);
+							#{opcodeSwitch(OPCODE_RUN_STRINGS_DD, OPCODE_RUN_STRINGS)}
+							break;
+						case 'DDCB':
+							offset = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							if (offset & 0x80) offset -= 0x100;
+							CONTEND_READ(regPairs[#{rpPC}], 3);
+							opcode = memory.read(regPairs[#{rpPC}]);
+							CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+							CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+							regPairs[#{rpPC}]++;
+							#{opcodeSwitch(OPCODE_RUN_STRINGS_DDCB)}
+							break;
+						case 'ED':
+							CONTEND_READ(regPairs[#{rpPC}], 4);
+							opcode = memory.read(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							regs[#{rR}] = ((regs[#{rR}] + 1) & 0x7f) | (regs[#{rR}] & 0x80);
+							#{opcodeSwitch(OPCODE_RUN_STRINGS_ED)}
+							break;
+						case 'FD':
+							CONTEND_READ(regPairs[#{rpPC}], 4);
+							opcode = memory.read(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							regs[#{rR}] = ((regs[#{rR}] + 1) & 0x7f) | (regs[#{rR}] & 0x80);
+							#{opcodeSwitch(OPCODE_RUN_STRINGS_FD, OPCODE_RUN_STRINGS)}
+							break;
+						case 'FDCB':
+							offset = READMEM(regPairs[#{rpPC}]); regPairs[#{rpPC}]++;
+							if (offset & 0x80) offset -= 0x100;
+							CONTEND_READ(regPairs[#{rpPC}], 3);
+							opcode = memory.read(regPairs[#{rpPC}]);
+							CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+							CONTEND_READ_NO_MREQ(regPairs[#{rpPC}], 1);
+							regPairs[#{rpPC}]++;
+							#{opcodeSwitch(OPCODE_RUN_STRINGS_FDCB)}
+							break;
+						default:
+							throw("Unknown opcode prefix: " + lastOpcodePrefix);
+					}
+				}
+				while (display.nextEventTime != null && display.nextEventTime <= tstates) display.doEvent();
+			};
+
+			self.reset = function() {
+				regPairs[#{rpPC}] = regPairs[#{rpIR}] = 0;
+				iff1 = 0; iff2 = 0; im = 0; halted = false;
+			};
+
+			self.loadState = function(snapRegs) {
+				regPairs[#{rpAF}] = snapRegs['AF'];
+				regPairs[#{rpBC}] = snapRegs['BC'];
+				regPairs[#{rpDE}] = snapRegs['DE'];
+				regPairs[#{rpHL}] = snapRegs['HL'];
+				regPairs[#{rpAF_}] = snapRegs['AF_'];
+				regPairs[#{rpBC_}] = snapRegs['BC_'];
+				regPairs[#{rpDE_}] = snapRegs['DE_'];
+				regPairs[#{rpHL_}] = snapRegs['HL_'];
+				regPairs[#{rpIX}] = snapRegs['IX'];
+				regPairs[#{rpIY}] = snapRegs['IY'];
+				regPairs[#{rpSP}] = snapRegs['SP'];
+				regPairs[#{rpPC}] = snapRegs['PC'];
+				regPairs[#{rpIR}] = snapRegs['IR'];
+				iff1 = snapRegs['iff1'];
+				iff2 = snapRegs['iff2'];
+				im = snapRegs['im'];
+				halted = snapRegs['halted'];
+				tstates = snapRegs['tstates'];
+				interruptPending = snapRegs['intp'];
+				interruptDataBus = snapRegs['intd'];
+			};
+
+			self.saveState = function() {
+				return {
+					AF: regPairs[#{rpAF}],
+					BC: regPairs[#{rpBC}],
+					DE: regPairs[#{rpDE}],
+					HL: regPairs[#{rpHL}],
+					AF_: regPairs[#{rpAF_}],
+					BC_: regPairs[#{rpBC_}],
+					DE_: regPairs[#{rpDE_}],
+					HL_: regPairs[#{rpHL_}],
+					IX: regPairs[#{rpIX}],
+					IY: regPairs[#{rpIY}],
+					SP: regPairs[#{rpSP}],
+					PC: regPairs[#{rpPC}],
+					IR: regPairs[#{rpIR}],
+					iff1: iff1,
+					iff2: iff2,
+					im: im,
+					halted: halted,
+					tstates: tstates,
+					intp: interruptPending,
+					intd: interruptDataBus,
+				};
+			};
+
+			/* Register / flag accessors (used for tape trapping and test harness) */
+			self.getAF = function() {
+				return regPairs[#{rpAF}];
+			}
+			self.getBC = function() {
+				return regPairs[#{rpBC}];
+			}
+			self.getDE = function() {
+				return regPairs[#{rpDE}];
+			}
+			self.getHL = function() {
+				return regPairs[#{rpHL}];
+			}
+			self.getAF_ = function() {
+				return regPairs[#{rpAF_}];
+			}
+			self.getBC_ = function() {
+				return regPairs[#{rpBC_}];
+			}
+			self.getDE_ = function() {
+				return regPairs[#{rpDE_}];
+			}
+			self.getHL_ = function() {
+				return regPairs[#{rpHL_}];
+			}
+			self.getIX = function() {
+				return regPairs[#{rpIX}];
+			}
+			self.getIY = function() {
+				return regPairs[#{rpIY}];
+			}
+			self.getI = function() {
+				return regs[#{rI}];
+			}
+			self.getR = function() {
+				return regs[#{rR}];
+			}
+			self.getSP = function() {
+				return regPairs[#{rpSP}];
+			}
+			self.getPC = function() {
+				return regPairs[#{rpPC}];
+			}
+			self.getIFF1 = function() {
+				return iff1;
+			}
+			self.getIFF2 = function() {
+				return iff2;
+			}
+			self.getIM = function() {
+				return im;
+			}
+			self.getHalted = function() {
+				return halted;
+			}
+
+			self.setAF = function(val) {
+				regPairs[#{rpAF}] = val;
+			}
+			self.setBC = function(val) {
+				regPairs[#{rpBC}] = val;
+			}
+			self.setDE = function(val) {
+				regPairs[#{rpDE}] = val;
+			}
+			self.setHL = function(val) {
+				regPairs[#{rpHL}] = val;
+			}
+			self.setAF_ = function(val) {
+				regPairs[#{rpAF_}] = val;
+			}
+			self.setBC_ = function(val) {
+				regPairs[#{rpBC_}] = val;
+			}
+			self.setDE_ = function(val) {
+				regPairs[#{rpDE_}] = val;
+			}
+			self.setHL_ = function(val) {
+				regPairs[#{rpHL_}] = val;
+			}
+			self.setIX = function(val) {
+				regPairs[#{rpIX}] = val;
+			}
+			self.setIY = function(val) {
+				regPairs[#{rpIY}] = val;
+			}
+			self.setI = function(val) {
+				regs[#{rI}] = val;
+			}
+			self.setR = function(val) {
+				regs[#{rR}] = val;
+			}
+			self.setSP = function(val) {
+				regPairs[#{rpSP}] = val;
+			}
+			self.setPC = function(val) {
+				regPairs[#{rpPC}] = val;
+			}
+			self.setIFF1 = function(val) {
+				iff1 = val;
+			}
+			self.setIFF2 = function(val) {
+				iff2 = val;
+			}
+			self.setIM = function(val) {
+				im = val;
+			}
+			self.setHalted = function(val) {
+				halted = val;
+			}
+
+			self.getTstates = function() {
+				return tstates;
+			}
+			self.setTstates = function(val) {
+				tstates = val;
+			}
+
+			self.getCarry_ = function() {
+				return regs[#{rF_}] & #{FLAG_C};
+			};
+			self.setCarry = function(val) {
+				if (val) {
+					regs[#{rF}] |= #{FLAG_C};
+				} else {
+					regs[#{rF}] &= #{~FLAG_C};
+				}
+			};
+			self.getA_ = function() {
+				return regs[#{rA_}];
+			};
+
+			return self;
+		};
+	"""
+	# Apply macro expansions
+	defineZ80JS = defineZ80JS.replace(/READMEM\((.*?)\)/g, '(CONTEND_READ($1, 3), memory.read($1))');
+	defineZ80JS = defineZ80JS.replace(/WRITEMEM\((.*?),(.*?)\)/g, """
+		CONTEND_WRITE($1, 3);
+		while (display.nextEventTime != null && display.nextEventTime < tstates) display.doEvent();
+		memory.write($1,$2);
+	""");
+	if opts.applyContention
+		defineZ80JS = defineZ80JS.replace(/CONTEND_READ\((.*?),(.*?)\)/g,
+			'(tstates += memory.contend($1, tstates) + ($2))');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_WRITE\((.*?),(.*?)\)/g,
+			'(tstates += memory.contend($1, tstates) + ($2))');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_READ_NO_MREQ\((.*?),(.*?)\)/g,
+			'(tstates += memory.contend($1, tstates) + ($2))');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_WRITE_NO_MREQ\((.*?),(.*?)\)/g,
+			'(tstates += memory.contend($1, tstates) + ($2))');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_PORT_EARLY\((.*?)\)/g,
+			"""
+				var isContendedMemory = memory.isContended($1);
+				var isULAPort = ioBus.isULAPort($1);
+				if (isContendedMemory) tstates += ioBus.contend($1, tstates);
+				tstates += 1;
+				while (display.nextEventTime != null && display.nextEventTime < tstates) display.doEvent();
+			""");
+		defineZ80JS = defineZ80JS.replace(/CONTEND_PORT_LATE\((.*?)\)/g,
+			"""
+				if (isContendedMemory || isULAPort) {
+					ioBus.contend($1);
+					tstates += 1;
+					if (!isULAPort) {
+						ioBus.contend($1); tstates += 1;
+						ioBus.contend($1); tstates += 1;
+					} else {
+						tstates += 2;
+					}
+				} else {
+					tstates += 3;
+				}
+			""");
+	else
+		defineZ80JS = defineZ80JS.replace(/CONTEND_READ\((.*?),(.*?)\)/g, 'tstates += ($2)');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_WRITE\((.*?),(.*?)\)/g, 'tstates += ($2)');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_READ_NO_MREQ\((.*?),(.*?)\)/g, 'tstates += ($2)');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_WRITE_NO_MREQ\((.*?),(.*?)\)/g, 'tstates += ($2)');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_PORT_EARLY\((.*?)\)/g, 'tstates += 1');
+		defineZ80JS = defineZ80JS.replace(/CONTEND_PORT_LATE\((.*?)\)/g, 'tstates += 3');
+
+	# console.log(defineZ80JS);
+	indirectEval = eval
+	indirectEval(defineZ80JS);
diff --git a/src/cpu/z80.js b/src/cpu/z80.js
index a8bbf2bf..6cefc455 100644
--- a/src/cpu/z80.js
+++ b/src/cpu/z80.js
@@ -20,7 +20,7 @@ of the host processor, as typed arrays are native-endian
  */
 
 (function() {
-  global.buildZ80 = function(opts) {
+  window.buildZ80 = function(opts) {
     var ADC_A, ADC_HL_RR, ADD_A, ADD_RR_RR, AND_A, BIT_N_R, BIT_N_iHLi, BIT_N_iRRpNNi, CALL_C_NN, CALL_NN, CCF, CPD, CPDR, CPI, CPIR, CPIR_CPDR, CPI_CPD, CPL, CP_A, DAA, DEC, DEC_RR, DI, DJNZ_N, EI, EXX, EX_RR_RR, EX_iSPi_RR, FLAG_3, FLAG_5, FLAG_C, FLAG_H, FLAG_N, FLAG_P, FLAG_S, FLAG_V, FLAG_Z, HALT, IM, INC, INC_RR, IND, INDR, INI, INIR, INIR_INDR, INI_IND, IN_A_N, IN_F_iCi, IN_R_iCi, JP_C_NN, JP_NN, JP_RR, JR_C_N, JR_N, LDBITOP, LDD, LDDR, LDI, LDIR, LDIR_LDDR, LDI_LDD, LDSHIFTOP, LD_A_iNNi, LD_RR_NN, LD_RR_RR, LD_RR_iNNi, LD_R_N, LD_R_R, LD_R_iRRi, LD_R_iRRpNNi, LD_iNNi_A, LD_iNNi_RR, LD_iRRi_N, LD_iRRi_R, LD_iRRpNNi_N, LD_iRRpNNi_R, NEG, NOP, OPCODE_RUN_STRINGS, OPCODE_RUN_STRINGS_CB, OPCODE_RUN_STRINGS_DD, OPCODE_RUN_STRINGS_DDCB, OPCODE_RUN_STRINGS_ED, OPCODE_RUN_STRINGS_FD, OPCODE_RUN_STRINGS_FDCB, OR_A, OTDR, OTIR, OTIR_OTDR, OUTD, OUTI, OUTI_OUTD, OUT_iCi_0, OUT_iCi_R, OUT_iNi_A, POP_RR, PUSH_RR, RES, RET, RETN, RET_C, RL, RLA, RLC, RLCA, RLD, RR, RRA, RRC, RRCA, RRD, RST, SBC_A, SBC_HL_RR, SCF, SET, SHIFT, SLA, SLL, SRA, SRL, SUB_A, XOR_A, defineZ80JS, endianTestBuffer, endianTestUint16, endianTestUint8, generateddfdOpcodeSet, generateddfdcbOpcodeSet, getParamBoilerplate, indirectEval, isBigEndian, opcodeSwitch, rA, rA_, rB, rB_, rC, rC_, rD, rD_, rE, rE_, rF, rF_, rH, rH_, rI, rIXH, rIXL, rIYH, rIYL, rL, rL_, rR, registerIndexes, registerPairIndexes, rpAF, rpAF_, rpBC, rpBC_, rpDE, rpDE_, rpHL, rpHL_, rpIR, rpIX, rpIY, rpPC, rpSP, setUpStateJS;
     if (opts == null) {
       opts = {};
@@ -131,7 +131,7 @@ of the host processor, as typed arrays are native-endian
     FLAG_5 = 0x20;
     FLAG_Z = 0x40;
     FLAG_S = 0x80;
-    setUpStateJS = "var memory = opts.memory;\nvar ioBus = opts.ioBus;\nvar display = opts.display;\n\nvar registerBuffer = new ArrayBuffer(26);\n/* Expose registerBuffer as both register pairs and individual registers */\nvar regPairs = new Uint16Array(registerBuffer);\nvar regs = new Uint8Array(registerBuffer);\n\nvar tstates = 0; /* number of tstates since start of this frame */\nvar iff1 = 0;\nvar iff2 = 0;\nvar im = 0;\nvar halted = false;\n\n/* tables for setting Z80 flags */\n\n/*\n	Whether a half carry occurred or not can be determined by looking at\n	the 3rd bit of the two arguments and the result; these are hashed\n	into this table in the form r12, where r is the 3rd bit of the\n	result, 1 is the 3rd bit of the 1st argument and 2 is the\n	third bit of the 2nd argument; the tables differ for add and subtract\n	operations\n*/\nvar halfcarryAddTable = new Uint8Array([0, " + FLAG_H + ", " + FLAG_H + ", " + FLAG_H + ", 0, 0, 0, " + FLAG_H + "]);\nvar halfcarrySubTable = new Uint8Array([0, 0, " + FLAG_H + ", 0, " + FLAG_H + ", 0, " + FLAG_H + ", " + FLAG_H + "]);\n\n/*\n	Similarly, overflow can be determined by looking at the 7th bits; again\n	the hash into this table is r12\n*/\nvar overflowAddTable = new Uint8Array([0, 0, 0, " + FLAG_V + ", " + FLAG_V + ", 0, 0, 0]);\nvar overflowSubTable = new Uint8Array([0, " + FLAG_V + ", 0, 0, 0, 0, " + FLAG_V + ", 0]);\n\nvar sz53Table = new Uint8Array(0x100); /* The S, Z, 5 and 3 bits of the index */\nvar parityTable = new Uint8Array(0x100); /* The parity of the lookup value */\nvar sz53pTable = new Uint8Array(0x100); /* OR the above two tables together */\n\nfor (var i = 0; i < 0x100; i++) {\n	sz53Table[i] = i & ( " + (FLAG_3 | FLAG_5 | FLAG_S) + " );\n	var j = i;\n	var parity = 0;\n	for (var k = 0; k < 8; k++) {\n		parity ^= j & 1;\n		j >>=1;\n	}\n\n	parityTable[i] = (parity ? 0 : " + FLAG_P + ");\n	sz53pTable[i] = sz53Table[i] | parityTable[i];\n	\n	sz53Table[0] |= " + FLAG_Z + ";\n	sz53pTable[0] |= " + FLAG_Z + ";\n}\n\nvar interruptible = true;\nvar interruptPending = false;\nvar opcodePrefix = '';";
+    setUpStateJS = "var memory = opts.memory;\nvar ioBus = opts.ioBus;\nvar display = opts.display;\n\nvar registerBuffer = new ArrayBuffer(26);\n/* Expose registerBuffer as both register pairs and individual registers */\nvar regPairs = new Uint16Array(registerBuffer);\nvar regs = new Uint8Array(registerBuffer);\n\nvar tstates = 0; /* number of tstates since start of this frame */\nvar iff1 = 0;\nvar iff2 = 0;\nvar im = 0;\nvar halted = false;\n\n/* tables for setting Z80 flags */\n\n/*\n	Whether a half carry occurred or not can be determined by looking at\n	the 3rd bit of the two arguments and the result; these are hashed\n	into this table in the form r12, where r is the 3rd bit of the\n	result, 1 is the 3rd bit of the 1st argument and 2 is the\n	third bit of the 2nd argument; the tables differ for add and subtract\n	operations\n*/\nvar halfcarryAddTable = new Uint8Array([0, " + FLAG_H + ", " + FLAG_H + ", " + FLAG_H + ", 0, 0, 0, " + FLAG_H + "]);\nvar halfcarrySubTable = new Uint8Array([0, 0, " + FLAG_H + ", 0, " + FLAG_H + ", 0, " + FLAG_H + ", " + FLAG_H + "]);\n\n/*\n	Similarly, overflow can be determined by looking at the 7th bits; again\n	the hash into this table is r12\n*/\nvar overflowAddTable = new Uint8Array([0, 0, 0, " + FLAG_V + ", " + FLAG_V + ", 0, 0, 0]);\nvar overflowSubTable = new Uint8Array([0, " + FLAG_V + ", 0, 0, 0, 0, " + FLAG_V + ", 0]);\n\nvar sz53Table = new Uint8Array(0x100); /* The S, Z, 5 and 3 bits of the index */\nvar parityTable = new Uint8Array(0x100); /* The parity of the lookup value */\nvar sz53pTable = new Uint8Array(0x100); /* OR the above two tables together */\n\nfor (var i = 0; i < 0x100; i++) {\n	sz53Table[i] = i & ( " + (FLAG_3 | FLAG_5 | FLAG_S) + " );\n	var j = i;\n	var parity = 0;\n	for (var k = 0; k < 8; k++) {\n		parity ^= j & 1;\n		j >>=1;\n	}\n\n	parityTable[i] = (parity ? 0 : " + FLAG_P + ");\n	sz53pTable[i] = sz53Table[i] | parityTable[i];\n\n	sz53Table[0] |= " + FLAG_Z + ";\n	sz53pTable[0] |= " + FLAG_Z + ";\n}\n\nvar interruptible = true;\nvar interruptPending = false;\nvar interruptDataBus = 0;\nvar opcodePrefix = '';";
 
     /*
     		Boilerplate generator: a helper to deal with classes of opcodes which perform
@@ -143,7 +143,7 @@ of the host processor, as typed arrays are native-endian
     		'v': an expression with no side effects, evaluating to the operand's value. (Must also be a valid lvalue for assignment)
     		'trunc': an expression such as '& 0xff' to truncate v back to its proper range, if appropriate
     		'setter': a block of code that writes an updated value back to its proper location, if any
-
+    
     		Passing hasIXOffsetAlready = true indicates that we have already read the offset value of (IX+nn)/(IY+nn)
     		into a variable 'offset' (necessary because DDCB/FFCB instructions put this before the final opcode byte).
      */
@@ -521,7 +521,7 @@ of the host processor, as typed arrays are native-endian
       return operand.getter + "\n" + operand.v + " &= " + hexMask + ";\n" + operand.setter;
     };
     RET = function() {
-      return "var l = READMEM(regPairs[" + rpSP + "]); regPairs[" + rpSP + "]++;\nvar h = READMEM(regPairs[" + rpSP + "]); regPairs[" + rpSP + "]++; \nregPairs[" + rpPC + "] = (h<<8) | l;";
+      return "var l = READMEM(regPairs[" + rpSP + "]); regPairs[" + rpSP + "]++;\nvar h = READMEM(regPairs[" + rpSP + "]); regPairs[" + rpSP + "]++;\nregPairs[" + rpPC + "] = (h<<8) | l;";
     };
     RET_C = function(flag, sense) {
       var condition;
@@ -1666,7 +1666,7 @@ of the host processor, as typed arrays are native-endian
     	The indirection on 'eval' causes most browsers to evaluate it in the global
     	scope, giving a significant speed boost
      */
-    defineZ80JS = "global.Z80 = function(opts) {\n	var self = {};\n\n	" + setUpStateJS + "\n\n	self.requestInterrupt = function() {\n		interruptPending = true;\n		/* TODO: use event scheduling to keep the interrupt line active for a fixed\n		~48T window, to support retriggered interrupts and interrupt blocking via\n		chains of EI or DD/FD prefixes */\n	}\n	var z80Interrupt = function() {\n		if (iff1) {\n			if (halted) {\n				/* move PC on from the HALT opcode */\n				regPairs[" + rpPC + "]++;\n				halted = false;\n			}\n\n			iff1 = iff2 = 0;\n\n			/* push current PC in readiness for call to interrupt handler */\n			regPairs[" + rpSP + "]--; WRITEMEM(regPairs[" + rpSP + "], regPairs[" + rpPC + "] >> 8);\n			regPairs[" + rpSP + "]--; WRITEMEM(regPairs[" + rpSP + "], regPairs[" + rpPC + "] & 0xff);\n			\n			/* TODO: R register */\n			\n			switch (im) {\n				case 0:\n					regPairs[" + rpPC + "] = 0x0038;\n					tstates += 6;\n					break;\n				case 1:\n					regPairs[" + rpPC + "] = 0x0038;\n					tstates += 7;\n					break;\n				case 2:\n					inttemp = (regs[" + rI + "] << 8) | 0xff;\n					l = READMEM(inttemp);\n					inttemp = (inttemp+1) & 0xffff;\n					h = READMEM(inttemp);\n					regPairs[" + rpPC + "] = (h<<8) | l;\n					tstates += 7;\n					break;\n			}\n		}\n	};\n\n	self.runFrame = function(frameLength) {\n		var lastOpcodePrefix, offset, opcode;\n\n		while (tstates < frameLength || opcodePrefix) {\n			if (interruptible && interruptPending) {\n				z80Interrupt();\n				interruptPending = false;\n			}\n			interruptible = true; /* unless overridden by opcode */\n			lastOpcodePrefix = opcodePrefix;\n			opcodePrefix = '';\n			switch (lastOpcodePrefix) {\n				case '':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS, null, opts.traps)) + "\n					break;\n				case 'CB':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_CB)) + "\n					break;\n				case 'DD':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_DD, OPCODE_RUN_STRINGS)) + "\n					break;\n				case 'DDCB':\n					offset = READMEM(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					if (offset & 0x80) offset -= 0x100;\n					CONTEND_READ(regPairs[" + rpPC + "], 3);\n					opcode = memory.read(regPairs[" + rpPC + "]);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					regPairs[" + rpPC + "]++;\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_DDCB)) + "\n					break;\n				case 'ED':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_ED)) + "\n					break;\n				case 'FD':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_FD, OPCODE_RUN_STRINGS)) + "\n					break;\n				case 'FDCB':\n					offset = READMEM(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					if (offset & 0x80) offset -= 0x100;\n					CONTEND_READ(regPairs[" + rpPC + "], 3);\n					opcode = memory.read(regPairs[" + rpPC + "]);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					regPairs[" + rpPC + "]++;\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_FDCB)) + "\n					break;\n				default:\n					throw(\"Unknown opcode prefix: \" + lastOpcodePrefix);\n			}\n		}\n		while (display.nextEventTime != null && display.nextEventTime <= tstates) display.doEvent();\n	};\n\n	self.reset = function() {\n		regPairs[" + rpPC + "] = regPairs[" + rpIR + "] = 0;\n		iff1 = 0; iff2 = 0; im = 0; halted = false;\n	};\n\n	self.loadFromSnapshot = function(snapRegs) {\n		regPairs[" + rpAF + "] = snapRegs['AF'];\n		regPairs[" + rpBC + "] = snapRegs['BC'];\n		regPairs[" + rpDE + "] = snapRegs['DE'];\n		regPairs[" + rpHL + "] = snapRegs['HL'];\n		regPairs[" + rpAF_ + "] = snapRegs['AF_'];\n		regPairs[" + rpBC_ + "] = snapRegs['BC_'];\n		regPairs[" + rpDE_ + "] = snapRegs['DE_'];\n		regPairs[" + rpHL_ + "] = snapRegs['HL_'];\n		regPairs[" + rpIX + "] = snapRegs['IX'];\n		regPairs[" + rpIY + "] = snapRegs['IY'];\n		regPairs[" + rpSP + "] = snapRegs['SP'];\n		regPairs[" + rpPC + "] = snapRegs['PC'];\n		regPairs[" + rpIR + "] = snapRegs['IR'];\n		iff1 = snapRegs['iff1'];\n		iff2 = snapRegs['iff2'];\n		im = snapRegs['im'];\n	};\n\n	/* Register / flag accessors (used for tape trapping and test harness) */\n	self.getAF = function() {\n		return regPairs[" + rpAF + "];\n	}\n	self.getBC = function() {\n		return regPairs[" + rpBC + "];\n	}\n	self.getDE = function() {\n		return regPairs[" + rpDE + "];\n	}\n	self.getHL = function() {\n		return regPairs[" + rpHL + "];\n	}\n	self.getAF_ = function() {\n		return regPairs[" + rpAF_ + "];\n	}\n	self.getBC_ = function() {\n		return regPairs[" + rpBC_ + "];\n	}\n	self.getDE_ = function() {\n		return regPairs[" + rpDE_ + "];\n	}\n	self.getHL_ = function() {\n		return regPairs[" + rpHL_ + "];\n	}\n	self.getIX = function() {\n		return regPairs[" + rpIX + "];\n	}\n	self.getIY = function() {\n		return regPairs[" + rpIY + "];\n	}\n	self.getI = function() {\n		return regs[" + rI + "];\n	}\n	self.getR = function() {\n		return regs[" + rR + "];\n	}\n	self.getSP = function() {\n		return regPairs[" + rpSP + "];\n	}\n	self.getPC = function() {\n		return regPairs[" + rpPC + "];\n	}\n	self.getIFF1 = function() {\n		return iff1;\n	}\n	self.getIFF2 = function() {\n		return iff2;\n	}\n	self.getIM = function() {\n		return im;\n	}\n	self.getHalted = function() {\n		return halted;\n	}\n\n	self.setAF = function(val) {\n		regPairs[" + rpAF + "] = val;\n	}\n	self.setBC = function(val) {\n		regPairs[" + rpBC + "] = val;\n	}\n	self.setDE = function(val) {\n		regPairs[" + rpDE + "] = val;\n	}\n	self.setHL = function(val) {\n		regPairs[" + rpHL + "] = val;\n	}\n	self.setAF_ = function(val) {\n		regPairs[" + rpAF_ + "] = val;\n	}\n	self.setBC_ = function(val) {\n		regPairs[" + rpBC_ + "] = val;\n	}\n	self.setDE_ = function(val) {\n		regPairs[" + rpDE_ + "] = val;\n	}\n	self.setHL_ = function(val) {\n		regPairs[" + rpHL_ + "] = val;\n	}\n	self.setIX = function(val) {\n		regPairs[" + rpIX + "] = val;\n	}\n	self.setIY = function(val) {\n		regPairs[" + rpIY + "] = val;\n	}\n	self.setI = function(val) {\n		regs[" + rI + "] = val;\n	}\n	self.setR = function(val) {\n		regs[" + rR + "] = val;\n	}\n	self.setSP = function(val) {\n		regPairs[" + rpSP + "] = val;\n	}\n	self.setPC = function(val) {\n		regPairs[" + rpPC + "] = val;\n	}\n	self.setIFF1 = function(val) {\n		iff1 = val;\n	}\n	self.setIFF2 = function(val) {\n		iff2 = val;\n	}\n	self.setIM = function(val) {\n		im = val;\n	}\n	self.setHalted = function(val) {\n		halted = val;\n	}\n\n	self.getTstates = function() {\n		return tstates;\n	}\n	self.setTstates = function(val) {\n		tstates = val;\n	}\n\n	self.getCarry_ = function() {\n		return regs[" + rF_ + "] & " + FLAG_C + ";\n	};\n	self.setCarry = function(val) {\n		if (val) {\n			regs[" + rF + "] |= " + FLAG_C + ";\n		} else {\n			regs[" + rF + "] &= " + (~FLAG_C) + ";\n		}\n	};\n	self.getA_ = function() {\n		return regs[" + rA_ + "];\n	};\n\n	return self;\n};";
+    defineZ80JS = "window.Z80 = function(opts) {\n	var self = {};\n\n	" + setUpStateJS + "\n\n	self.requestInterrupt = function(dataBus) {\n		interruptPending = true;\n		interruptDataBus = dataBus & 0xffff;\n		/* TODO: use event scheduling to keep the interrupt line active for a fixed\n		~48T window, to support retriggered interrupts and interrupt blocking via\n		chains of EI or DD/FD prefixes */\n	}\n	var z80Interrupt = function() {\n		if (iff1) {\n			if (halted) {\n				/* move PC on from the HALT opcode */\n				regPairs[" + rpPC + "]++;\n				halted = false;\n			}\n\n			iff1 = iff2 = 0;\n\n			/* push current PC in readiness for call to interrupt handler */\n			regPairs[" + rpSP + "]--; WRITEMEM(regPairs[" + rpSP + "], regPairs[" + rpPC + "] >> 8);\n			regPairs[" + rpSP + "]--; WRITEMEM(regPairs[" + rpSP + "], regPairs[" + rpPC + "] & 0xff);\n\n			/* TODO: R register */\n\n			switch (im) {\n				case 0:\n					regPairs[" + rpPC + "] = interruptDataBus; // assume always RST\n					tstates += 6;\n					break;\n				case 1:\n					regPairs[" + rpPC + "] = 0x0038;\n					tstates += 7;\n					break;\n				case 2:\n					inttemp = (regs[" + rI + "] << 8) | (interruptDataBus & 0xff);\n					l = READMEM(inttemp);\n					inttemp = (inttemp+1) & 0xffff;\n					h = READMEM(inttemp);\n					console.log(hex(interruptDataBus), hex(inttemp), hex(l), hex(h));\n					regPairs[" + rpPC + "] = (h<<8) | l;\n					tstates += 7;\n					break;\n			}\n		}\n	};\n\n	self.runFrame = function(frameLength) {\n		var lastOpcodePrefix, offset, opcode;\n\n		while (tstates < frameLength || opcodePrefix) {\n			if (interruptible && interruptPending) {\n				z80Interrupt();\n				interruptPending = false;\n			}\n			interruptible = true; /* unless overridden by opcode */\n			lastOpcodePrefix = opcodePrefix;\n			opcodePrefix = '';\n			switch (lastOpcodePrefix) {\n				case '':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS, null, opts.traps)) + "\n					break;\n				case 'CB':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_CB)) + "\n					break;\n				case 'DD':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_DD, OPCODE_RUN_STRINGS)) + "\n					break;\n				case 'DDCB':\n					offset = READMEM(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					if (offset & 0x80) offset -= 0x100;\n					CONTEND_READ(regPairs[" + rpPC + "], 3);\n					opcode = memory.read(regPairs[" + rpPC + "]);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					regPairs[" + rpPC + "]++;\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_DDCB)) + "\n					break;\n				case 'ED':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_ED)) + "\n					break;\n				case 'FD':\n					CONTEND_READ(regPairs[" + rpPC + "], 4);\n					opcode = memory.read(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					regs[" + rR + "] = ((regs[" + rR + "] + 1) & 0x7f) | (regs[" + rR + "] & 0x80);\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_FD, OPCODE_RUN_STRINGS)) + "\n					break;\n				case 'FDCB':\n					offset = READMEM(regPairs[" + rpPC + "]); regPairs[" + rpPC + "]++;\n					if (offset & 0x80) offset -= 0x100;\n					CONTEND_READ(regPairs[" + rpPC + "], 3);\n					opcode = memory.read(regPairs[" + rpPC + "]);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					CONTEND_READ_NO_MREQ(regPairs[" + rpPC + "], 1);\n					regPairs[" + rpPC + "]++;\n					" + (opcodeSwitch(OPCODE_RUN_STRINGS_FDCB)) + "\n					break;\n				default:\n					throw(\"Unknown opcode prefix: \" + lastOpcodePrefix);\n			}\n		}\n		while (display.nextEventTime != null && display.nextEventTime <= tstates) display.doEvent();\n	};\n\n	self.reset = function() {\n		regPairs[" + rpPC + "] = regPairs[" + rpIR + "] = 0;\n		iff1 = 0; iff2 = 0; im = 0; halted = false;\n	};\n\n	self.loadState = function(snapRegs) {\n		regPairs[" + rpAF + "] = snapRegs['AF'];\n		regPairs[" + rpBC + "] = snapRegs['BC'];\n		regPairs[" + rpDE + "] = snapRegs['DE'];\n		regPairs[" + rpHL + "] = snapRegs['HL'];\n		regPairs[" + rpAF_ + "] = snapRegs['AF_'];\n		regPairs[" + rpBC_ + "] = snapRegs['BC_'];\n		regPairs[" + rpDE_ + "] = snapRegs['DE_'];\n		regPairs[" + rpHL_ + "] = snapRegs['HL_'];\n		regPairs[" + rpIX + "] = snapRegs['IX'];\n		regPairs[" + rpIY + "] = snapRegs['IY'];\n		regPairs[" + rpSP + "] = snapRegs['SP'];\n		regPairs[" + rpPC + "] = snapRegs['PC'];\n		regPairs[" + rpIR + "] = snapRegs['IR'];\n		iff1 = snapRegs['iff1'];\n		iff2 = snapRegs['iff2'];\n		im = snapRegs['im'];\n		halted = snapRegs['halted'];\n		tstates = snapRegs['tstates'];\n		interruptPending = snapRegs['intp'];\n		interruptDataBus = snapRegs['intd'];\n	};\n\n	self.saveState = function() {\n		return {\n			AF: regPairs[" + rpAF + "],\n			BC: regPairs[" + rpBC + "],\n			DE: regPairs[" + rpDE + "],\n			HL: regPairs[" + rpHL + "],\n			AF_: regPairs[" + rpAF_ + "],\n			BC_: regPairs[" + rpBC_ + "],\n			DE_: regPairs[" + rpDE_ + "],\n			HL_: regPairs[" + rpHL_ + "],\n			IX: regPairs[" + rpIX + "],\n			IY: regPairs[" + rpIY + "],\n			SP: regPairs[" + rpSP + "],\n			PC: regPairs[" + rpPC + "],\n			IR: regPairs[" + rpIR + "],\n			iff1: iff1,\n			iff2: iff2,\n			im: im,\n			halted: halted,\n			tstates: tstates,\n			intp: interruptPending,\n			intd: interruptDataBus,\n		};\n	};\n\n	/* Register / flag accessors (used for tape trapping and test harness) */\n	self.getAF = function() {\n		return regPairs[" + rpAF + "];\n	}\n	self.getBC = function() {\n		return regPairs[" + rpBC + "];\n	}\n	self.getDE = function() {\n		return regPairs[" + rpDE + "];\n	}\n	self.getHL = function() {\n		return regPairs[" + rpHL + "];\n	}\n	self.getAF_ = function() {\n		return regPairs[" + rpAF_ + "];\n	}\n	self.getBC_ = function() {\n		return regPairs[" + rpBC_ + "];\n	}\n	self.getDE_ = function() {\n		return regPairs[" + rpDE_ + "];\n	}\n	self.getHL_ = function() {\n		return regPairs[" + rpHL_ + "];\n	}\n	self.getIX = function() {\n		return regPairs[" + rpIX + "];\n	}\n	self.getIY = function() {\n		return regPairs[" + rpIY + "];\n	}\n	self.getI = function() {\n		return regs[" + rI + "];\n	}\n	self.getR = function() {\n		return regs[" + rR + "];\n	}\n	self.getSP = function() {\n		return regPairs[" + rpSP + "];\n	}\n	self.getPC = function() {\n		return regPairs[" + rpPC + "];\n	}\n	self.getIFF1 = function() {\n		return iff1;\n	}\n	self.getIFF2 = function() {\n		return iff2;\n	}\n	self.getIM = function() {\n		return im;\n	}\n	self.getHalted = function() {\n		return halted;\n	}\n\n	self.setAF = function(val) {\n		regPairs[" + rpAF + "] = val;\n	}\n	self.setBC = function(val) {\n		regPairs[" + rpBC + "] = val;\n	}\n	self.setDE = function(val) {\n		regPairs[" + rpDE + "] = val;\n	}\n	self.setHL = function(val) {\n		regPairs[" + rpHL + "] = val;\n	}\n	self.setAF_ = function(val) {\n		regPairs[" + rpAF_ + "] = val;\n	}\n	self.setBC_ = function(val) {\n		regPairs[" + rpBC_ + "] = val;\n	}\n	self.setDE_ = function(val) {\n		regPairs[" + rpDE_ + "] = val;\n	}\n	self.setHL_ = function(val) {\n		regPairs[" + rpHL_ + "] = val;\n	}\n	self.setIX = function(val) {\n		regPairs[" + rpIX + "] = val;\n	}\n	self.setIY = function(val) {\n		regPairs[" + rpIY + "] = val;\n	}\n	self.setI = function(val) {\n		regs[" + rI + "] = val;\n	}\n	self.setR = function(val) {\n		regs[" + rR + "] = val;\n	}\n	self.setSP = function(val) {\n		regPairs[" + rpSP + "] = val;\n	}\n	self.setPC = function(val) {\n		regPairs[" + rpPC + "] = val;\n	}\n	self.setIFF1 = function(val) {\n		iff1 = val;\n	}\n	self.setIFF2 = function(val) {\n		iff2 = val;\n	}\n	self.setIM = function(val) {\n		im = val;\n	}\n	self.setHalted = function(val) {\n		halted = val;\n	}\n\n	self.getTstates = function() {\n		return tstates;\n	}\n	self.setTstates = function(val) {\n		tstates = val;\n	}\n\n	self.getCarry_ = function() {\n		return regs[" + rF_ + "] & " + FLAG_C + ";\n	};\n	self.setCarry = function(val) {\n		if (val) {\n			regs[" + rF + "] |= " + FLAG_C + ";\n		} else {\n			regs[" + rF + "] &= " + (~FLAG_C) + ";\n		}\n	};\n	self.getA_ = function() {\n		return regs[" + rA_ + "];\n	};\n\n	return self;\n};";
     defineZ80JS = defineZ80JS.replace(/READMEM\((.*?)\)/g, '(CONTEND_READ($1, 3), memory.read($1))');
     defineZ80JS = defineZ80JS.replace(/WRITEMEM\((.*?),(.*?)\)/g, "CONTEND_WRITE($1, 3);\nwhile (display.nextEventTime != null && display.nextEventTime < tstates) display.doEvent();\nmemory.write($1,$2);");
     if (opts.applyContention) {
diff --git a/src/emu.js b/src/emu.js
index a8d8aa79..abb73136 100644
--- a/src/emu.js
+++ b/src/emu.js
@@ -2,6 +2,10 @@
 
 // Emulator classes
 
+function noise() {
+  return (Math.random() * 256) & 0xff;
+}
+
 function _metakeyflags(e) {
   return (e.shiftKey?2:0) | (e.ctrlKey?4:0) | (e.altKey?8:0) | (e.metaKey?16:0);
 }
@@ -11,6 +15,8 @@ function __createCanvas(mainElement, width, height) {
   var fsElement = document.createElement('div');
   fsElement.style.position = "relative";
   fsElement.style.padding = "20px";
+  if (height > width)
+    fsElement.style.margin = "20%"; // TODO
   fsElement.style.overflow = "hidden";
   fsElement.style.background = "black";
 
@@ -31,8 +37,11 @@ var RasterVideo = function(mainElement, width, height, options) {
   var canvas, ctx;
   var imageData, buf8, datau32;
 
-  this.start = function() {
+  this.create = function() {
     canvas = __createCanvas(mainElement, width, height);
+    if (options.rotate) {
+      canvas.style.transform = "rotate("+options.rotate+"deg)";
+    }
     ctx = canvas.getContext('2d');
     imageData = ctx.createImageData(width, height);
     var buf = new ArrayBuffer(imageData.data.length);
@@ -303,6 +312,23 @@ var SampleAudio = function(clockfreq) {
   }
 }
 
+function cpuStateToLongString_6502(c) {
+  function decodeFlags(c, flags) {
+    var s = "";
+    s += c.N ? " N" : " -";
+    s += c.V ? " V" : " -";
+    s += c.D ? " D" : " -";
+    s += c.Z ? " Z" : " -";
+    s += c.C ? " C" : " -";
+  //  s += c.I ? " I" : " -";
+    return s;
+  }
+  return "PC " + hex(c.PC,4) + "  " + decodeFlags(c) + "  " + getTIAPosString() + "\n"
+       + " A " + hex(c.A)    + "     " + (c.R ? "" : "BUSY") + "\n"
+       + " X " + hex(c.X)    + "\n"
+       + " Y " + hex(c.Y)    + "     " + "SP " + hex(c.SP) + "\n";
+}
+
 var Base6502Platform = function() {
 
   this.getOpcodeMetadata = function(opcode, offset) {
@@ -345,6 +371,7 @@ var Base6502Platform = function() {
   }
   this.clearDebug = function() {
     debugSavedState = null;
+    debugBreakState = null;
     debugTargetClock = 0;
     debugClock = 0;
     onBreakpointHit = null;
@@ -416,4 +443,170 @@ var Base6502Platform = function() {
       }
     });
   }
+  this.runUntilReturn = function() {
+    var depth = 1;
+    self.runEval(function(c) {
+      if (depth <= 0 && c.T == 0)
+        return true;
+      if (c.o == 0x20)
+        depth++;
+      else if (c.o == 0x60 || c.o == 0x40)
+        --depth;
+      return false;
+    });
+  }
+  this.disassemble = function(mem, start, end, pcvisits) {
+    return new Disassembler6502().disassemble(mem, start, end, pcvisits);
+  }
+  this.cpuStateToLongString = function(c) {
+    return cpuStateToLongString_6502(c);
+  }
+}
+
+function dumpRAM(ram, ramofs, ramlen) {
+  var s = "";
+  // TODO: show scrollable RAM for other platforms
+  for (var ofs=0; ofs<ramlen; ofs+=0x10) {
+    s += '$' + hex(ofs+ramofs) + ':';
+    for (var i=0; i<0x10; i++) {
+      if (ofs+i < ram.length) {
+        if (i == 8) s += " ";
+        s += " " + hex(ram[ofs+i]);
+      }
+    }
+    s += "\n";
+  }
+  return s;
+}
+
+function cpuStateToLongString_Z80(c) {
+  function decodeFlags(flags) {
+    var flagspec = "SZ-H-VNC";
+    var s = "";
+    for (var i=0; i<8; i++)
+      s += (flags & (128>>i)) ? flagspec.slice(i,i+1) : "-";
+    return s; // TODO
+  }
+  return "PC " + hex(c.PC,4) + "  " + decodeFlags(c.AF) + "  " + getTIAPosString() + "\n"
+       + "SP " + hex(c.SP,4) + "  IR " + hex(c.IR,4) + "\n"
+       + "IX " + hex(c.IX,4) + "  IY " + hex(c.IY,4) + "\n"
+       + "AF " + hex(c.AF,4) + "  BC " + hex(c.BC,4) + "\n"
+       + "DE " + hex(c.DE,4) + "  HL " + hex(c.HL,4) + "\n"
+       ;
+}
+
+var BaseZ80Platform = function() {
+
+  var onBreakpointHit;
+  var debugCondition;
+  var debugSavedState = null;
+  var debugBreakState = null;
+  var debugTargetClock = 0;
+
+  this.setDebugCondition = function(debugCond) {
+    if (debugSavedState) {
+      this.loadState(debugSavedState);
+    } else {
+      debugSavedState = this.saveState();
+    }
+    debugCondition = debugCond;
+    this.resume();
+  }
+  /*
+  this.restartDebugState = function() {
+    if (debugCondition && !debugBreakState) {
+      debugTargetClock -= cpu.getTstates();
+      cpu.setTstates(0);
+      debugSavedState = this.saveState();
+    }
+  }
+  */
+  this.getDebugCallback = function() {
+    return debugCondition;
+  }
+  this.setupDebug = function(callback) {
+    onBreakpointHit = callback;
+  }
+  this.clearDebug = function() {
+    debugSavedState = null;
+    debugBreakState = null;
+    debugTargetClock = 0;
+    onBreakpointHit = null;
+    debugCondition = null;
+  }
+  this.breakpointHit = function() {
+    debugBreakState = this.saveState();
+    //debugBreakState.c.PC = (debugBreakState.c.PC-1) & 0xffff;
+    console.log("Breakpoint at clk", debugBreakState.c.tstates, "PC", debugBreakState.c.PC.toString(16));
+    this.pause();
+    if (onBreakpointHit) {
+      onBreakpointHit(debugBreakState);
+    }
+  }
+  // TODO: lower bound of clock value
+  this.step = function() {
+    var self = this;
+    this.setDebugCondition(function() {
+      var cpuState = self.getCPUState();
+      if (cpuState.tstates > debugTargetClock) {
+        debugTargetClock = cpuState.tstates;
+        self.breakpointHit();
+        return true;
+      }
+      return false;
+    });
+  }
+  this.stepBack = function() {
+    var self = this;
+    var prevState;
+    var prevClock;
+    this.setDebugCondition(function() {
+      var cpuState = self.getCPUState();
+      var debugClock = cpuState.tstates;
+      if (debugClock >= debugTargetClock && prevState) {
+        self.loadState(prevState);
+        debugTargetClock = prevClock;
+        self.breakpointHit();
+        return true;
+      } else if (debugClock > debugTargetClock-20 && debugClock < debugTargetClock) {
+        prevState = self.saveState();
+        prevClock = debugClock;
+      }
+      return false;
+    });
+  }
+  this.runEval = function(evalfunc) {
+    var self = this;
+    this.setDebugCondition(function() {
+      var cpuState = self.getCPUState();
+			if (cpuState.tstates > debugTargetClock) {
+        if (evalfunc(cpuState)) {
+					debugTargetClock = cpuState.tstates;
+          self.breakpointHit();
+          return true;
+        }
+      }
+			return false;
+    });
+  }
+	this.runUntilReturn = function() {
+    var self = this;
+    var depth = 1;
+    self.runEval(function(c) {
+      if (depth <= 0)
+        return true;
+			var op = self.readAddress(c.PC);
+      if (op == 0xcd) // CALL
+        depth++;
+      else if (op == 0xc0 || op == 0xc8 || op == 0xc9 || op == 0xd0) // RET (TODO?)
+        --depth;
+      return false;
+    });
+  }
+  this.disassemble = function(mem, start, end, pcvisits) {
+    return new Disassembler6502().disassemble(mem, start, end, pcvisits);
+  }
+	this.cpuStateToLongString = function(c) {
+    return cpuStateToLongString_Z80(c);
+  }
 }
diff --git a/src/platform/apple2.js b/src/platform/apple2.js
index 705d52f2..addf52ac 100644
--- a/src/platform/apple2.js
+++ b/src/platform/apple2.js
@@ -35,10 +35,6 @@ var Apple2Platform = function(mainElement) {
     return APPLE2_PRESETS;
   }
 
-  function noise() {
-    return (Math.random() * 256) & 0xff;
-  }
-
   this.start = function() {
     cpu = new jt.M6502();
     ram = new RAM(0x13000); // 64K + 16K LC RAM - 4K hardware
@@ -138,8 +134,7 @@ var Apple2Platform = function(mainElement) {
     // create video/audio
     video = new RasterVideo(mainElement,280,192);
     audio = new SampleAudio(cpuFrequency);
-    video.start();
-    audio.start();
+    video.create();
     video.setKeyboardEvents(function(key,code,flags) {
       // since we're an Apple II+, we don't do lowercase
       if (flags & 1) {
@@ -158,8 +153,6 @@ var Apple2Platform = function(mainElement) {
     var colors = [0xffff0000, 0xff00ff00];
     timer = new AnimationTimer(60, function() {
       // 262.5 scanlines per frame
-      var iaddr = 0x2000;
-      var iofs = 0;
       var clock = 0;
       var debugCond = self.getDebugCallback();
       for (var sl=0; sl<262; sl++) {
@@ -254,10 +247,6 @@ var Apple2Platform = function(mainElement) {
     this.reset();
   }
 
-  this.getRasterPosition = function() {
-    return {x:0, y:0};
-  }
-
   this.isRunning = function() {
     return timer.isRunning();
   }
diff --git a/src/platform/atarivec.js b/src/platform/atarivec.js
index 61b70fbb..8bf31ff1 100644
--- a/src/platform/atarivec.js
+++ b/src/platform/atarivec.js
@@ -66,7 +66,7 @@ var AtariVectorPlatform = function(mainElement) {
     video = new VectorVideo(mainElement,1024,1024);
     dvg = new DVGStateMachine(bus, video);
     audio = new SampleAudio(cpuFrequency);
-    video.start();
+    video.create();
     timer = new AnimationTimer(60, function() {
       video.clear();
       // 262.5 scanlines per frame
diff --git a/src/platform/exidy.js b/src/platform/exidy.js
index 99564eb7..d7e30f30 100644
--- a/src/platform/exidy.js
+++ b/src/platform/exidy.js
@@ -47,9 +47,8 @@ var ExidyPlatform = function(mainElement) {
     cpu.connectBus(bus);
     // create video/audio
     video = new RasterVideo(mainElement,256,256);
-    video.start();
+    video.create();
     audio = new SampleAudio(cpuFrequency); // TODO
-    audio.start();
     var idata = video.getFrameData();
     timer = new AnimationTimer(60, function() {
       var clock = 0;
diff --git a/src/platform/spaceinv.js b/src/platform/spaceinv.js
new file mode 100644
index 00000000..bf326c93
--- /dev/null
+++ b/src/platform/spaceinv.js
@@ -0,0 +1,224 @@
+"use strict";
+
+// http://www.computerarcheology.com/Arcade/SpaceInvaders/Hardware.html
+
+var SPACEINV_PRESETS = [
+];
+
+// TODO: global???
+window.buildZ80({
+	applyContention: false
+});
+
+var SpaceInvadersPlatform = function(mainElement) {
+  var self = this;
+  this.__proto__ = new BaseZ80Platform();
+
+  var cpu, ram, membus, iobus, rom;
+  var video, audio, timer, pixels;
+  var inputs = [0xe,0x8,0x0];
+  var bitshift_offset = 0;
+  var bitshift_register = 0;
+  var watchdog_counter;
+  var cpuFrequency = 1996800;
+  var cpuCyclesPerLine = Math.round(cpuFrequency/(60*224)); // TODO
+  var INITIAL_WATCHDOG = 256;
+  var PIXEL_ON = 0xffeeeeee;
+  var PIXEL_OFF = 0xff000000;
+
+  var KEYCODE_MAP = {
+    32:{i:1,b:4}, // space bar (P1)
+    37:{i:1,b:5}, // left arrow (P1)
+    39:{i:1,b:6}, // right arrow (P1)
+    0x53:{i:2,b:4}, // S (P2)
+    0x41:{i:2,b:5}, // A (P2)
+    0x44:{i:2,b:6}, // D (P2)
+    53:{i:1,b:0}, // 5
+    49:{i:1,b:2}, // 1
+    50:{i:1,b:1}, // 2
+  }
+
+  this.getOpcodeMetadata = function() {
+    return {
+      opcode:0,
+      mnenomic:'?',
+      minCycles:0,
+      maxCycles:0,
+      insnlength:1
+    };
+  }
+
+  this.getPresets = function() {
+    return SPACEINV_PRESETS;
+  }
+
+  this.start = function() {
+    ram = new RAM(0x2000);
+    membus = {
+      read: function(address) {
+        if (address < 0x2000) {
+          return rom ? rom[address] : 0;
+        } else {
+          address &= 0x1fff;
+          return ram.mem[address];
+        }
+      },
+      write: function(address, value) {
+        //console.log("write", hex(address,4), hex(value,2));
+        if (address >= 0x2000) {
+          address &= 0x1fff;
+          value &= 0xff;
+          ram.mem[address] = value;
+          if (address >= 0x400) {
+						// TODO: dirty flags
+            var ofs = (address - 0x400)*8;
+            for (var i=0; i<8; i++)
+              pixels[ofs+i] = (value & (1<<i)) ? PIXEL_ON : PIXEL_OFF;
+          }
+        }
+      },
+      isContended: function() { return false; },
+    };
+    iobus = {
+      read: function(addr) {
+				addr &= 0x3;
+        //console.log('IO read', hex(addr,4));
+        switch (addr) {
+          case 0:
+          case 1:
+          case 2:
+            return inputs[addr];
+          case 3:
+            return (bitshift_register << bitshift_offset) & 0xff;
+        }
+        return 0;
+    	},
+    	write: function(addr, val) {
+				addr &= 0x7;
+				val &= 0xff;
+        //console.log('IO write', hex(addr,4), hex(val,2));
+        switch (addr) {
+          case 2:
+            bitshift_offset = val & 0x7;
+            break;
+          case 3:
+          case 5:
+            // TODO: sound
+            break;
+          case 4:
+            bitshift_register = (bitshift_register >> 8) | (val << 8);
+            break;
+          case 6:
+            watchdog_counter = INITIAL_WATCHDOG;
+            break;
+        }
+    	}
+    };
+    cpu = window.Z80({
+  		display: {},
+  		memory: membus,
+  		ioBus: iobus
+  	});
+    video = new RasterVideo(mainElement,256,224,{rotate:-90});
+    audio = new SampleAudio(cpuFrequency);
+    video.create();
+    var idata = video.getFrameData();
+    video.setKeyboardEvents(function(key,code,flags) {
+      var o = KEYCODE_MAP[key];
+      if (o) {
+        if (flags & 1) {
+          inputs[o.i] |= (1<<o.b);
+        } else {
+          inputs[o.i] &= ~(1<<o.b);
+        }
+      }
+    });
+    pixels = video.getFrameData();
+    timer = new AnimationTimer(60, function() {
+			if (!self.isRunning())
+				return;
+      cpu.setTstates(0);
+      var debugCond = self.getDebugCallback();
+      for (var sl=0; sl<224; sl++) {
+        var targetTstates = cpu.getTstates() + cpuCyclesPerLine;
+        if (debugCond) {
+          while (cpu.getTstates() < targetTstates) {
+            if (debugCond && debugCond()) { debugCond = null; }
+            cpu.runFrame(cpu.getTstates() + 1);
+          }
+        } else {
+          cpu.runFrame(targetTstates);
+        }
+        if (sl == 95)
+          cpu.requestInterrupt(0x8); // RST $8
+        else if (sl == 223)
+          cpu.requestInterrupt(0x10); // RST $10
+      }
+      video.updateFrame();
+      if (watchdog_counter-- <= 0) {
+        console.log("WATCHDOG FIRED"); // TODO: alert on video
+        self.reset();
+      }
+      //self.restartDebugState();
+    });
+  }
+
+  this.loadROM = function(title, data) {
+    rom = data;
+    self.reset();
+  }
+
+  this.loadState = function(state) {
+    cpu.loadState(state.c);
+    ram.mem.set(state.b);
+    bitshift_register = state.bsr;
+    bitshift_offset = state.bso;
+    watchdog_counter = state.wdc;
+    inputs[0] = state.in0;
+    inputs[1] = state.in1;
+    inputs[2] = state.in2;
+  }
+  this.saveState = function() {
+    return {
+      c:self.getCPUState(),
+      b:ram.mem.slice(0),
+      bsr:bitshift_register,
+      bso:bitshift_offset,
+      wdc:watchdog_counter,
+      in0:inputs[0],
+      in1:inputs[1],
+      in2:inputs[2],
+    };
+  }
+  this.getRAMForState = function(state) {
+    return ram.mem;
+  }
+  this.getCPUState = function() {
+    return cpu.saveState();
+  }
+
+  this.isRunning = function() {
+    return timer.isRunning();
+  }
+  this.pause = function() {
+    timer.stop();
+    audio.stop();
+  }
+  this.resume = function() {
+    timer.start();
+    audio.start();
+  }
+  this.reset = function() {
+    cpu.reset();
+    cpu.setTstates(0);
+    watchdog_counter = INITIAL_WATCHDOG;
+  }
+  this.readAddress = function(addr) {
+    return membus.read(addr);
+  }
+
+	this.ramStateToLongString = function(state) {
+		var stack = state.b.slice(state.c.SP & 0x1fff, 0x400);
+    return "\n" + dumpRAM(stack, state.c.SP, stack.length);
+  }
+}
diff --git a/src/platform/vcs.js b/src/platform/vcs.js
index e6a9e1a5..7ceebbf6 100644
--- a/src/platform/vcs.js
+++ b/src/platform/vcs.js
@@ -88,9 +88,29 @@ var VCSPlatform = function() {
     return (this.readAddress(0xfffc) | (this.readAddress(0xfffd) << 8)) & 0xffff;
   }
   this.readAddress = function(addr) {
-    return current_output[addr - 0xf000]; // TODO: use bus to read
+    return current_output[addr & 0xfff]; // TODO: use bus to read
+  }
+  this.runUntilReturn = function() {
+    var depth = 1;
+    self.runEval(function(c) {
+      if (depth <= 0 && c.T == 0)
+        return true;
+      if (c.o == 0x20)
+        depth++;
+      else if (c.o == 0x60 || c.o == 0x40)
+        --depth;
+      return false;
+    });
+  }
+  this.cpuStateToLongString = function(c) {
+    return cpuStateToLongString_6502(c);
   }
   this.getRAMForState = function(state) {
     return jt.Util.byteStringToUInt8Array(atob(state.r.b));
   }
+  this.ramStateToLongString = function(state) {
+    // TODO: customize RAM dump per-platform
+    var ram = self.getRAMForState(state);
+    return "\n" + dumpRAM(ram, 0x80, 0x80);
+  }
 };
diff --git a/src/ui.js b/src/ui.js
index e15cdf3a..9767f10b 100644
--- a/src/ui.js
+++ b/src/ui.js
@@ -1,5 +1,21 @@
 "use strict";
 
+// catch errors
+if (typeof window.onerror == "object") {
+    window.onerror = function (msgevent, url, line, col, error) {
+      console.log(msgevent, url, line, col);
+      console.log(error);
+      //$("#editor").hide();
+      if (window.location.host.endsWith('8bitworkshop.com')) {
+        ga('send', 'exception', {
+          'exDescription': msgevent + " " + url + " " + " " + line + ":" + col + ", " + error,
+          'exFatal': true
+        });
+      }
+      alert(msgevent+"");
+    };
+}
+
 // 8bitworkshop IDE user interface
 
 var PRESETS; // presets array
@@ -260,6 +276,7 @@ function getToolForFilename(fn) {
   if (fn.endsWith(".pla")) return "plasm";
   if (fn.endsWith(".c")) return "cc65";
   if (fn.endsWith(".s")) return "ca65";
+  if (fn.endsWith(".asm")) return "z80asm";
   return "dasm";
 }
 
@@ -323,8 +340,8 @@ worker.onmessage = function(e) {
       offset2line = {};
       line2offset = {};
       for (var info of e.data.listing.lines) {
-        if (info.offset) {
-          var textel = document.createTextNode(info.offset.toString(16));
+        if (info.offset >= 0) {
+          var textel = document.createTextNode(hex(info.offset,4));
           editor.setGutterMarker(info.line-1, "gutter-offset", textel);
           offset2line[info.offset] = info.line;
           line2offset[info.line] = info.offset;
@@ -354,7 +371,7 @@ function findLineForOffset(PC) {
   if (offset2line) {
     for (var i=0; i<256; i++) {
       var line = offset2line[PC];
-      if (line) {
+      if (line >= 0) {
         return line;
       }
       PC--;
@@ -367,36 +384,11 @@ function setCurrentLine(line) {
   editor.setSelection({line:line,ch:0}, {line:line-1,ch:0}, {scroll:true});
 }
 
-function hex(v, nd) {
-  try {
-    if (!nd) nd = 2;
-    var s = v.toString(16).toUpperCase();
-    while (s.length < nd)
-      s = "0" + s;
-    return s;
-  } catch (e) {
-    return v+"";
-  }
-}
-function decodeFlags(c, flags) {
-  var s = "";
-  s += c.N ? " N" : " -";
-  s += c.V ? " V" : " -";
-  s += c.D ? " D" : " -";
-  s += c.Z ? " Z" : " -";
-  s += c.C ? " C" : " -";
-//  s += c.I ? " I" : " -";
-  return s;
-}
-function cpuStateToLongString(c) {
-  return "PC " + hex(c.PC,4) + "  " + decodeFlags(c) + "  " + getTIAPosString() + "\n"
-       + " A " + hex(c.A)    + "     " + (c.R ? "" : "BUSY") + "\n"
-       + " X " + hex(c.X)    + "\n"
-       + " Y " + hex(c.Y)    + "     " + "SP " + hex(c.SP) + "\n";
-}
 function getTIAPosString() {
-  var pos = platform.getRasterPosition();
-  return "V" + pos.y + " H" + pos.x;
+  if (platform.getRasterPosition) {
+    var pos = platform.getRasterPosition();
+    return "V" + pos.y + " H" + pos.x;
+  } else return "";
 }
 
 var lastDebugInfo;
@@ -431,19 +423,9 @@ function highlightDifferences(s1, s2) {
 function showMemory(state) {
   var s = "";
   if (state) {
-    s = cpuStateToLongString(state.c);
-    s += "\n";
-    var ram = platform.getRAMForState(state);
-    var ramlen = ram.length <= 128 ? 128 : 256; // TODO
-    var ramofs = ram.length == 128 ? 0x80 : 0;
-    // TODO: show scrollable RAM for other platforms
-    for (var ofs=0; ofs<ramlen; ofs+=0x10) {
-      s += '$' + hex(ofs+ramofs) + ':';
-      for (var i=0; i<0x10; i++) {
-        if (i == 8) s += " ";
-        s += " " + hex(ram[ofs+i]);
-      }
-      s += "\n";
+    s = platform.cpuStateToLongString(state.c);
+    if (platform.ramStateToLongString) {
+      s += platform.ramStateToLongString(state);
     }
     var hs = lastDebugInfo ? highlightDifferences(lastDebugInfo, s) : s;
     $("#mem_info").show().html(hs);
@@ -460,9 +442,12 @@ function setupBreakpoint() {
     lastDebugState = state;
     var PC = state.c.PC;
     var line = findLineForOffset(PC);
-    if (line) {
+    if (line >= 0) {
       console.log("BREAKPOINT", hex(PC), line);
       setCurrentLine(line);
+    } else {
+      console.log("BREAKPOINT", hex(PC));
+      // TODO: switch to disasm
     }
     pcvisits[PC] = pcvisits[PC] ? pcvisits[PC]+1 : 1;
     showMemory(state);
@@ -498,7 +483,7 @@ function runToCursor() {
   setupBreakpoint();
   var line = getCurrentLine();
   var pc = line2offset[line];
-  if (pc) {
+  if (pc >= 0) {
     console.log("Run to", line, pc.toString(16));
     platform.runEval(function(c) {
       return c.PC == pc;
@@ -508,16 +493,7 @@ function runToCursor() {
 
 function runUntilReturn() {
   setupBreakpoint();
-  var depth = 1;
-  platform.runEval(function(c) {
-    if (depth <= 0 && c.T == 0)
-      return true;
-    if (c.o == 0x20)
-      depth++;
-    else if (c.o == 0x60 || c.o == 0x40)
-      --depth;
-    return false;
-  });
+  platform.runUntilReturn();
 }
 
 function runStepBackwards() {
@@ -735,7 +711,8 @@ function updateDisassembly() {
     function disassemble(start, end) {
       if (start < 0) start = 0;
       if (end > mem.length) end = mem.length;
-      var disasm = new Disassembler6502().disassemble(mem, start, end, pcvisits);
+      // TODO: use platform.readMemory()
+      var disasm = platform.disassemble(mem, start, end, pcvisits);
       var s = "";
       for (a in disasm) {
         var srclinenum = offset2line[a];
@@ -777,11 +754,11 @@ function toggleDisassembly() {
 function resetAndDebug() {
   clearBreakpoint();
   platform.reset();
-  runToCursor();
+  platform.breakpointHit();
 }
 
 function _breakExpression() {
-  var exprs = window.prompt("Enter break expression", "c.PC == 0x6000");
+  var exprs = window.prompt("Enter break expression", "c.PC == 0x6000"); // TODO
   if (exprs) {
     var fn = new Function('c', 'return (' + exprs + ');');
     setupBreakpoint();
@@ -798,7 +775,10 @@ function setupDebugControls(){
   $("#dbg_stepout").click(runUntilReturn);
   $("#dbg_stepback").click(runStepBackwards);
   $("#dbg_timing").click(traceTiming);
-  $("#dbg_disasm").click(toggleDisassembly);
+  if (platform.disassemble)
+    $("#dbg_disasm").click(toggleDisassembly);
+  else
+    $("#dbg_disasm").hide();
   $("#disassembly").hide();
   $(".dropdown-menu").collapse({toggle: false});
   $("#item_new_file").click(_createNewFile);
@@ -865,61 +845,59 @@ var qs = (function (a) {
 })(window.location.search.substr(1).split('&'));
 
 // start
-setupDebugControls();
 showWelcomeMessage();
 // parse query string
-try {
-  // is this a share URL?
-  if (qs['sharekey']) {
-    var sharekey = qs['sharekey'];
-    console.log("Loading shared file ", sharekey);
-    $.getJSON( ".storage/" + sharekey, function( result ) {
-      console.log(result);
-      var newid = 'shared/' + result['filename'];
-      updatePreset(newid, result['text']);
-      qs['file'] = newid;
-      delete qs['sharekey'];
-      window.location = "?" + $.param(qs);
-    }, 'text');
-  } else {
-    // add default platform?
-    platform_id = qs['platform'] || localStorage.getItem("__lastplatform");
-    if (!platform_id) {
-      platform_id = qs['platform'] = "vcs";
-    }
-    // load and start platform object
-    // TODO: self-register platforms
-    if (platform_id == 'vcs') {
-      platform = new VCSPlatform();
-      $("#booklink_vcs").show();
-    } else if (platform_id == 'apple2') {
-      platform = new Apple2Platform($("#emulator")[0]);
-    } else if (platform_id == 'atarivec') {
-      platform = new AtariVectorPlatform($("#emulator")[0]);
-    } else if (platform_id == 'exidy') {
-      platform = new ExidyPlatform($("#emulator")[0]);
-    } else {
-      alert("Platform " + platform_id + " not recognized");
-    }
-    store = new FileStore(localStorage, platform_id + '/');
-    PRESETS = platform.getPresets();
-    platform.start();
-    // reset file?
-    if (qs['file'] && qs['reset']) {
-      store.deleteFile(qs['file']);
-      qs['reset'] = '';
-      window.location = "?" + $.param(qs);
-    } else if (qs['file']) {
-      // load file
-      loadPreset(qs['file']);
-      updateSelector();
-    } else {
-      // try to load last file
-      var lastid = localStorage.getItem("__lastid_"+platform_id) || localStorage.getItem("__lastid");
-      localStorage.removeItem("__lastid");
-      gotoPresetNamed(lastid || PRESETS[0].id);
-    }
+// is this a share URL?
+if (qs['sharekey']) {
+  var sharekey = qs['sharekey'];
+  console.log("Loading shared file ", sharekey);
+  $.getJSON( ".storage/" + sharekey, function( result ) {
+    console.log(result);
+    var newid = 'shared/' + result['filename'];
+    updatePreset(newid, result['text']);
+    qs['file'] = newid;
+    delete qs['sharekey'];
+    window.location = "?" + $.param(qs);
+  }, 'text');
+} else {
+  // add default platform?
+  platform_id = qs['platform'] || localStorage.getItem("__lastplatform");
+  if (!platform_id) {
+    platform_id = qs['platform'] = "vcs";
+  }
+  // load and start platform object
+  // TODO: self-register platforms
+  if (platform_id == 'vcs') {
+    platform = new VCSPlatform();
+    $("#booklink_vcs").show();
+  } else if (platform_id == 'apple2') {
+    platform = new Apple2Platform($("#emulator")[0]);
+  } else if (platform_id == 'atarivec') {
+    platform = new AtariVectorPlatform($("#emulator")[0]);
+  } else if (platform_id == 'exidy') {
+    platform = new ExidyPlatform($("#emulator")[0]);
+  } else if (platform_id == 'spaceinv') {
+    platform = new SpaceInvadersPlatform($("#emulator")[0]);
+  } else {
+    alert("Platform " + platform_id + " not recognized");
+  }
+  store = new FileStore(localStorage, platform_id + '/');
+  PRESETS = platform.getPresets();
+  setupDebugControls();
+  platform.start();
+  // reset file?
+  if (qs['file'] && qs['reset']) {
+    store.deleteFile(qs['file']);
+    qs['reset'] = '';
+    window.location = "?" + $.param(qs);
+  } else if (qs['file']) {
+    // load file
+    loadPreset(qs['file']);
+    updateSelector();
+  } else {
+    // try to load last file
+    var lastid = localStorage.getItem("__lastid_"+platform_id) || localStorage.getItem("__lastid");
+    localStorage.removeItem("__lastid");
+    gotoPresetNamed(lastid || PRESETS[0].id);
   }
-} catch (e) {
-  alert(e+""); // TODO?
 }
diff --git a/src/util.js b/src/util.js
index da723219..e544b06f 100644
--- a/src/util.js
+++ b/src/util.js
@@ -1,4 +1,16 @@
 
+function hex(v, nd) {
+  try {
+    if (!nd) nd = 2;
+    var s = v.toString(16).toUpperCase();
+    while (s.length < nd)
+      s = "0" + s;
+    return s;
+  } catch (e) {
+    return v+"";
+  }
+}
+
 function lzgmini() {
 
   // Constants
diff --git a/src/worker/workermain.js b/src/worker/workermain.js
index ae3eb653..7b6792be 100644
--- a/src/worker/workermain.js
+++ b/src/worker/workermain.js
@@ -1,15 +1,12 @@
 "use strict";
 
-// set up require.js for worker
-importScripts("dasm.js");
-importScripts("acme.js");
-importScripts("plasm.js");
-importScripts("cc65.js");
-importScripts("ca65.js");
-importScripts("ld65.js");
-importScripts("z80asm.js");
-importScripts("sdcc.js");
-
+var loaded = {}
+function load(modulename) {
+  if (!loaded[modulename]) {
+    importScripts(modulename+".js");
+    loaded[modulename] = 1;
+  }
+}
 // shim out window and document objects for security
 // https://github.com/mbostock/d3/issues/1053
 var noop = function() { return new Function(); };
@@ -49,6 +46,20 @@ function setupFS(FS) {
   }, '/share');
 }
 
+function extractErrors(strings, regex) {
+  var errors = [];
+  for (var i=0; i<strings.length; i++) {
+    var m = regex.exec(strings[i]);
+    if (m) {
+      errors.push({
+        line: m[1],
+        msg: m[2]
+      });
+    }
+  }
+  return errors;
+}
+
 // main worker start
 
 var DASM_MAIN_FILENAME = "main.a";
@@ -69,13 +80,36 @@ function match_msvc(s) {
   console.log(s, matches);
   if (matches) {
     errline = parseInt(matches[1]);
-    errors.push({
+    msvc_errors.push({
       line:errline,
       msg:matches[2]
     });
   }
 }
 
+function parseListing(code, lineMatch) {
+  var lines = [];
+  for (var line of code.split(/\r?\n/)) {
+    var linem = lineMatch.exec(line);
+    if (linem && linem[1]) {
+      var linenum = parseInt(linem[1]);
+      var filename = linem[2];
+      var offset = parseInt(linem[3], 16);
+      var insns = linem[4];
+      var restline = linem[5];
+      if (insns) {
+        lines.push({
+          line:linenum,
+          offset:offset,
+          insns:insns,
+          iscode:restline[0] != '.'
+        });
+      }
+    }
+  }
+  return lines;
+}
+
 function parseDASMListing(code, unresolved) {
   var errorMatch = /main.a [(](\d+)[)]: error: (.+)/;
   //        4  08ee		       a9 00	   start      lda	#01workermain.js:23:5
@@ -137,6 +171,7 @@ function parseDASMListing(code, unresolved) {
 }
 
 function assembleDASM(code) {
+  load("dasm");
   var re_usl = /(\w+)\s+0000\s+[?][?][?][?]/;
   var unresolved = {};
   function match_fn(s) {
@@ -165,6 +200,7 @@ function assembleDASM(code) {
 
 // TODO: not quite done
 function assembleACME(code) {
+  load("acme");
   // stderr
   var re_err2 = /(Error|Warning) - File (.+?), line (\d+) ([^:]+) (.*)/;
   var errors = [];
@@ -210,6 +246,7 @@ function setupStdin(fs, code) {
 }
 
 function compilePLASMA(code) {
+  load("plasm");
   // stdout
   var outstr = "";
   function out_fn(s) { outstr += s; outstr += "\n"; }
@@ -278,6 +315,8 @@ function parseCA65Listing(code, mapfile) {
 }
 
 function assemblelinkCA65(code, platform, warnings) {
+  load("ca65");
+  load("ld65");
   if (!platform)
     platform = 'apple2'; // TODO
   var objout, lstout;
@@ -321,6 +360,7 @@ function assemblelinkCA65(code, platform, warnings) {
 }
 
 function compileCC65(code, platform) {
+  load("cc65");
   if (!platform)
     platform = 'apple2'; // TODO
   // stderr
@@ -357,6 +397,7 @@ function compileCC65(code, platform) {
 }
 
 function assembleZ80ASM(code, platform) {
+  load("z80asm");
   if (!platform)
     platform = 'apple2'; // TODO
   var Module = z80asm({
@@ -364,6 +405,7 @@ function assembleZ80ASM(code, platform) {
     //logReadFiles:true,
     print:print_fn,
     printErr:print_fn,
+    TOTAL_MEMORY:64*1024*1024,
     //locateFile: function(s) { return "" + s; },
   });
   var FS = Module['FS'];
@@ -377,7 +419,9 @@ function assembleZ80ASM(code, platform) {
     Module.callMain(["-b", "-s", "-l", "-m", "main.asm"]);
     try {
       var aerr = FS.readFile("main.err", {'encoding':'utf8'}); // TODO
-      console.log("ERRORS", aerr); // TODO
+      if (aerr.length) {
+        return {listing:{errors:extractErrors(aerr.split("\n"), /.+? line (\d+): (.+)/)}};
+      }
       // Warning at file 'test.asm' line 9: 'XREF' is deprecated, use 'EXTERN' instead
     } catch (e) {
     }
@@ -396,15 +440,19 @@ l_main00101                     = 0003, L: test
     return {
       exitstatus:Module.EXITSTATUS,
       output:aout,
-      listing:listing,
+      listing:{
+        errors:[],
+        lines:parseListing(alst, /(\d+)(\s+)([0-9A-F]+)\s+([0-9A-F][0-9A-F ]*[0-9A-F])\s+([A-Z_.].+)/i)
+      },
       intermediate:{listing:alst, mapfile:amap},
     };
   } catch (e) {
-    throw Error(e);
+    throw (e);
   }
 }
 
 function compileSDCC(code, platform) {
+  load("sdcc");
   var SDCC = sdcc({
     noInitialRun:true,
     noFSInit:true,
diff --git a/test/worker.js b/test/worker.js
index 1471288b..46439293 100644
--- a/test/worker.js
+++ b/test/worker.js
@@ -59,12 +59,16 @@ global.postMessage = null;
 
 includeInThisContext("src/worker/workermain.js");
 
-function compile(tool, code, callback, outlen) {
+function compile(tool, code, callback, outlen, nlines, nerrors) {
     global.postMessage = function(msg) {
-        if (msg.listing.errors.length) console.log(msg.listing.errors);
-        assert.ok(msg.listing.lines);
-        assert.equal(msg.listing.errors.length, msg.listing.errors);
-        assert.equal(msg.output.length, outlen);
+        if (msg.listing.errors && msg.listing.errors.length) {
+          console.log(msg.listing.errors);
+          assert.equal(nerrors, msg.listing.errors.length, "errors");
+        } else {
+          assert.equal(nerrors||0, 0, "errors");
+          assert.equal(msg.output.length, outlen, "output binary");
+          assert.equal(msg.listing.lines.length, nlines, "listing lines");
+        }
         callback(null, msg);
     };
     global.onmessage({
@@ -74,18 +78,21 @@ function compile(tool, code, callback, outlen) {
 
 describe('Worker', function() {
   it('should assemble DASM', function(done) {
-    compile('dasm', '\tprocessor 6502\n\torg $f000\nfoo lda #0\n', done, 2);
+    compile('dasm', '\tprocessor 6502\n\torg $f000\nfoo lda #0\n', done, 2, 1);
   });
   it('should compile PLASMA', function(done) {
-    compile('plasm', 'word x = 0', done, 5);
+    compile('plasm', 'word x = 0', done, 5, 0);
   });
   it('should compile CC65', function(done) {
-    compile('cc65', '#include <stdio.h>\nint main() {\nint x=1;\nprintf("%d",x);\nreturn x+2;\n}', done, 2947);
+    compile('cc65', '#include <stdio.h>\nint main() {\nint x=1;\nprintf("%d",x);\nreturn x+2;\n}', done, 2947, 4);
+  });
+  it('should NOT assemble Z80ASM', function(done) {
+    compile('z80asm', 'ddwiuweq', done, 0, 0, 1);
   });
   it('should assemble Z80ASM', function(done) {
-    compile('z80asm', '\tMODULE test\n\tXREF _puts\n\tld	hl,$0000\n\tret\n', done, 4);
+    compile('z80asm', '\tMODULE test\n\tXREF _puts\n\tld	hl,$0000\n\tret\n', done, 4, 2, 0);
   });
   it('should compile SDCC', function(done) {
-    compile('sdcc', 'int main(int argc) {\nint x=1; int y=2;\nreturn x+y+argc;\n}', done, 16);
+    compile('sdcc', 'int main(int argc) {\nint x=1; int y=2;\nreturn x+y+argc;\n}', done, 16, 8, 0);
   });
 });
diff --git a/test/z80/z80test.js b/test/z80/z80test.js
index 70e9bfad..591d8243 100644
--- a/test/z80/z80test.js
+++ b/test/z80/z80test.js
@@ -2,7 +2,9 @@
 
 require('../../src/cpu/z80.js');
 
-global.buildZ80({
+var _global = window;
+
+_global.buildZ80({
 	applyContention: true
 });
 
@@ -92,7 +94,7 @@ function runTest(input, expected) {
 
 	var memory = Memory(dump);
 	var ioBus = IOBus();
-	var z80 = global.Z80({
+	var z80 = _global.Z80({
 		display: {},
 		memory: memory,
 		ioBus: ioBus
