6502/8bitworkshop
1
0
Fork 0
mirror of https://github.com/sehugg/8bitworkshop.git synced 2025-02-18 00:30:43 +00:00
Code Issues Projects Releases Wiki Activity

verilog: fixed silice <ccast> case

Browse Source
This commit is contained in:
Steven Hugg 2021-07-22 09:27:11 -05:00
parent 6a21b467cf
commit bb818c34f8
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/common/hdl/hdlwasm.ts
View File

@ -1018,6 +1018,10 @@ export class HDLModuleWASM implements HDLModuleRunner {
return this.bmod.i64.extend_u(val); return this.bmod.i64.extend_u(val);
} else if (tsrc.left > 31 && tdst.left <= 31) { // 64 -> 32 } else if (tsrc.left > 31 && tdst.left <= 31) { // 64 -> 32
return this.bmod.i32.wrap(val); return this.bmod.i32.wrap(val);
} else if (tsrc.left < 31 && tdst.left == 31 && tsrc.signed) { // sign extend via shift (silice case)
let inst = this.i3264(tdst);
var shift = inst.const(31 - tsrc.left, 0);
return inst.shr_s(inst.shl(val, shift), shift);
} }
throw new HDLError([tsrc, tdst], `cannot cast ${tsrc.left}/${tsrc.signed} to ${tdst.left}/${tdst.signed}`); throw new HDLError([tsrc, tdst], `cannot cast ${tsrc.left}/${tsrc.signed} to ${tdst.left}/${tdst.signed}`);
} }