mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-11-22 14:33:51 +00:00
rebuilt node modules, now typescript lib == es2017
This commit is contained in:
Steven Hugg
parent
8198cd471a
commit
c1e83c3a03
6
package-lock.json
generated
6
package-lock.json
generated
@ -31,6 +31,12 @@
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"@types/sizzle": "*"
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}
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},
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"@types/node": {
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"version": "14.0.22",
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"resolved": "https://registry.npmjs.org/@types/node/-/node-14.0.22.tgz",
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"integrity": "sha512-emeGcJvdiZ4Z3ohbmw93E/64jRzUHAItSHt8nF7M4TGgQTiWqFVGB8KNpLGFmUHmHLvjvBgFwVlqNcq+VuGv9g==",
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"dev": true
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},
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"@types/sizzle": {
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"version": "2.3.2",
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"resolved": "https://registry.npmjs.org/@types/sizzle/-/sizzle-2.3.2.tgz",
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@ -18,6 +18,7 @@
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"@types/bootbox": "^4.4.36",
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"@types/bootstrap": "^3.4.0",
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"@types/jquery": "^3.5.0",
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"@types/node": "^14.0.22",
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"atob": "^2.1.x",
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"btoa": "^1.2.x",
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"clipboard": "^2.0.6",
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@ -1,165 +0,0 @@
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/****************************************************************************
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Midway/Williams Audio Boards
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----------------------------
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6809 MEMORY MAP
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Function Address R/W Data
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---------------------------------------------------------------
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Program RAM 0000-07FF R/W D0-D7
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Music (YM-2151) 2000-2001 R/W D0-D7
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6821 PIA 4000-4003 R/W D0-D7
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HC55516 clock low, digit latch 6000 W D0
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HC55516 clock high 6800 W xx
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Bank select 7800 W D0-D2
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Banked Program ROM 8000-FFFF R D0-D7
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****************************************************************************/
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import { RAM, newAddressDecoder } from "../emu";
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declare function importScripts(path:string);
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declare function postMessage(msg);
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var cpu, ram, rom, membus, iobus;
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var audio;
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var command = 0;
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var dac = 0;
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var current_buffer;
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var tstates;
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var last_tstate;
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var timer;
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var curTime;
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var timerPeriod = 20;
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var sampleRate;
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var numChannels = 2;
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var bufferLength;
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var cpuFrequency = 18432000/6; // 3.072 MHz
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var cpuCyclesPerFrame = cpuFrequency/60;
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var cpuAudioFactor = 32;
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rom = new RAM(0x4000).mem;
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// sample: [0xe,0x0,0x6,0x0,0x78,0xb9,0x30,0x06,0xa9,0xd3,0x00,0x04,0x18,0xf6,0x0c,0x79,0xd6,0xff,0x38,0xee,0x76,0x18,0xea];
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rom.fill(0x76); // HALT opcodes
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function fillBuffer() {
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var t = tstates / cpuAudioFactor;
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while (last_tstate < t) {
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current_buffer[last_tstate*2] = dac;
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current_buffer[last_tstate*2+1] = dac;
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last_tstate++;
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}
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}
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function start() {
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ram = new RAM(0x400);
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membus = {
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read: newAddressDecoder([
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[0x0000, 0x3fff, 0x3fff, function(a) { return rom ? rom[a] : null; }],
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[0x4000, 0x7fff, 0x3ff, function(a) { return ram.mem[a]; }]
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]),
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write: newAddressDecoder([
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[0x4000, 0x7fff, 0x3ff, function(a,v) { ram.mem[a] = v; }],
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]),
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isContended: function() { return false; },
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};
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iobus = {
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read: function(addr) {
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return command & 0xff;
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},
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write: function(addr, val) {
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dac = (val & 0xff) << 8;
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fillBuffer();
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}
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};
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cpu = new exports.Z80();
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cpu.connectMemoryBus(membus);
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cpu.connectIOBus(iobus);
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current_buffer = new Int16Array(bufferLength);
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console.log('started audio');
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}
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function timerCallback() {
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tstates = 0;
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last_tstate = 0;
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var numStates = Math.floor(bufferLength * cpuAudioFactor / numChannels);
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while (tstates < numStates) {
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tstates += cpu.advanceInsn();
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}
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tstates = 0;
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fillBuffer();
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postMessage({samples:current_buffer});
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if (!cpu.saveState().halted) {
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curTime += timerPeriod;
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var dt = curTime - new Date().getTime();
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if (dt < 0) dt = 0;
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timer = setTimeout(timerCallback, dt);
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} else {
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timer = 0;
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//console.log("HALT @ " + cpu.getPC());
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}
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}
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function reset() {
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if (!bufferLength) return;
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cpu.reset();
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if (!timer) {
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curTime = new Date().getTime() - timerPeriod*4;
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timerCallback();
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}
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}
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onmessage = function(e) {
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if (e && e.data) {
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if (e.data.command) {
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command = e.data.command & 0xff;
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reset();
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} else if (e.data.sampleRate) {
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console.log(e.data);
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sampleRate = e.data.sampleRate;
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bufferLength = numChannels*sampleRate*timerPeriod/1000;
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start();
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reset();
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} else if (e.data.rom) {
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rom = e.data.rom;
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command = 0x0;
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reset();
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}
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}
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}
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/**
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0000 56 _main::
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57 ;<stdin>:10:
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0000 0E 00 [ 7] 58 ld c,#0x00
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59 ;<stdin>:11:
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0002 60 00111$:
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0002 06 00 [ 7] 61 ld b,#0x00
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0004 62 00104$:
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0004 78 [ 4] 63 ld a,b
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0005 B9 [ 4] 64 cp a,c
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0006 30 06 [12] 65 jr NC,00107$
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0008 A9 [ 4] 66 xor a, c
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0009 D3 00 [11] 67 out (_dac),a
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000B 04 [ 4] 68 inc b
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000C 18 F6 [12] 69 jr 00104$
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000E 70 00107$:
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71 ;<stdin>:10:
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000E 0C [ 4] 72 inc c
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000F 79 [ 4] 73 ld a,c
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0010 D6 FF [ 7] 74 sub a, #0xff
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0012 38 EE [12] 75 jr C,00111$
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76 ;<stdin>:13:
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0014 18 EA [12] 77 jr _main
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**/
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@ -6,7 +6,7 @@
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"sourceMap": true,
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"target": "es5",
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"lib": [
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"es2016",
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"es2017",
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"dom"
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],
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"noImplicitThis": false,
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