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update lsfr preset; filter verilog boring errors

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Steven Hugg
2018-07-20 20:04:39 -05:00
parent 9938a17093
commit d5a146bf71
8 changed files with 56 additions and 9 deletions
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test/cli/testworker.js
+2 -2
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@@ -162,7 +162,7 @@ describe('Worker', function() {
assert.ok(fn);
done(err, msg);
};
doBuild(msgs, done2, 2782, 0, 0);
doBuild(msgs, done2, 2799, 0, 0);
});
it('should compile verilog inline assembler (JSASM)', function(done) {
var csource = ab2str(fs.readFileSync('presets/verilog/racing_game_cpu.v'));
@@ -179,7 +179,7 @@ describe('Worker', function() {
assert.ok(fn);
done(err, msg);
};
doBuild(msgs, done2, 49317, 0, 0);
doBuild(msgs, done2, 49357, 0, 0);
});
it('should compile verilog assembler file (JSASM)', function(done) {
var csource = ab2str(fs.readFileSync('presets/verilog/test2.asm'));