new inline verilog assembler
This commit is contained in:
Steven Hugg
parent
1790ca1747
commit
f6d320a05b
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@ -41,7 +41,7 @@ module frame_buffer_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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parameter IN_VPU = 8'b01000011;
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reg [7:0] ram[0:63];
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reg [7:0] rom[0:255];
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reg [7:0] rom[0:127];
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output wire [7:0] address_bus;
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output reg [7:0] to_cpu;
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@ -95,7 +95,7 @@ module frame_buffer_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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vsync, hsync, vpaddle, hpaddle, display_on};
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IN_VPU: to_cpu = {vpu_ram[vpu_write], vpu_ram[vpu_write+1]};
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// ROM
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8'b1???????: to_cpu = rom[address_bus[6:0] + 128];
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8'b1???????: to_cpu = rom[address_bus[7:0] + 128];
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default: ;
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endcase
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@ -131,7 +131,8 @@ module frame_buffer_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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__asm
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.arch femto8
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.org 128
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.len 128
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.define VPU_LO 8
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.define VPU_HI 9
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.define VPU_WRITE 10
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@ -152,25 +153,24 @@ Start:
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sta VPU_LO
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sta VPU_HI
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sta 0
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sta 1
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DisplayLoop:
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zero B
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movrb A
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mov A,[b]
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sta VPU_WRITE
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sta VPU_MOVE
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sta VPU_WRITE
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sta VPU_MOVE
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sta VPU_WRITE
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sta VPU_MOVE
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lia F_VSYNC
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lib IN_FLAGS
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andrb NOP
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lda #F_VSYNC
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ldb #IN_FLAGS
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and none,[B]
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bz DisplayLoop
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WaitVsync:
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andrb NOP
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and none,[B]
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bnz WaitVsync
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zero B
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movrb A
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mov A,[b]
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inc A
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sta 0
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jmp DisplayLoop
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@ -52,7 +52,7 @@ module racing_game_cpu_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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parameter IN_FLAGS = 8'b01000010;
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reg [7:0] ram[0:63];
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reg [7:0] rom[0:255];
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reg [7:0] rom[0:127];
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output wire [7:0] address_bus;
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output reg [7:0] to_cpu;
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@ -80,7 +80,7 @@ module racing_game_cpu_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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IN_FLAGS: to_cpu = {2'b0, frame_collision,
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vsync, hsync, vpaddle, hpaddle, display_on};
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// ROM
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8'b1???????: to_cpu = rom[address_bus[6:0] + 128];
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8'b1???????: to_cpu = rom[address_bus[6:0]];
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default: ;
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endcase
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@ -154,6 +154,7 @@ module racing_game_cpu_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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__asm
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.arch femto8
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.org 128
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.len 128
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.define PADDLE_X 0
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.define PADDLE_Y 1
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@ -178,11 +179,11 @@ module racing_game_cpu_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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.define F_COLLIDE 32
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Start:
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lia 128
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lda #128
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sta PLAYER_X
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sta ENEMY_X
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sta ENEMY_Y
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lia 180
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sta ENEMY_Y
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lda #180
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sta PLAYER_Y
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zero A
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sta SPEED
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@ -190,67 +191,67 @@ Start:
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sta ENEMY_DIR
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; test hpaddle flag
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DisplayLoop:
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lia F_HPADDLE
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lib IN_FLAGS
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andrb NOP
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lda #F_HPADDLE
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ldb #IN_FLAGS
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and none,[B]
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bz DisplayLoop
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; [vpos] -> paddle_x
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lib IN_VPOS
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movrb A
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ldb #IN_VPOS
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mov A,[B]
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sta PLAYER_X
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; wait for vsync=1 then vsync=0
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lia F_VSYNC
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lib IN_FLAGS
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lda #F_VSYNC
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ldb #IN_FLAGS
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WaitForVsyncOn:
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andrb NOP
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and none,[B]
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bz WaitForVsyncOn
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WaitForVsyncOff:
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andrb NOP
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and none,[B]
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bnz WaitForVsyncOff
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; check collision
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lia F_COLLIDE
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lib IN_FLAGS
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andrb NOP
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lda #F_COLLIDE
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ldb #IN_FLAGS
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and none,[B]
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bz NoCollision
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; load slow speed
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lia 16
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lda #16
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sta SPEED
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NoCollision:
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; update speed
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lib SPEED
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movrb A
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ldb #SPEED
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mov A,[B]
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inc A
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; don't store if == 0
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bz MaxSpeed
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sta SPEED
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MaxSpeed:
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movrb A
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mov A,[B]
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lsr A
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lsr A
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lsr A
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lsr A
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; add to lo byte of track pos
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lib TRACKPOS_LO
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addrb B
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ldb #TRACKPOS_LO
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add B,[B]
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swapab
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sta TRACKPOS_LO
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swapab
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; update enemy vert pos
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lib ENEMY_Y
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addrb A
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ldb #ENEMY_Y
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add A,[B]
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sta ENEMY_Y
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; update enemy horiz pos
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lib ENEMY_X
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movrb A
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lib ENEMY_DIR
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addrb A
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ldb #ENEMY_X
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mov A,[B]
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ldb #ENEMY_DIR
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add A,[B]
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sta ENEMY_X
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subi A 64
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andi A 127
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sub A,#64
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and A,#127
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bnz SkipXReverse
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; load ENEMY_DIR and negate
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zero A
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subrb A
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sub A,[B]
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sta ENEMY_DIR
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; back to display loop
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SkipXReverse:
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@ -31,9 +31,6 @@ module starfield_top(clk, reset, hsync, vsync, rgb);
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.lfsr(lfsr));
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wire star_on = &lfsr[15:9];
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wire r = display_on && star_on && lfsr[0];
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wire g = display_on && star_on && lfsr[1];
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wire b = display_on && star_on && lfsr[2];
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assign rgb = {b,g,r};
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assign rgb = display_on && star_on ? lfsr[2:0] : 0;
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endmodule
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189
src/assembler.js
189
src/assembler.js
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@ -1,189 +0,0 @@
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EXAMPLE_SPEC = {
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vars:{
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reg:{bits:2, toks:['a', 'b', 'ip', 'none']},
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unop:{bits:3, toks:['mova','movb','inc','dec','asl','lsr','rol','ror']},
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binop:{bits:3, toks:['or','and','xor','zero','add','sub','adc','sbb']},
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imm4:{bits:4},
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imm8:{bits:8},
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rel:{bits:8, iprel:true, ipofs:1},
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},
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rules:[
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{fmt:'~binop ~reg,b', bits:['00',1,'1',0]},
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{fmt:'~binop ~reg,#~imm8', bits:['01',1,'1',0,2]},
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{fmt:'~binop ~reg,[b]', bits:['11',1,'1',0]},
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{fmt:'~unop ~reg', bits:['00',1,'0',0]},
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{fmt:'lda #~imm8', bits:['01','00','0001',0]},
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{fmt:'ldb #~imm8', bits:['01','01','0001',0]},
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{fmt:'jmp ~imm8', bits:['01','10','0001',0]},
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{fmt:'sta ~imm4', bits:['1001',0]},
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{fmt:'bcc ~rel', bits:['1010','0001',0]},
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{fmt:'bcs ~rel', bits:['1010','0011',0]},
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{fmt:'bz ~rel', bits:['1010','1101',0]},
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{fmt:'bnz ~rel', bits:['1010','0101',0]},
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{fmt:'clc', bits:['10001000']},
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{fmt:'swapab', bits:['10000001']},
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{fmt:'reset', bits:['10001111']},
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]
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}
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function rule2regex(rule, vars) {
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var s = rule.fmt;
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var varlist = [];
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rule.prefix = s.split(/\s+/)[0];
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s = s.replace(/\s+/g, '\\s');
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s = s.replace(/\[/g, '\\[');
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s = s.replace(/\]/g, '\\]');
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s = s.replace(/\./g, '\\.');
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s = s.replace(/~\w+/g, function(varname) {
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varname = varname.substr(1);
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var v = vars[varname];
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varlist.push(varname);
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if (!v)
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throw Error("Could not find rule for ~" + varname);
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else if (v.toks)
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return '(\\w+)';
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else
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return '([0-9]+|[$][0-9a-f]+|\\w+)';
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});
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rule.re = new RegExp('^'+s+'$', 'i');
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rule.varlist = varlist;
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// TODO: check rule constraints
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return rule;
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}
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var Assembler = function(spec) {
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var self = this;
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var ip = 0;
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var linenum = 0;
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var symbols = {};
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var errors = [];
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var outwords = [];
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var fixups = [];
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var width = 8;
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for (var i=0; i<spec.rules.length; i++)
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rule2regex(spec.rules[i], spec.vars);
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function warning(msg) {
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errors.push({msg:msg, line:linenum});
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}
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function addBytes(result) {
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var op = result.opcode;
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var nb = result.nbits/width;
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for (var i=0; i<nb; i++)
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outwords[ip++] = (op >> (nb-1-i)*width) & ((1<<width)-1);
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}
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self.buildInstruction = function(rule, m) {
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var opcode = 0;
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var oplen = 0;
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for (var i=0; i<rule.bits.length; i++) {
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var b = rule.bits[i];
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var n,x;
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if (b.length) {
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n = b.length;
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x = parseInt(b,2);
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} else {
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var id = m[b+1];
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var v = spec.vars[rule.varlist[b]];
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n = v.bits;
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if (v.toks) {
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x = v.toks.indexOf(id);
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if (x < 0)
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return null;
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} else {
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if (id.startsWith("$"))
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x = parseInt(id.substr(1), 16);
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else
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x = parseInt(id);
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// is it a label? add fixup
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if (isNaN(x)) {
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fixups.push({sym:id, ofs:ip, bitlen:n, bitofs:oplen, line:linenum, iprel:!!v.iprel, ipofs:(v.ipofs+0)});
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x = 0;
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}
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}
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}
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var mask = (1<<n)-1;
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if ((x&mask) != x)
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warning("Value " + x + " could not fit in " + n + " bits");
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opcode = (opcode << n) | x;
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oplen += n;
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}
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if (oplen == 0)
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warning("Opcode had zero length");
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else if ((oplen % width) != 0)
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warning("Opcode was not word-aligned (" + oplen + " bits)");
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return {opcode:opcode, nbits:oplen};
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}
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self.assemble = function(line) {
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linenum++;
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// remove comments
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line = line.replace(/[;].*/g, '');
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line = line.trim().toLowerCase();
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// is it a directive?
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if (line[0] == '.') {
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var tokens = line.split(/\s+/);
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if (tokens[0] == '.define')
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symbols[tokens[1]] = {value:tokens[2]};
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else
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warning("Unrecognized directive: " + line);
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return;
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}
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// find labels
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line = line.replace(/(\w+):/, function(_label, label) {
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symbols[label] = {value:ip};
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return '';
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});
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line = line.trim();
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// look at each rule in order
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for (var i=0; i<spec.rules.length; i++) {
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var rule = spec.rules[i];
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var m = rule.re.exec(line);
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if (m) {
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var result = self.buildInstruction(rule, m);
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if (result) {
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addBytes(result);
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return result;
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}
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}
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}
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warning("Could not decode instruction: " + line);
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}
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self.finish = function() {
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for (var i=0; i<fixups.length; i++) {
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var fix = fixups[i];
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var sym = symbols[fix.sym];
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if (sym) {
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var ofs = fix.ofs + (fix.bitofs>>3);
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var shift = fix.bitofs&7;
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var mask = ((1<<fix.bitlen)-1);
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var value = sym.value;
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if (fix.iprel) value -= fix.ofs + fix.ipofs;
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value &= mask;
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// TODO: check range
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// TODO: span multiple words?
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outwords[ofs] ^= value;
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} else {
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warning("Symbol '" + fix.sym + "' not found");
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}
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}
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fixups = [];
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}
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self.state = function() {
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return {ip:ip, line:linenum, output:outwords, errors:errors, fixups:fixups};
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}
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}
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var asm = new Assembler(EXAMPLE_SPEC);
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console.log(EXAMPLE_SPEC);
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console.log(asm.assemble(".define FOO 0xa")); // TODO
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console.log(asm.assemble(" sta FOO"));
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console.log(asm.assemble(" sta 10"));
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console.log(asm.assemble(" add a,#25 ; comment "));
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console.log(asm.assemble("Label: asl a "));
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console.log(asm.assemble(" sub b,[b] "));
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console.log(asm.assemble(" bz Label "));
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asm.finish();
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console.log(asm.state());
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@ -433,6 +433,12 @@ var VerilogPlatform = function(mainElement, options) {
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mouse_pressed = false;
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if (e.target.setCapture) e.target.releaseCapture();
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});
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$(video.canvas).keydown(function(e) {
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switch (e.keyCode) {
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case 37: scope_time_x--; dirty=true; break;
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case 39: scope_time_x++; dirty=true; break;
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}
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});
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audio = new SampleAudio(AUDIO_FREQ);
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idata = video.getFrameData();
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// TODO: 15.7 kHz?
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@ -499,8 +505,7 @@ var VerilogPlatform = function(mainElement, options) {
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trace_index = scope_x_offset = 0;
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trace_buffer.fill(0);
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dirty = true;
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console.log(gen.rotate);
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video.setRotate(gen.rotate ? -90 : 0);
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if (video) video.setRotate(gen.rotate ? -90 : 0);
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}
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this.tick = function() {
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gen.tick2();
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@ -180,7 +180,7 @@ function scrollProfileView(_ed) {
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}
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function newEditor(mode) {
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var isAsm = mode=='6502' || mode =='z80';
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var isAsm = mode=='6502' || mode =='z80' || mode=='verilog'; // TODO
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editor = CodeMirror(document.getElementById('editor'), {
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theme: 'mbo',
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lineNumbers: true,
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@ -0,0 +1,271 @@
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EXAMPLE_SPEC = {
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name:'femto8',
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vars:{
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reg:{bits:2, toks:['a', 'b', 'ip', 'none']},
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unop:{bits:3, toks:['mova','movb','inc','dec','asl','lsr','rol','ror']},
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binop:{bits:3, toks:['or','and','xor','zero','add','sub','adc','sbb']},
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imm4:{bits:4},
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imm8:{bits:8},
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rel:{bits:8, iprel:true, ipofs:1},
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},
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rules:[
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{fmt:'~binop ~reg,b', bits:['00',1,'1',0]},
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{fmt:'~binop ~reg,#~imm8', bits:['01',1,'1',0,2]},
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{fmt:'~binop ~reg,[b]', bits:['11',1,'1',0]},
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{fmt:'~unop ~reg', bits:['00',1,'0',0]},
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{fmt:'mov ~reg,[b]', bits:['11',0,'0001']},
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{fmt:'zero ~reg', bits:['00',0,'1011']},
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{fmt:'lda #~imm8', bits:['01','00','0001',0]},
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{fmt:'ldb #~imm8', bits:['01','01','0001',0]},
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{fmt:'jmp ~imm8', bits:['01','10','0001',0]},
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{fmt:'sta ~imm4', bits:['1001',0]},
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{fmt:'bcc ~imm8', bits:['1010','0001',0]},
|
||||
{fmt:'bcs ~imm8', bits:['1010','0011',0]},
|
||||
{fmt:'bz ~imm8', bits:['1010','1100',0]},
|
||||
{fmt:'bnz ~imm8', bits:['1010','0100',0]},
|
||||
{fmt:'clc', bits:['10001000']},
|
||||
{fmt:'swapab', bits:['10000001']},
|
||||
{fmt:'reset', bits:['10001111']},
|
||||
]
|
||||
}
|
||||
|
||||
var Assembler = function(spec) {
|
||||
var self = this;
|
||||
var ip = 0;
|
||||
var origin = 0;
|
||||
var linenum = 0;
|
||||
var symbols = {};
|
||||
var errors = [];
|
||||
var outwords = [];
|
||||
var asmlines = [];
|
||||
var fixups = [];
|
||||
var width = 8;
|
||||
var codelen = 0;
|
||||
var aborted = false;
|
||||
|
||||
function rule2regex(rule, vars) {
|
||||
var s = rule.fmt;
|
||||
var varlist = [];
|
||||
rule.prefix = s.split(/\s+/)[0];
|
||||
s = s.replace(/\s+/g, '\\s+');
|
||||
s = s.replace(/\[/g, '\\[');
|
||||
s = s.replace(/\]/g, '\\]');
|
||||
s = s.replace(/\./g, '\\.');
|
||||
s = s.replace(/~\w+/g, function(varname) {
|
||||
varname = varname.substr(1);
|
||||
var v = vars[varname];
|
||||
varlist.push(varname);
|
||||
if (!v)
|
||||
throw Error("Could not find rule for ~" + varname);
|
||||
else if (v.toks)
|
||||
return '(\\w+)';
|
||||
else
|
||||
return '([0-9]+|[$][0-9a-f]+|\\w+)';
|
||||
});
|
||||
rule.re = new RegExp('^'+s+'$', 'i');
|
||||
rule.varlist = varlist;
|
||||
// TODO: check rule constraints
|
||||
return rule;
|
||||
}
|
||||
|
||||
function preprocessRules() {
|
||||
for (var i=0; i<spec.rules.length; i++)
|
||||
rule2regex(spec.rules[i], spec.vars);
|
||||
}
|
||||
if (spec) preprocessRules();
|
||||
|
||||
function warning(msg) {
|
||||
errors.push({msg:msg, line:linenum});
|
||||
}
|
||||
function fatal(msg) {
|
||||
warning(msg);
|
||||
aborted = true;
|
||||
}
|
||||
function hex(v, nd) {
|
||||
try {
|
||||
if (!nd) nd = 2;
|
||||
var s = v.toString(16).toUpperCase();
|
||||
while (s.length < nd)
|
||||
s = "0" + s;
|
||||
return s;
|
||||
} catch (e) {
|
||||
return v+"";
|
||||
}
|
||||
}
|
||||
function addBytes(result) {
|
||||
asmlines.push({
|
||||
line:linenum,
|
||||
offset:ip,
|
||||
nbits:result.nbits
|
||||
});
|
||||
var op = result.opcode;
|
||||
var nb = result.nbits/width;
|
||||
for (var i=0; i<nb; i++) {
|
||||
outwords[ip++ - origin] = (op >> (nb-1-i)*width) & ((1<<width)-1);
|
||||
}
|
||||
}
|
||||
|
||||
function parseConst(s) {
|
||||
if (!s.length)
|
||||
return s;
|
||||
else if (s.startsWith("$"))
|
||||
return parseInt(s.substr(1), 16);
|
||||
else
|
||||
return parseInt(s);
|
||||
}
|
||||
|
||||
self.buildInstruction = function(rule, m) {
|
||||
var opcode = 0;
|
||||
var oplen = 0;
|
||||
for (var i=0; i<rule.bits.length; i++) {
|
||||
var b = rule.bits[i];
|
||||
var n,x;
|
||||
if (b.length) {
|
||||
n = b.length;
|
||||
x = parseInt(b,2);
|
||||
} else {
|
||||
var id = m[b+1];
|
||||
var v = spec.vars[rule.varlist[b]];
|
||||
if (!v) {
|
||||
warning("Could not find matching identifier for '" + m[0] + "'");
|
||||
return;
|
||||
}
|
||||
n = v.bits;
|
||||
if (v.toks) {
|
||||
x = v.toks.indexOf(id);
|
||||
if (x < 0)
|
||||
return null;
|
||||
} else {
|
||||
x = parseConst(id);
|
||||
// is it a label? add fixup
|
||||
if (isNaN(x)) {
|
||||
fixups.push({sym:id, ofs:ip, bitlen:n, bitofs:oplen, line:linenum, iprel:!!v.iprel, ipofs:(v.ipofs+0)});
|
||||
x = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
var mask = (1<<n)-1;
|
||||
if ((x&mask) != x)
|
||||
warning("Value " + x + " could not fit in " + n + " bits");
|
||||
opcode = (opcode << n) | x;
|
||||
oplen += n;
|
||||
}
|
||||
if (oplen == 0)
|
||||
warning("Opcode had zero length");
|
||||
else if ((oplen % width) != 0)
|
||||
warning("Opcode was not word-aligned (" + oplen + " bits)");
|
||||
return {opcode:opcode, nbits:oplen};
|
||||
}
|
||||
|
||||
function loadArch(arch) {
|
||||
if (self.loadFile) {
|
||||
var json = self.loadFile(arch + ".json");
|
||||
if (json && json.vars && json.rules) {
|
||||
spec = json;
|
||||
preprocessRules();
|
||||
} else {
|
||||
fatal("Could not load arch file '" + arch + ".json'");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
function parseDirective(tokens) {
|
||||
if (tokens[0] == '.define')
|
||||
symbols[tokens[1]] = {value:tokens[2]};
|
||||
else if (tokens[0] == '.org')
|
||||
ip = origin = parseInt(tokens[1]);
|
||||
else if (tokens[0] == '.len')
|
||||
codelen = parseInt(tokens[1]);
|
||||
else if (tokens[0] == '.width')
|
||||
width = parseInt(tokens[1]);
|
||||
else if (tokens[0] == '.arch')
|
||||
loadArch(tokens[1]);
|
||||
else
|
||||
warning("Unrecognized directive: " + tokens);
|
||||
}
|
||||
|
||||
self.assemble = function(line) {
|
||||
linenum++;
|
||||
// remove comments
|
||||
line = line.replace(/[;].*/g, '');
|
||||
line = line.trim().toLowerCase();
|
||||
// is it a directive?
|
||||
if (line[0] == '.') {
|
||||
var tokens = line.split(/\s+/);
|
||||
parseDirective(tokens);
|
||||
return;
|
||||
}
|
||||
// find labels
|
||||
line = line.replace(/(\w+):/, function(_label, label) {
|
||||
symbols[label] = {value:ip};
|
||||
return ''; // replace label with blank
|
||||
});
|
||||
line = line.trim();
|
||||
if (line == '')
|
||||
return; // empty line
|
||||
// look at each rule in order
|
||||
if (!spec) { fatal("Need to load .spec first"); return; }
|
||||
for (var i=0; i<spec.rules.length; i++) {
|
||||
var rule = spec.rules[i];
|
||||
var m = rule.re.exec(line);
|
||||
if (m) {
|
||||
var result = self.buildInstruction(rule, m);
|
||||
if (result) {
|
||||
addBytes(result);
|
||||
return result;
|
||||
}
|
||||
}
|
||||
}
|
||||
warning("Could not decode instruction: " + line);
|
||||
}
|
||||
|
||||
self.finish = function() {
|
||||
// apply fixups
|
||||
for (var i=0; i<fixups.length; i++) {
|
||||
var fix = fixups[i];
|
||||
var sym = symbols[fix.sym];
|
||||
if (sym) {
|
||||
var ofs = fix.ofs + (fix.bitofs>>3);
|
||||
var shift = fix.bitofs&7;
|
||||
var mask = ((1<<fix.bitlen)-1);
|
||||
var value = parseConst(sym.value);
|
||||
if (fix.iprel) value -= fix.ofs + fix.ipofs;
|
||||
value &= mask;
|
||||
// TODO: check range
|
||||
// TODO: span multiple words?
|
||||
outwords[ofs - origin] ^= value;
|
||||
} else {
|
||||
warning("Symbol '" + fix.sym + "' not found");
|
||||
}
|
||||
}
|
||||
// update asmlines
|
||||
for (var i=0; i<asmlines.length; i++) {
|
||||
var al = asmlines[i];
|
||||
al.insns = '';
|
||||
for (var j=0; j<al.nbits/width; j++) {
|
||||
var word = outwords[al.offset + j - origin];
|
||||
if (j>0) al.insns += ' ';
|
||||
al.insns += hex(word,width/4);
|
||||
}
|
||||
}
|
||||
while (outwords.length < codelen) {
|
||||
outwords.push(0);
|
||||
}
|
||||
fixups = [];
|
||||
return self.state();
|
||||
}
|
||||
|
||||
self.assembleFile = function(text) {
|
||||
var lines = text.split(/\n/g);
|
||||
for (var i=0; i<lines.length && !aborted; i++) {
|
||||
self.assemble(lines[i]);
|
||||
}
|
||||
return self.finish();
|
||||
}
|
||||
|
||||
self.state = function() {
|
||||
return {ip:ip, line:linenum, origin:origin, codelen:codelen,
|
||||
output:outwords, asmlines:asmlines, errors:errors, fixups:fixups};
|
||||
}
|
||||
}
|
||||
|
|
@ -1113,25 +1113,47 @@ function compileCASPR(code, platform, options) {
|
|||
}
|
||||
}
|
||||
|
||||
function compileASM(asmcode, platform, options) {
|
||||
load("assembler");
|
||||
var asm = new Assembler();
|
||||
asm.loadFile = function(filename) {
|
||||
// TODO: what if it comes from dependencies?
|
||||
var path = '../../presets/' + platform + '/' + filename;
|
||||
var xhr = new XMLHttpRequest();
|
||||
xhr.responseType = 'json';
|
||||
xhr.open("GET", path, false); // synchronous request
|
||||
xhr.send(null);
|
||||
return xhr.response;
|
||||
};
|
||||
var result = asm.assembleFile(asmcode);
|
||||
return result;
|
||||
}
|
||||
|
||||
function compileVerilator(code, platform, options) {
|
||||
loadNative("verilator_bin");
|
||||
load("verilator2js");
|
||||
var errors = [];
|
||||
var asmlines = [];
|
||||
// compile inline asm
|
||||
// TODO: keep line numbers
|
||||
code = code.replace(/__asm\b([\s\S]+?)\b__endasm\b/g, function(s,asmcode) {
|
||||
var asmout = compileCASPR(asmcode, platform, options);
|
||||
code = code.replace(/__asm\b([\s\S]+?)\b__endasm\b/g, function(s,asmcode,index) {
|
||||
var firstline = code.substr(0,index).match(/\n/g).length;
|
||||
var asmout = compileASM(asmcode, platform, options);
|
||||
if (asmout.errors && asmout.errors.length) {
|
||||
errors = asmout.errors;
|
||||
for (var i=0; i<errors.length; i++)
|
||||
errors[i].line += firstline;
|
||||
return "";
|
||||
} else if (asmout.output) {
|
||||
var s = "";
|
||||
var out = asmout.output;
|
||||
for (var i=0; i<out.length; i++) {
|
||||
if (i>0) s += ",";
|
||||
s += out[i];
|
||||
s += 0|out[i];
|
||||
}
|
||||
//console.log(s);
|
||||
asmlines = asmout.asmlines;
|
||||
for (var i=0; i<asmlines.length; i++)
|
||||
asmlines[i].line += firstline;
|
||||
return s;
|
||||
}
|
||||
});
|
||||
|
|
@ -1162,6 +1184,7 @@ function compileVerilator(code, platform, options) {
|
|||
rtn.errors = errors;
|
||||
rtn.lines = [];// TODO
|
||||
rtn.intermediate = {listing:h_file + cpp_file};
|
||||
rtn.lines = asmlines;
|
||||
return rtn;
|
||||
} catch(e) {
|
||||
console.log(e);
|
||||
|
|
|
|||
|
|
@ -0,0 +1,84 @@
|
|||
|
||||
var vm = require('vm');
|
||||
var fs = require('fs');
|
||||
var assert = require('assert');
|
||||
var includeInThisContext = function(path) {
|
||||
var code = fs.readFileSync(path);
|
||||
vm.runInThisContext(code, path);
|
||||
};
|
||||
|
||||
includeInThisContext("src/worker/assembler.js");
|
||||
|
||||
describe('Assemble', function() {
|
||||
it('Should assemble', function() {
|
||||
var source = `.arch femto8
|
||||
.org 128
|
||||
.len 128
|
||||
|
||||
.define VPU_LO 8
|
||||
.define VPU_HI 9
|
||||
.define VPU_WRITE 10
|
||||
.define VPU_MOVE 11
|
||||
.define IN_FLAGS $42
|
||||
.define F_VSYNC 16
|
||||
|
||||
Start:
|
||||
zero A
|
||||
sta VPU_LO
|
||||
sta VPU_HI
|
||||
sta 0
|
||||
DisplayLoop:
|
||||
zero B
|
||||
mov A,[b]
|
||||
sta VPU_WRITE
|
||||
sta VPU_MOVE
|
||||
lda #F_VSYNC
|
||||
ldb #IN_FLAGS
|
||||
and none,[B]
|
||||
bz DisplayLoop
|
||||
WaitVsync:
|
||||
and none,[B]
|
||||
bnz WaitVsync
|
||||
zero B
|
||||
mov A,[b]
|
||||
inc A
|
||||
sta 0
|
||||
jmp DisplayLoop
|
||||
`;
|
||||
var asm = new Assembler(EXAMPLE_SPEC);
|
||||
var result = asm.assembleFile(source);
|
||||
//console.log(result);
|
||||
//assert.equal(result, {});
|
||||
assert.equal(128, result.origin);
|
||||
assert.equal(152, result.ip);
|
||||
assert.deepEqual({
|
||||
insns: "0B",
|
||||
line: 13,
|
||||
nbits: 8,
|
||||
offset: 128
|
||||
}, result.asmlines[0]);
|
||||
assert.deepEqual(
|
||||
[ { line: 13, offset: 128, nbits: 8, insns: '0B' },
|
||||
{ line: 14, offset: 129, nbits: 8, insns: '98' },
|
||||
{ line: 15, offset: 130, nbits: 8, insns: '99' },
|
||||
{ line: 16, offset: 131, nbits: 8, insns: '90' },
|
||||
{ line: 18, offset: 132, nbits: 8, insns: '1B' },
|
||||
{ line: 19, offset: 133, nbits: 8, insns: 'C1' },
|
||||
{ line: 20, offset: 134, nbits: 8, insns: '9A' },
|
||||
{ line: 21, offset: 135, nbits: 8, insns: '9B' },
|
||||
{ line: 22, offset: 136, nbits: 16, insns: '41 10' },
|
||||
{ line: 23, offset: 138, nbits: 16, insns: '51 42' },
|
||||
{ line: 24, offset: 140, nbits: 8, insns: 'F9' },
|
||||
{ line: 25, offset: 141, nbits: 16, insns: 'AC 84' },
|
||||
{ line: 27, offset: 143, nbits: 8, insns: 'F9' },
|
||||
{ line: 28, offset: 144, nbits: 16, insns: 'A4 8F' },
|
||||
{ line: 29, offset: 146, nbits: 8, insns: '1B' },
|
||||
{ line: 30, offset: 147, nbits: 8, insns: 'C1' },
|
||||
{ line: 31, offset: 148, nbits: 8, insns: '02' },
|
||||
{ line: 32, offset: 149, nbits: 8, insns: '90' },
|
||||
{ line: 33, offset: 150, nbits: 16, insns: '61 84' },
|
||||
], result.asmlines);
|
||||
assert.equal(11, result.output[0]);
|
||||
assert.equal(128, result.output.length);
|
||||
});
|
||||
});
|
||||
Loading…
Reference in New Issue