9 Commits

Author	SHA1	Message	Date
Steven Hugg	5d753892fa	version 3.2.1	2018-11-25 08:01:42 -05:00
Steven Hugg	ca0c7cf045	verilog.sim platform and verilog.html	2018-11-18 12:30:41 -05:00
Steven Hugg	d5154a649a	added platform verilog to menu; fixed for TS 3.1	2018-10-11 11:43:09 -04:00
Steven Hugg	62f5303107	converting some stuff to TypeScript (make tsweb)	2018-07-05 21:23:08 -05:00
Steven Hugg	4bb460a79b	fixed trace timing and bitmap editor	2018-07-04 09:54:36 -06:00
Steven Hugg	5b92659b97	"Save As"; command-line assembler; 32-bit limit (so far) in opcodes	2018-03-23 15:05:08 -06:00
Steven Hugg	136b1ad175	split up z80 opcodes into fns for Firefox	2017-05-11 08:23:17 -04:00
Steven Hugg	1ca9d50801	added skeleton files	2017-04-19 14:26:46 -04:00
Steven Hugg	0b9da464cd	updated .gitmodules	2017-04-08 20:59:22 -04:00