mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-12-27 14:29:39 +00:00
219 lines
4.4 KiB
Plaintext
219 lines
4.4 KiB
Plaintext
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processor 6502
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;;;
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;;; Apple ][ Delta Modulation Sample Playback
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;;;
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;;; This is the same technique used in the NES
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;;; for DMC samples, but adapted for the Apple ][.
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;;; Basically: Every 1 bit increases the signal
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;;; by 1 step, every 0 bit decreases by 1 step.
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;;; The signal is clipped on the top and bottom.
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;;;
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;;; The NES has a 6-bit DAC, but we only have a
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;;; PWM-encoded signal. We have 13 different
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;;; routines to generate pulses ranging from 4 to
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;;; 14 microseconds long, with a 29-30 microsecond
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;;; interval (when we reach 50% duty cycle we just
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;;; invert the signal)
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;;;
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;;; Every 8 bits we have to fetch a new byte
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;;; and increment the pointer. To avoid a high-
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;;; frequency tone, we generate another pulse
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;;; (the same width as the last) in this macro.
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;;;
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;;; also see http://michaeljmahon.com/RTSynth.html
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;;; and https://github.com/oliverschmidt/Play-BTc
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;;;
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; uninitialized zero-page variables
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seg.u ZEROPAGE
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org $0
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PWMBUF .ds 2
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PWMLEN .ds 1
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TRASH .ds 1
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; speaker toggle
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SPKR equ $c030
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; max pulse width = PULWID*2+4 cycles
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PULWID = 6
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; sleep {1} cycles
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; must be multiple of 2
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MAC SLEEP2
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.CYCLES SET {1}
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IF .CYCLES == 1
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ECHO "MACRO ERROR: 'SLEEP': Duration must be > 1"
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ERR
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ENDIF
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IF .CYCLES >= 12
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jsr HandyRTS
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.CYCLES SET .CYCLES - 12
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ENDIF
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REPEAT .CYCLES / 2
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nop
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REPEND
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ENDM
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ENDM
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; pulse macro
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; flip speaker, wait N*2 cycles
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; flip again, wait (MAX-N)*2 cycles
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; total = 8 + PULWID*2 cycles
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MAC PULSE
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sta SPKR
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SLEEP2 {1}*2
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sta SPKR
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SLEEP2 (PULWID-{1})*2
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ENDM
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; shift next bit into carry flag
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; load next byte and increment
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; pointer if needed
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; {1} : index of previous routine
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; {2} : index of current routine
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; we also interleave a speaker pulse in this routine
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; using macros (these are the IF/ENDIF blocks)
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MAC NEXTPULSE
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lsr ; next bit -> carry flag
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dex ; bit count == 0?
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bne .noinc ; skip inc/reload cycle
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; total pulse = 15 + PULWID*2 cycles
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IF {2} > 0
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sta SPKR
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ELSE
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SLEEP2 8 ; no SPKR toggle, take up 8 cycles
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ENDIF
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IF {2} == 1
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sta SPKR
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ENDIF
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; increment pointer lo byte
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iny ; 2-1 = 1
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IF {2} == 2
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sta SPKR
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ENDIF
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bne .noinchi ; 4
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; increment pointer hi byte
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inc PWMBUF+1
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dec PWMLEN
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bne .noinchi
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rts ; end of sound data
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.noinchi
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IF {2} == 3
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sta SPKR
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ENDIF
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; reset X counter
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ldx #8 ; 6
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IF {2} == 4 || {2} == 5
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sta SPKR
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ENDIF
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; fetch new byte
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lda (PWMBUF),y ; 11
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; a few NOPs to match the normal pulse width
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; (inx, lsr, branch)
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IF {2} == 6
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sta SPKR
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nop
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ENDIF
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IF {2} >= 7
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nop
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sta SPKR
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ENDIF
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; make up cycles we missed
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SLEEP2 PULWID*2-6
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.noinc
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; carry flag still valid from lsr
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bcc LVLS{1}
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ENDM
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;;; start of code
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seg CODE
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org $803 ; starting address
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Start
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lda #>(SAMPLE_END-SAMPLES)+1
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sta PWMLEN
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lda #<SAMPLES
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sta PWMBUF
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lda #>SAMPLES
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sta PWMBUF+1
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jsr Play
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jmp Start
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; handy RTS for wasting 6+6 cycles
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HandyRTS
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rts
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; each pulse takes PULWID*2+18(-1) cycles
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; every 8 bits, the last pulse is repeated
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; 1022727 / 29.5 / (9/8) = 30817 Hz
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; Y = PWMBUF lo address
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; PWMBUF+0 = 0
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Play
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ldy PWMBUF
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lda #0
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sta PWMBUF
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ldx #8
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lda (PWMBUF),y
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; each label emits a pulse at a duty cycle
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; from 0 (silent) to 7
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; if bit is 1, falls through to next highest level
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; otherwise, jumps back to previous level
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LVLS0
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SLEEP2 PULWID*2+8 ; sleep, don't click
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NEXTPULSE 0,0
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LVLS1
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PULSE 0
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NEXTPULSE 0,1
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LVLS2
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PULSE 1
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NEXTPULSE 1,2
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LVLS3
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PULSE 2
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NEXTPULSE 2,3
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LVLS4
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PULSE 3
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NEXTPULSE 3,4
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LVLS5
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PULSE 4
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NEXTPULSE 4,5
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LVLS6
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LVLS6INV equ *+3 ; skip STA SPKR to invert signal
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PULSE 5
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NEXTPULSE 5,6
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bcs LVLS7INV ; 1 = invert signal
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LVLS7
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LVLS7INV equ *+3 ; skip STA SPKR to invert signal
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PULSE 4
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NEXTPULSE 6INV,5 ; 0 = invert signal
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LVLS8
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PULSE 3
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NEXTPULSE 7,4
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LVLS9
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PULSE 2
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NEXTPULSE 8,3
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LVLS10
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PULSE 1
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NEXTPULSE 9,2
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LVLS11
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PULSE 0
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NEXTPULSE 10,1
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LVLS12
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SLEEP2 PULWID*2+8 ; sleep, don't click
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NEXTPULSE 11,0
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bcs LVLS12 ; if 1, stay at highest level
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; delta-encoded samples
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SAMPLES
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.incbin "springchicken.dat12.bin" ; "Spring Chicken" by BryanTeoh
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SAMPLE_END
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