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https://github.com/sehugg/8bitworkshop.git
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141 lines
3.7 KiB
Verilog
141 lines
3.7 KiB
Verilog
`include "hvsync_generator.v"
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module minefield(hpos, vpos, mine_gfx);
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input [8:0] hpos;
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input [8:0] vpos;
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output mine_gfx;
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// mine X coordinates in ROM
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reg [3:0] mine_xpos [0:15];
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// 1 bit for each mine
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reg [15:0] mine_exploded;
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// screen-wide pattern for mines
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wire mine_pattern = ~(hpos[0] ^ hpos[1]) ^ (vpos[0] ^ vpos[1])
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&& hpos[2] && vpos[2];
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// limit mine pattern to a rectangular window
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wire mine_field = (hpos >= 64 && hpos < 160)
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&& (vpos >= 48 && vpos < 176)
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&& mine_pattern;
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// index for each of the 16 mines in window
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wire [3:0] mine_vindex = vpos[6:3]^8;
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// select only 1 mine per horizontal slice
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wire mine_all = (hpos[6:3]==(mine_xpos[mine_vindex]^8))
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&& mine_field;
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// only show mines that haven't exploded
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wire mine_gfx = mine_all && !mine_exploded[mine_vindex];
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initial begin
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mine_exploded = 0;
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mine_xpos[0] = 2;
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mine_xpos[1] = 10;
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mine_xpos[2] = 6;
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mine_xpos[3] = 0;
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mine_xpos[4] = 9;
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mine_xpos[5] = 3;
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mine_xpos[6] = 7;
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mine_xpos[7] = 11;
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mine_xpos[8] = 4;
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mine_xpos[9] = 1;
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mine_xpos[10] = 10;
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mine_xpos[11] = 5;
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mine_xpos[12] = 11;
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mine_xpos[13] = 3;
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mine_xpos[14] = 8;
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mine_xpos[15] = 0;
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end
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endmodule
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module playfield(hpos, vpos, playfield_gfx);
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input [8:0] hpos;
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input [8:0] vpos;
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output playfield_gfx;
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reg [31:0] maze [0:27];
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wire [4:0] x = hpos[7:3];
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wire [4:0] y = vpos[7:3] - 2;
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assign playfield_gfx = maze[y][x];
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initial begin/*{w:32,h:28,bpw:32}*/
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maze[0] = 32'b11111111111111111111111111111111;
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maze[1] = 32'b10000000000100000000001000000001;
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maze[2] = 32'b10000000000100000000001000000001;
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maze[3] = 32'b10000000000100000000000000000001;
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maze[4] = 32'b10011110000000000000000000000001;
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maze[5] = 32'b10000000000000000000000011111001;
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maze[6] = 32'b10000000001000000000000000100001;
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maze[7] = 32'b11100010000000000000000000100001;
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maze[8] = 32'b10000010000000000000000000000001;
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maze[9] = 32'b10000011100000000000000000000001;
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maze[10] = 32'b10000000000000000000000000000001;
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maze[11] = 32'b10000000000000000000000000000001;
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maze[12] = 32'b11111000001000000000000000000001;
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maze[13] = 32'b10001000001000000000000111100001;
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maze[14] = 32'b10001110001000000000000000000001;
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maze[15] = 32'b10000000001000000000000000000001;
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maze[16] = 32'b10000000001000000000000000000001;
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maze[17] = 32'b10001111000000000000000000000001;
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maze[18] = 32'b10000000000000000000000100011001;
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maze[19] = 32'b10000000000000000000000100010001;
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maze[20] = 32'b10000001001000000000000100010001;
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maze[21] = 32'b10000001001110000000000100000001;
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maze[22] = 32'b10000001000000000010001100000001;
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maze[23] = 32'b10001000000000000000000000000001;
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maze[24] = 32'b10001000000111100000000000010001;
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maze[25] = 32'b10001000000000100000000000010001;
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maze[26] = 32'b10001000000000000010000000010001;
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maze[27] = 32'b11111111111111111111111111111111;
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end
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endmodule
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module mine_test_top(clk, hsync, vsync, rgb);
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input clk;
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output hsync, vsync;
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output [2:0] rgb;
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wire display_on;
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wire [8:0] hpos;
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wire [8:0] vpos;
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wire mine_gfx;
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wire playfield_gfx;
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hvsync_generator hvsync_gen(
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.clk(clk),
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.reset(0),
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.hsync(hsync),
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.vsync(vsync),
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.display_on(display_on),
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.hpos(hpos),
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.vpos(vpos)
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);
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minefield mine_gen(
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.hpos(hpos),
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.vpos(vpos),
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.mine_gfx(mine_gfx)
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);
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playfield playfield_gen(
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.hpos(hpos),
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.vpos(vpos),
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.playfield_gfx(playfield_gfx)
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);
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wire r = display_on && mine_gfx;
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wire g = display_on && playfield_gfx;
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wire b = display_on && 0;
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assign rgb = {b,g,r};
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endmodule
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