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106 lines
3.0 KiB
Plaintext
106 lines
3.0 KiB
Plaintext
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processor 6502
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include "vcs.h"
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include "macro.h"
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org $f000
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;
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; We're going to try to animate sprites horizontally.
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; Remember, we have to pause the CPU until the exact moment the
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; scanline hits the desired horizontal position of the sprite.
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; Since we can't hard-code the SLEEP macro we'll have to do it
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; dynamically somehow. But since the TIA beam is racing so much
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; faster than the CPU clock, we'll have to be clever.
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;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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counter equ $81
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start CLEAN_START
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nextframe
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VERTICAL_SYNC
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; 37 lines of VBLANK
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ldx #35
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lvblank sta WSYNC
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dex
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bne lvblank
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; This will be the 36th VBLANK. We'll use up some of this scanline's
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; time to set up for the next line, where we'll set the sprite position.
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; For now the position will be in CPU clocks, not TIA clocks.
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; We're going to use 'counter' as the horiz. position, load into A.
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lda counter
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ror ; divide frame counter by 4 to slow animation
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ror
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and #$3f ; now in range (0-63)
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sta WSYNC ; wait for next line
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; This is the 37th VBLANK where we'll set the sprite position.
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; We've got our desired horizontal position in A.
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; First we divide it by 4. We'll need it later in our delay loop.
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; But we'll use the remainder bits to add cycles.
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; The first bit will add either 0 or 1 CPU cycles.
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lsr ; shift right, bit 0 goes into carry flag
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bcs delay1 ; branch to next insn if carry set - adds +1 cycle
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delay1
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; The second bit will add either 0 or 2 CPU cycles.
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lsr
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bcc delay2 ; branch if carry clear - subtract -1 cycle
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bcs delay2 ; guaranteed to succeed - adds +3 cycles
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delay2
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; So now we've used the remainder of our divide-by-4 operations to
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; add between 0 and 3 CPU cycles (0-9 TIA clocks).
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; The next loop takes 5 CPU cycles per iteration (15 TIA clocks).
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tax ; transfer A to X
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delayx dex ; decrement X
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bpl delayx ; branch while X is non-negative
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sta RESP0 ; set position of sprite #1
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sta WSYNC ; end of 37th line
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; The TIA clocks 3 pixels for every 1 CPU clock.
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; So our final sprite position is C + (X%4)*3 + (X/4)*15
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; (C is the fixed # of instruction clocks)
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; We've lost a bit of resolution in our positioning, since we
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; divided the horizontal position by 4 but our tightest loop takes
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; 5 cycles per iteration. We'll achieve finer control later using
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; some additional TIA registers.
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; Now draw the 192 scanlines, drawing the sprite.
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; We've already set its horizontal position for the entire frame.
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ldx #192
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lda #0 ; changes every scanline
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ldy counter ; changes every frame
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lvscan
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sta WSYNC ; wait for next scanline
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sta COLUBK ; set the background color
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sta GRP0 ; set sprite 0 pixels
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adc #1 ; increment A to cycle through colors and bitmaps
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dex
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bne lvscan
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; Clear the background color and sprites before overscan
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stx COLUBK
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stx GRP0
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; 30 lines of overscan
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ldx #30
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lvover sta WSYNC
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dex
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bne lvover
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; Cycle the sprite colors for the next frame
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inc counter
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lda counter
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sta COLUP0
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jmp nextframe
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org $fffc
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.word start
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.word start
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