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LX9 support: work in progress

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Change-Id: I76249db20f992f92c5fc0454f698c40e578b5e54
This commit is contained in:
David Banks
2017-07-25 17:34:19 +01:00
parent c8f3d1f7f3
commit 0da1fa06bb
13 changed files with 1833 additions and 42 deletions
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src/LX9Jason/AtomBusMon.bmm
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ADDRESS_MAP avrmap PPC405 0
ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x00003fff]
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[0].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[1].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[2].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[3].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[4].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[5].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[6].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[7].Ram [15:0];
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
src/LX9Jason/AtomCpuMon.bmm
+38
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@@ -0,0 +1,38 @@
ADDRESS_MAP avrmap PPC405 0
ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x00003fff]
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[0].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[1].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[2].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[3].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[4].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[5].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[6].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[7].Ram [15:0];
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
src/LX9Jason/AtomFast6502.bmm
+38
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@@ -0,0 +1,38 @@
ADDRESS_MAP avrmap PPC405 0
ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x00003fff]
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[0].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[1].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[2].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[3].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[4].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[5].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[6].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/RAM_Inst[7].Ram [15:0];
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
src/LX9Jason/MC6809ECpuMon.bmm
+42
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@@ -0,0 +1,42 @@
ADDRESS_MAP avrmap PPC405 0
ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x000047ff]
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[0].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[1].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[2].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[3].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[4].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[5].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[6].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[7].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[8].Ram [15:0];
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
src/LX9Jason/XPM_Generic.bmm
+17
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ADDRESS_MAP avrmap PPC405 0
ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x00003fff]
BUS_BLOCK
core/mon/Inst_AVR8/PM_Inst/Mram_RAM8 [15:14];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM7 [13:12];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM6 [11:10];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM5 [ 9: 8];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM4 [ 7: 6];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM3 [ 5: 4];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM2 [ 3: 2];
core/mon/Inst_AVR8/PM_Inst/Mram_RAM1 [ 1: 0];
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
src/LX9Jason/Z80CpuMon.bmm
+42
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@@ -0,0 +1,42 @@
ADDRESS_MAP avrmap PPC405 0
ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x000047ff]
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[0].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[1].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[2].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[3].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[4].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[5].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[6].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[7].Ram [15:0];
END_BUS_BLOCK;
BUS_BLOCK
mon/Inst_AVR8/PM_Inst/RAM_Inst[8].Ram [15:0];
END_BUS_BLOCK;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;
src/Z80CpuMonLX9Jason.ucf
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NET "CLK_n" CLOCK_DEDICATED_ROUTE = FALSE;
NET "clock49" LOC="P50" | IOSTANDARD = LVCMOS33 | PERIOD = 20.00ns ; # 49.152 MHz Oscillator
#NET "Addr<11>" LOC="P16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 1
#NET "Addr<12>" LOC="P95" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 2
#NET "Addr<13>" LOC="P18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 3
#NET "Addr<14>" LOC="P17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 4
#NET "Addr<15>" LOC="P94" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 5
#NET "CLK_n" LOC="P22" | IOSTANDARD = LVCMOS33 | PERIOD = 250.0 ; # Z80 pin 6
#NET "Data<4>" LOC="P23" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 7
#NET "Data<3>" LOC="P33" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 8
#NET "Data<5>" LOC="P32" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 9
#NET "Data<6>" LOC="P34" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 10
##NET "VCC" LOC="P40" | IOSTANDARD = LVCMOS33 ; # Z80 pin 11
#NET "Data<2>" LOC="P41" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 12
#NET "Data<7>" LOC="P36" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 13
#NET "Data<0>" LOC="P35" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 14
#NET "Data<1>" LOC="P53" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 15
#NET "INT_n" LOC="P54" | IOSTANDARD = LVCMOS33 ; # Z80 pin 16
#NET "NMI_n" LOC="P57" | IOSTANDARD = LVCMOS33 ; # Z80 pin 17
#NET "HALT_n" LOC="P58" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 18
#NET "MREQ_n" LOC="P60" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 19
#NET "IORQ_n" LOC="P61" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 20
#NET "RD_n" LOC="P67" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 21
#NET "WR_n" LOC="P68" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 22
#NET "BUSAK_n" LOC="P70" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 23
#NET "WAIT_n" LOC="P71" | IOSTANDARD = LVCMOS33 ; # Z80 pin 24
#NET "BUSRQ_n" LOC="P86" | IOSTANDARD = LVCMOS33 ; # Z80 pin 25
#NET "RESET_n" LOC="P84" | IOSTANDARD = LVCMOS33 ; # Z80 pin 26
#NET "M1_n" LOC="P83" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 27
#NET "RFSH_n" LOC="P78" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 28
##NET "GND" LOC="P79" | IOSTANDARD = LVCMOS33 ; # Z80 pin 29
#NET "Addr<0>" LOC="P85" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 30
#NET "Addr<1>" LOC="P92" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 31
#NET "Addr<2>" LOC="P98" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 32
#NET "Addr<3>" LOC="P3" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 33
#NET "Addr<4>" LOC="P2" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 34
#NET "Addr<5>" LOC="P4" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 35
#NET "Addr<6>" LOC="P5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 36
#NET "Addr<7>" LOC="P90" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 37
#NET "Addr<8>" LOC="P9" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 38
#NET "Addr<9>" LOC="P10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 39
#NET "Addr<10>" LOC="P11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ; # Z80 pin 40
NET "led3" LOC="P134" | IOSTANDARD = LVCMOS33 ; # Red LED (near SW1)
NET "led6" LOC="P119" | IOSTANDARD = LVCMOS33 ; # Red LED (just left of FPGA)
NET "led8" LOC="P117" | IOSTANDARD = LVCMOS33 ; # Green LED (near SW1)
NET "sw1" LOC="P132" | IOSTANDARD = LVCMOS33 ; # Bottom Switch
NET "nsw2" LOC="P131" | IOSTANDARD = LVCMOS33 | PULLUP ; # Top Switch
## I/O's for test connector
##NET tvs1 LOC=P48 | IOSTANDARD = LVCMOS33 | DRIVE=16 ;
##NET tvs0 LOC=P49 | IOSTANDARD = LVCMOS33 | DRIVE=16 ;
#NET tmosi LOC=P27 | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
#NET tdin LOC=P44 | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
#NET tcclk LOC=P50 | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
##NET tm1 LOC=P42 | IOSTANDARD = LVCMOS33 | DRIVE=16 ;
##NET thsw LOC=P99 | IOSTANDARD = LVCMOS33 | DRIVE=16 ;
NET "avr_TxD" LOC="P46" | IOSTANDARD = LVCMOS33 ;
NET "avr_RxD" LOC="P47" | IOSTANDARD = LVCMOS33 ;
#NET "trig<0>" LOC="P62" | IOSTANDARD = LVCMOS33 ;
#NET "trig<1>" LOC="P63" | IOSTANDARD = LVCMOS33 ;
#NET "test1" LOC="P65" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
#NET "test2" LOC="P66" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
#NET "test3" LOC="P12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
#NET "test4" LOC="P91" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
# NET "" LOC="P48" | IOSTANDARD = LVCMOS33 ; # connector pin E2
# NET "" LOC="P49" | IOSTANDARD = LVCMOS33 ; # connector pin E3
# NET "" LOC="P27" | IOSTANDARD = LVCMOS33 ; # connector pin E4
# NET "" LOC="P44" | IOSTANDARD = LVCMOS33 ; # connector pin E5
# NET "" LOC="P50" | IOSTANDARD = LVCMOS33 ; # connector pin E6
# NET "" LOC="P42" | IOSTANDARD = LVCMOS33 ; # connector pin E7
# NET "" LOC="P99" | IOSTANDARD = LVCMOS33 ; # connector pin E8