From 2a79bc6819881b5caf8084f89cf76b56f36627b0 Mon Sep 17 00:00:00 2001 From: David Banks Date: Tue, 1 Oct 2019 15:21:28 +0100 Subject: [PATCH] 6809: Added special command to inhibit IRQ/FIRQ/NMI Change-Id: I9b94fec5f464ecdb6bb0a4cd2a430401a182c929 --- firmware/AtomBusMon.c | 8 ++++---- src/MC6809ECpuMon.vhd | 16 +++++++++++++--- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/firmware/AtomBusMon.c b/firmware/AtomBusMon.c index 7e3e175..b939f38 100644 --- a/firmware/AtomBusMon.c +++ b/firmware/AtomBusMon.c @@ -10,7 +10,7 @@ * VERSION and NAME are used in the start-up message ********************************************************/ -#define VERSION "0.75" +#define VERSION "0.76" #if (CPU == Z80) #define NAME "ICE-T80" @@ -51,7 +51,7 @@ char *cmdStrings[] = { #endif "test", "srec", -#if (CPU == 6502) +#if (CPU != Z80) "special", #endif #endif @@ -94,7 +94,7 @@ void (*cmdFuncs[])(char *params) = { #endif doCmdTest, doCmdSRec, -#if (CPU == 6502) +#if (CPU != Z80) doCmdSpecial, #endif #endif @@ -1160,7 +1160,7 @@ void doCmdSRec(char *params) { } -#if (CPU == 6502) +#if (CPU != Z80) void logSpecial(char *function, int value) { log0("%s", function); if (value) { diff --git a/src/MC6809ECpuMon.vhd b/src/MC6809ECpuMon.vhd index d0a6c90..37ffbc4 100644 --- a/src/MC6809ECpuMon.vhd +++ b/src/MC6809ECpuMon.vhd @@ -132,6 +132,7 @@ architecture behavioral of MC6809ECpuMon is signal SS_Single : std_logic; signal SS_Step : std_logic; signal CountCycle : std_logic; + signal special : std_logic_vector(1 downto 0); signal clk_count : std_logic_vector(1 downto 0); signal quadrature : std_logic_vector(1 downto 0); @@ -166,6 +167,10 @@ architecture behavioral of MC6809ECpuMon is signal sw_interrupt_n : std_logic; -- switch to pause the CPU signal sw_reset_n : std_logic; -- switch to reset the CPU + signal NMI_n_masked : std_logic; + signal IRQ_n_masked : std_logic; + signal FIRQ_n_masked : std_logic; + begin -- Generics allows polarity of switches/LEDs to be tweaked from the project file @@ -232,10 +237,15 @@ begin DataOut => memory_dout, DataIn => memory_din, Done => memory_done, + Special => special, SS_Step => SS_Step, SS_Single => SS_Single ); + NMI_n_masked <= NMI_n or special(1); + FIRQ_n_masked <= FIRQ_n or special(1); + IRQ_n_masked <= IRQ_n or special(0); + -- The CPU is slightly pipelined and the register update of the last -- instruction overlaps with the opcode fetch of the next instruction. -- @@ -290,9 +300,9 @@ begin irq_gen : process(cpu_clk) begin if falling_edge(cpu_clk) then - NMI_sync <= not NMI_n; - IRQ_sync <= not IRQ_n; - FIRQ_sync <= not FIRQ_n; + NMI_sync <= not NMI_n_masked; + IRQ_sync <= not IRQ_n_masked; + FIRQ_sync <= not FIRQ_n_masked; nRST_sync <= RES_n and nRSTout; HALT_sync <= not HALT_n; end if;