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6809: fix a bug with write watchpoints seeing data as 0xFF

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Change-Id: Id5ca15ad95a5f5bbee242368ca8bb9b2c0cf7364
This commit is contained in:
David Banks 2020-06-09 18:55:06 +01:00
parent 85f52ef918
commit 2de5c382a7
1 changed files with 9 additions and 1 deletions
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10
src/MC6809CpuMon.vhd
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@ -101,6 +101,7 @@ architecture behavioral of MC6809CpuMon is
signal Addr_int : std_logic_vector(15 downto 0); signal Addr_int : std_logic_vector(15 downto 0);
signal Din : std_logic_vector(7 downto 0); signal Din : std_logic_vector(7 downto 0);
signal Dout : std_logic_vector(7 downto 0); signal Dout : std_logic_vector(7 downto 0);
signal Dbusmon : std_logic_vector(7 downto 0);
signal Sync_int : std_logic; signal Sync_int : std_logic;
signal hold : std_logic; signal hold : std_logic;
@ -176,7 +177,7 @@ begin
cpu_clk => cpu_clk, cpu_clk => cpu_clk,
cpu_clken => '1', cpu_clken => '1',
Addr => Addr_int, Addr => Addr_int,
Data => Data, Data => Dbusmon,
Rd_n => not R_W_n_int, Rd_n => not R_W_n_int,
Wr_n => R_W_n_int, Wr_n => R_W_n_int,
RdIO_n => '1', RdIO_n => '1',
@ -339,6 +340,13 @@ begin
Dout when TSC = '0' and data_wr = '1' and R_W_n_int = '0' and memory_rd1 = '0' else Dout when TSC = '0' and data_wr = '1' and R_W_n_int = '0' and memory_rd1 = '0' else
(others => 'Z'); (others => 'Z');
-- Version of data seen by the Bus Mon need to use Din rather than the
-- external bus value as by the rising edge of cpu_clk we will have stopped driving
-- the external bus. On the ALS version we get away way this, but on the GODIL
-- version, due to the pullups, we don't. So all write watch breakpoints see
-- the data bus as 0xFF.
Dbusmon <= Din when R_W_n_int = '1' else Dout;
memory_done <= memory_rd1 or memory_wr1; memory_done <= memory_rd1 or memory_wr1;
-- Delayed/Deglitched version of the E clock -- Delayed/Deglitched version of the E clock