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z80: added a resume state
This allows time for the paused instruction to be re-read Without this, the Acorn Z80 Co Pro always seemed to be single stepping NOP instructions. Change-Id: I0bcb424293071efc0370b862854455a33f42faf2
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@ -84,7 +84,7 @@ end Z80CpuMon;
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architecture behavioral of Z80CpuMon is
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type state_type is (idle, nop_t1, nop_t2, nop_t3, nop_t4, rd_t1, rd_wa, rd_t2, rd_t3, wr_t1, wr_wa, wr_t2, wr_t3);
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type state_type is (idle, resume, nop_t1, nop_t2, nop_t3, nop_t4, rd_t1, rd_wa, rd_t2, rd_t3, wr_t1, wr_wa, wr_t2, wr_t3);
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signal state : state_type;
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@ -386,14 +386,14 @@ begin
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-- TODO: Also need to take account of BUSRQ_n/BUSAK_n
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MREQ_n <= MREQ_n_int when state = idle else mon_mreq_n;
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IORQ_n <= IORQ_n_int when state = idle else mon_iorq_n;
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RFSH_n <= RFSH_n_int when state = idle else mon_rfsh_n;
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WR_n <= WR_n_int when state = idle else mon_wr_n;
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RD_n <= RD_n_int when state = idle else mon_rd_n;
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M1_n <= M1_n_int when state = idle else '1';
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MREQ_n <= MREQ_n_int when state = idle or state = resume else mon_mreq_n;
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IORQ_n <= IORQ_n_int when state = idle or state = resume else mon_iorq_n;
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RFSH_n <= RFSH_n_int when state = idle or state = resume else mon_rfsh_n;
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WR_n <= WR_n_int when state = idle or state = resume else mon_wr_n;
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RD_n <= RD_n_int when state = idle or state = resume else mon_rd_n;
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M1_n <= M1_n_int when state = idle or state = resume else '1';
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Addr <= Addr_int when state = idle else
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Addr <= Addr_int when state = idle or state = resume else
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x"0000" when state = nop_t1 or state = nop_t2 else
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rfsh_addr when state = nop_t3 or state = nop_t4 else
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memory_addr;
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@ -482,11 +482,15 @@ begin
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state <= rd_t1;
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io_not_mem <= io_rd1;
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elsif SS_Step_held = '1' or SS_Single = '0' then
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state <= idle;
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state <= resume;
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else
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state <= nop_t1;
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end if;
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-- Resume,
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when resume =>
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state <= idle;
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-- Read cycle
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when rd_t1 =>
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if io_not_mem = '1' then
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