diff --git a/target/lx9_dave/icez80/board.ucf b/target/lx9_dave/icez80/board.ucf
index 2046bc9..361d9eb 100644
--- a/target/lx9_dave/icez80/board.ucf
+++ b/target/lx9_dave/icez80/board.ucf
@@ -6,47 +6,47 @@ NET "CLK_n" CLOCK_DEDICATED_ROUTE = FALSE;
 
 NET "clock"    LOC="P50"  | IOSTANDARD = LVCMOS33 | PERIOD = 20.00ns        ; # 50.00 MHz Oscillator
 
-NET "Addr<11>" LOC="P43"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 1
-NET "Addr<12>" LOC="P35"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 2
-NET "Addr<13>" LOC="P33"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 3
-NET "Addr<14>" LOC="P30"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 4
-NET "Addr<15>" LOC="P27"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 5
-NET "CLK_n"    LOC="P116" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 6
-NET "Data<4>"  LOC="P24"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 7
-NET "Data<3>"  LOC="P23"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 8
-NET "Data<5>"  LOC="P22"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 9
-NET "Data<6>"  LOC="P21"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 10
-#NET "VCC"     LOC="P"    | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 11
-NET "Data<2>"  LOC="P17"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 12
-NET "Data<7>"  LOC="P16"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 13
-NET "Data<0>"  LOC="P15"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 14
-NET "Data<1>"  LOC="P14"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 15
-NET "INT_n"    LOC="P124" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 16
-NET "NMI_n"    LOC="P123" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 17
-NET "HALT_n"   LOC="P102" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 18
-NET "MREQ_n"   LOC="P1"   | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 19
-NET "IORQ_n"   LOC="P143" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 20
+NET "Addr<11>" LOC="P43"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 1
+NET "Addr<12>" LOC="P35"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 2
+NET "Addr<13>" LOC="P33"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 3
+NET "Addr<14>" LOC="P30"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 4
+NET "Addr<15>" LOC="P27"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 5
+NET "CLK_n"    LOC="P116" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 6
+NET "Data<4>"  LOC="P24"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 7
+NET "Data<3>"  LOC="P23"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 8
+NET "Data<5>"  LOC="P22"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 9
+NET "Data<6>"  LOC="P21"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 10
+#NET "VCC"     LOC="P"    | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 11
+NET "Data<2>"  LOC="P17"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 12
+NET "Data<7>"  LOC="P16"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 13
+NET "Data<0>"  LOC="P15"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 14
+NET "Data<1>"  LOC="P14"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 15
+NET "INT_n"    LOC="P124" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 16
+NET "NMI_n"    LOC="P123" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 17
+NET "HALT_n"   LOC="P102" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 18
+NET "MREQ_n"   LOC="P1"   | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 19
+NET "IORQ_n"   LOC="P143" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 20
 
-NET "RD_n"     LOC="P2"   | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 21
-NET "WR_n"     LOC="P5"   | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 22
-NET "BUSAK_n"  LOC="P101" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 23
-NET "WAIT_n"   LOC="P121" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 24
-NET "BUSRQ_n"  LOC="P114" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 25
-NET "RESET_n"  LOC="P115" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 26
-NET "M1_n"     LOC="P99"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 27
-NET "RFSH_n"   LOC="P100" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 28
-#NET "GND"     LOC="P"    | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 29
-NET "Addr<0>"  LOC="P78"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 30
-NET "Addr<1>"  LOC="P80"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 31
-NET "Addr<2>"  LOC="P32"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 32
-NET "Addr<3>"  LOC="P34"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 33
-NET "Addr<4>"  LOC="P40"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 34
-NET "Addr<5>"  LOC="P93"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 35
-NET "Addr<6>"  LOC="P82"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 36
-NET "Addr<7>"  LOC="P83"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 37
-NET "Addr<8>"  LOC="P81"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 38
-NET "Addr<9>"  LOC="P79"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 39
-NET "Addr<10>" LOC="P74"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # dip pin 40
+NET "RD_n"     LOC="P2"   | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 21
+NET "WR_n"     LOC="P5"   | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 22
+NET "BUSAK_n"  LOC="P101" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 23
+NET "WAIT_n"   LOC="P121" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 24
+NET "BUSRQ_n"  LOC="P114" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 25
+NET "RESET_n"  LOC="P115" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 26
+NET "M1_n"     LOC="P99"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 27
+NET "RFSH_n"   LOC="P100" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 28
+#NET "GND"     LOC="P"    | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8          ; # dip pin 29
+NET "Addr<0>"  LOC="P78"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 30
+NET "Addr<1>"  LOC="P80"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 31
+NET "Addr<2>"  LOC="P32"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 32
+NET "Addr<3>"  LOC="P34"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 33
+NET "Addr<4>"  LOC="P40"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 34
+NET "Addr<5>"  LOC="P93"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 35
+NET "Addr<6>"  LOC="P82"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 36
+NET "Addr<7>"  LOC="P83"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 37
+NET "Addr<8>"  LOC="P81"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 38
+NET "Addr<9>"  LOC="P79"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 39
+NET "Addr<10>" LOC="P74"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 | PULLUP ; # dip pin 40
 
 # Output Enables
 NET "OEC_n"    LOC="P142" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;