Redesigned interface between AVR and Bus Monitor to be command based

Change-Id: Ic14901856ad7d1ae0d053e6dd3c53047cd85b59a
This commit is contained in:
David Banks 2015-06-10 15:49:14 +01:00
parent 0ae10de5e5
commit d5854047d1
2 changed files with 165 additions and 90 deletions

View File

@ -9,14 +9,43 @@
#define CTRL_DDR DDRB
#define CTRL_DIN PINB
// Outputs
#define STEP_MASK 0x01
#define SINGLE_MASK 0x02
#define RESET_MASK 0x04
#define BRKPT_ENABLE_MASK 0x08
#define BRKPT_CLOCK_MASK 0x10
#define BRKPT_DATA_MASK 0x20
// Inputs
#define STATUS_PORT PORTD
#define STATUS_DDR DDRD
#define STATUS_DIN PIND
#define MUX_PORT PORTE
#define MUX_DDR DDRE
#define MUX_DIN PINE
#define OFFSET_IAL 0
#define OFFSET_IAH 1
#define OFFSET_BAL 2
#define OFFSET_BAH 3
#define OFFSET_WAL 4
#define OFFSET_WAH 5
#define OFFSET_BAM 7
#define OFFSET_WAM 8
// Commands
// 000x Enable/Disable single strpping
// 001x Enable/Disable breakpoints / watches
// 010x Load register
// 011x Reset
// 1000 Singe Step
#define CMD_SINGLE_ENABLE 0x00
#define CMD_BRKPT_ENABLE 0x02
#define CMD_LOAD_REG 0x04
#define CMD_RESET 0x06
#define CMD_STEP 0x08
// Control bits
#define CMD_MASK 0x1F
#define CMD_EDGE 0x10
#define MUX_SEL_MASK 0xE0
#define MUX_SEL_BIT 5
// Status bits
#define BRKPT_INTERRUPTED_MASK 0x40
#define BRKPT_ACTIVE_MASK 0x80
@ -36,19 +65,6 @@ char *brkptStrings[8] = {
"Instruction, read, write breakpoints"
};
#define CTRL_MASK (SINGLE_MASK | STEP_MASK | RESET_MASK | BRKPT_ENABLE_MASK | BRKPT_CLOCK_MASK | BRKPT_DATA_MASK)
#define AL_PORT PORTD
#define AL_DIN PIND
#define AL_MASK 0x00
#define AL_DDR DDRD
#define AH_PORT PORTE
#define AH_DIN PINE
#define AH_MASK 0x00
#define AH_DDR DDRE
#define VERSION "0.11"
#define NUMCMDS 14
@ -140,14 +156,36 @@ void readCmd(char *cmd) {
}
}
void hwCmd(unsigned int cmd, unsigned int param) {
cmd |= param;
CTRL_PORT &= ~CMD_MASK;
CTRL_PORT |= cmd;
Delay_us(2);
CTRL_PORT |= CMD_EDGE;
Delay_us(2);
}
unsigned int hwRead8(unsigned int offset) {
CTRL_PORT &= ~MUX_SEL_MASK;
CTRL_PORT |= offset << MUX_SEL_BIT;
Delay_us(1);
return MUX_DIN;
}
unsigned int hwRead16(unsigned int offset) {
unsigned int lsb;
CTRL_PORT &= ~MUX_SEL_MASK;
CTRL_PORT |= offset << MUX_SEL_BIT;
Delay_us(1);
lsb = MUX_DIN;
CTRL_PORT |= 1 << MUX_SEL_BIT;
Delay_us(1);
return (MUX_DIN << 8) | lsb;
}
void setSingle(int i) {
single = i;
if (single) {
CTRL_PORT |= SINGLE_MASK;
} else {
CTRL_PORT &= ~SINGLE_MASK;
}
Delay_us(10);
hwCmd(CMD_SINGLE_ENABLE, single ? 1 : 0);
}
void setTrace(long i) {
@ -165,6 +203,7 @@ void version() {
}
/*******************************************
* Commands
*******************************************/
@ -181,7 +220,8 @@ void doCmdHelp(char *params) {
void doCmdAddr() {
int i, nibble;
unsigned int addr = AH_DIN << 8 | AL_DIN;
unsigned int addr = hwRead16(OFFSET_IAL);
// Update the serial port
log0("%04X\n", addr);
// Update the LCD display
@ -218,10 +258,7 @@ void doCmdStep(char *params) {
j = trace;
for (i = 1; i <= instructions; i++) {
// Step the 6502
CTRL_PORT &= ~STEP_MASK;
Delay_us(2);
CTRL_PORT |= STEP_MASK;
Delay_us(2);
hwCmd(CMD_STEP, 0);
if (i == instructions || (trace && (--j == 0))) {
Delay_us(10);
doCmdAddr();
@ -232,9 +269,9 @@ void doCmdStep(char *params) {
void doCmdReset(char *params) {
log0("Resetting 6502\n");
CTRL_PORT |= RESET_MASK;
hwCmd(CMD_RESET, 1);
Delay_us(100);
CTRL_PORT &= ~RESET_MASK;
hwCmd(CMD_RESET, 0);
}
void doCmdInterrupt(char *params) {
@ -360,15 +397,7 @@ void shiftBreakpointRegister(unsigned int addr, unsigned int mode) {
reg <<= 16;
reg |= addr;
for (i = 0; i < 20; i++) {
CTRL_PORT &= ~BRKPT_CLOCK_MASK;
if (reg & 1) {
CTRL_PORT |= BRKPT_DATA_MASK;
} else {
CTRL_PORT &= ~BRKPT_DATA_MASK;
}
Delay_us(10);
CTRL_PORT |= BRKPT_CLOCK_MASK;
Delay_us(10);
hwCmd(CMD_LOAD_REG, reg & 1);
reg >>= 1;
}
}
@ -379,7 +408,7 @@ void doCmdContinue(char *params) {
doCmdBList(NULL);
// Disable breakpoints to allow loading
CTRL_PORT &= ~BRKPT_ENABLE_MASK;
hwCmd(CMD_BRKPT_ENABLE, 0);
// Load breakpoints into comparators
for (i = 0; i < numbkpts; i++) {
@ -389,8 +418,8 @@ void doCmdContinue(char *params) {
shiftBreakpointRegister(0, 0);
}
// Enable breakpoints
CTRL_PORT |= BRKPT_ENABLE_MASK;
// Enable breakpoints
hwCmd(CMD_BRKPT_ENABLE, 1);
// Disable single stepping
setSingle(0);
@ -398,7 +427,7 @@ void doCmdContinue(char *params) {
// Wait for breakpoint to become active
log0("6502 free running...\n");
do {
status = CTRL_DIN;
status = STATUS_DIN;
} while (!(status & BRKPT_ACTIVE_MASK) && !(status && BRKPT_INTERRUPTED_MASK));
// Output cause
@ -413,19 +442,20 @@ void doCmdContinue(char *params) {
setSingle(1);
// Disable breakpoints
CTRL_PORT &= ~BRKPT_ENABLE_MASK;
hwCmd(CMD_BRKPT_ENABLE, 0);
}
void initialize() {
CTRL_DDR = CTRL_MASK;
AL_DDR = AL_MASK;
AH_DDR = AH_MASK;
CTRL_PORT &= 0;
CTRL_DDR = 255;
STATUS_DDR = 0;
MUX_DDR = 0;
CTRL_PORT = 0;
Serial_Init(57600,57600);
lcd_init();
lcd_puts("Addr: xxxx");
version();
hwCmd(CMD_RESET, 0);
setSingle(1);
setTrace(1);
log0("6502 paused...\n");

View File

@ -69,20 +69,26 @@ architecture behavioral of AtomBusMon is
signal dy_counter : std_logic_vector(31 downto 0);
signal dy_data : y2d_type ;
signal mux : std_logic_vector(7 downto 0);
signal muxsel : std_logic_vector(2 downto 0);
signal cmd_edge : std_logic;
signal cmd_edge1 : std_logic;
signal cmd_edge2 : std_logic;
signal cmd : std_logic_vector(3 downto 0);
signal addr_sync : std_logic_vector(15 downto 0);
signal addr_inst : std_logic_vector(15 downto 0);
signal addr_break : std_logic_vector(15 downto 0);
signal mode_break : std_logic_vector(7 downto 0);
signal addr_watch : std_logic_vector(15 downto 0);
signal mode_watch : std_logic_vector(7 downto 0);
signal single : std_logic;
signal reset : std_logic;
signal step : std_logic;
signal step1 : std_logic;
signal step2 : std_logic;
signal brkpt_enable : std_logic;
signal brkpt_clock : std_logic;
signal brkpt_clock1 : std_logic;
signal brkpt_clock2 : std_logic;
signal brkpt_data : std_logic;
signal brkpt_active : std_logic;
signal brkpt_active1 : std_logic;
@ -135,28 +141,37 @@ begin
portaout(6) => lcd_db_out(6),
portaout(7) => lcd_db_out(7),
-- Command Port
portbin(0) => '0',
portbin(1) => '0',
portbin(2) => '0',
portbin(3) => '0',
portbin(4) => '0',
portbin(5) => '0',
portbin(6) => sw1,
portbin(7) => brkpt_active1,
portbout(0) => step,
portbout(1) => single,
portbout(2) => reset,
portbout(3) => brkpt_enable,
portbout(4) => brkpt_clock,
portbout(5) => brkpt_data,
portbout(6) => open,
portbout(7) => open,
portbin(6) => '0',
portbin(7) => '0',
portbout(0) => cmd(0),
portbout(1) => cmd(1),
portbout(2) => cmd(2),
portbout(3) => cmd(3),
portbout(4) => cmd_edge,
portbout(5) => muxsel(0),
portbout(6) => muxsel(1),
portbout(7) => muxsel(2),
portdin => addr_inst(7 downto 0),
-- Status Port
portdin(0) => '0',
portdin(1) => '0',
portdin(2) => '0',
portdin(3) => '0',
portdin(4) => '0',
portdin(5) => '0',
portdin(6) => sw1,
portdin(7) => brkpt_active1,
portdout => open,
portein => addr_inst(15 downto 8),
-- Mux Port
portein => mux,
porteout => open,
spi_mosio => open,
@ -171,8 +186,8 @@ begin
lcd_db <= lcd_db_out when lcd_rw_int = '0' else (others => 'Z');
lcd_db_in <= lcd_db;
led3 <= '0'; -- red
led6 <= '0'; -- red
led3 <= nRST; -- red
led6 <= not single; -- red
led8 <= not brkpt_active; -- green
nrst_avr <= nsw2;
@ -181,9 +196,18 @@ begin
dy_data(0) <= hex & "0000" & Addr(3 downto 0);
dy_data(1) <= hex & "0000" & Addr(7 downto 4);
dy_data(2) <= hex & "0000" & "00" & (not nsw2) & sw1;
brkpr_active: process (brkpt_reg, brkpt_enable, Addr, Sync)
mux <= addr_inst(7 downto 0) when muxsel = 0 else
addr_inst(15 downto 8) when muxsel = 1 else
addr_break(7 downto 0) when muxsel = 2 else
addr_break(15 downto 8) when muxsel = 3 else
addr_watch(7 downto 0) when muxsel = 4 else
addr_watch(15 downto 8) when muxsel = 5 else
mode_break when muxsel = 6 else
mode_watch when muxsel = 7 else
"10101010";
brkpt_active_process: process (brkpt_reg, brkpt_enable, Addr, Sync)
variable tmp : std_logic;
variable i : integer;
variable brkpt_addr : std_logic_vector(15 downto 0);
@ -224,28 +248,49 @@ begin
syncProcess: process (Phi2)
begin
if rising_edge(Phi2) then
-- Command processing
cmd_edge1 <= cmd_edge;
cmd_edge2 <= cmd_edge1;
if (cmd_edge2 = '0' and cmd_edge1 = '1') then
-- 000x Enable/Disable single strpping
-- 001x Enable/Disable breakpoints / watches
-- 010x Load register
-- 011x Reset
-- 1000 Singe Step
if (cmd(3 downto 1) = "000") then
single <= cmd(0);
end if;
if (cmd(3 downto 1) = "001") then
brkpt_enable <= cmd(0);
end if;
if (cmd(3 downto 1) = "010") then
brkpt_reg <= cmd(0) & brkpt_reg(brkpt_reg'length - 1 downto 1);
end if;
if (cmd(3 downto 1) = "011") then
reset <= cmd(0);
end if;
end if;
if (reset = '1') then
nRST <= '0';
else
nRST <= 'Z';
end if;
-- Address monitoring
addr_sync <= Addr;
if (Sync = '1') then
addr_inst <= Addr;
end if;
-- Reset
if (reset = '1') then
nRST <= '0';
else
nRST <= 'Z';
end if;
-- Breakpoints
brkpt_clock1 <= brkpt_clock;
brkpt_clock2 <= brkpt_clock1;
if (brkpt_enable = '0' and brkpt_clock2 = '0' and brkpt_clock1 = '1') then
brkpt_reg <= brkpt_data & brkpt_reg(brkpt_reg'length - 1 downto 1);
end if;
brkpt_active1 <= brkpt_active;
-- Single Stepping
step1 <= step;
step2 <= step1;
if ((single = '0') or (step2 = '0' and step1 = '1')) then
if ((single = '0') or (cmd_edge2 = '0' and cmd_edge1 = '1' and cmd = "1000")) then
Rdy <= (not brkpt_active);
else
Rdy <= (not Sync);