mirror of
https://github.com/hoglet67/AtomBusMon.git
synced 2025-01-02 23:32:02 +00:00
Redesigned interface between AVR and Bus Monitor to be command based
Change-Id: Ic14901856ad7d1ae0d053e6dd3c53047cd85b59a
This commit is contained in:
parent
0ae10de5e5
commit
d5854047d1
@ -9,14 +9,43 @@
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#define CTRL_DDR DDRB
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#define CTRL_DIN PINB
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// Outputs
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#define STEP_MASK 0x01
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#define SINGLE_MASK 0x02
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#define RESET_MASK 0x04
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#define BRKPT_ENABLE_MASK 0x08
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#define BRKPT_CLOCK_MASK 0x10
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#define BRKPT_DATA_MASK 0x20
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// Inputs
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#define STATUS_PORT PORTD
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#define STATUS_DDR DDRD
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#define STATUS_DIN PIND
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#define MUX_PORT PORTE
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#define MUX_DDR DDRE
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#define MUX_DIN PINE
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#define OFFSET_IAL 0
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#define OFFSET_IAH 1
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#define OFFSET_BAL 2
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#define OFFSET_BAH 3
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#define OFFSET_WAL 4
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#define OFFSET_WAH 5
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#define OFFSET_BAM 7
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#define OFFSET_WAM 8
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// Commands
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// 000x Enable/Disable single strpping
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// 001x Enable/Disable breakpoints / watches
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// 010x Load register
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// 011x Reset
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// 1000 Singe Step
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#define CMD_SINGLE_ENABLE 0x00
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#define CMD_BRKPT_ENABLE 0x02
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#define CMD_LOAD_REG 0x04
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#define CMD_RESET 0x06
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#define CMD_STEP 0x08
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// Control bits
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#define CMD_MASK 0x1F
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#define CMD_EDGE 0x10
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#define MUX_SEL_MASK 0xE0
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#define MUX_SEL_BIT 5
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// Status bits
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#define BRKPT_INTERRUPTED_MASK 0x40
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#define BRKPT_ACTIVE_MASK 0x80
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@ -36,19 +65,6 @@ char *brkptStrings[8] = {
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"Instruction, read, write breakpoints"
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};
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#define CTRL_MASK (SINGLE_MASK | STEP_MASK | RESET_MASK | BRKPT_ENABLE_MASK | BRKPT_CLOCK_MASK | BRKPT_DATA_MASK)
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#define AL_PORT PORTD
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#define AL_DIN PIND
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#define AL_MASK 0x00
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#define AL_DDR DDRD
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#define AH_PORT PORTE
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#define AH_DIN PINE
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#define AH_MASK 0x00
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#define AH_DDR DDRE
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#define VERSION "0.11"
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#define NUMCMDS 14
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@ -140,14 +156,36 @@ void readCmd(char *cmd) {
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}
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}
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void hwCmd(unsigned int cmd, unsigned int param) {
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cmd |= param;
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CTRL_PORT &= ~CMD_MASK;
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CTRL_PORT |= cmd;
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Delay_us(2);
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CTRL_PORT |= CMD_EDGE;
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Delay_us(2);
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}
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unsigned int hwRead8(unsigned int offset) {
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CTRL_PORT &= ~MUX_SEL_MASK;
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CTRL_PORT |= offset << MUX_SEL_BIT;
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Delay_us(1);
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return MUX_DIN;
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}
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unsigned int hwRead16(unsigned int offset) {
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unsigned int lsb;
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CTRL_PORT &= ~MUX_SEL_MASK;
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CTRL_PORT |= offset << MUX_SEL_BIT;
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Delay_us(1);
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lsb = MUX_DIN;
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CTRL_PORT |= 1 << MUX_SEL_BIT;
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Delay_us(1);
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return (MUX_DIN << 8) | lsb;
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}
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void setSingle(int i) {
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single = i;
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if (single) {
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CTRL_PORT |= SINGLE_MASK;
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} else {
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CTRL_PORT &= ~SINGLE_MASK;
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}
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Delay_us(10);
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hwCmd(CMD_SINGLE_ENABLE, single ? 1 : 0);
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}
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void setTrace(long i) {
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@ -165,6 +203,7 @@ void version() {
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}
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/*******************************************
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* Commands
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*******************************************/
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@ -181,7 +220,8 @@ void doCmdHelp(char *params) {
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void doCmdAddr() {
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int i, nibble;
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unsigned int addr = AH_DIN << 8 | AL_DIN;
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unsigned int addr = hwRead16(OFFSET_IAL);
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// Update the serial port
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log0("%04X\n", addr);
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// Update the LCD display
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@ -218,10 +258,7 @@ void doCmdStep(char *params) {
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j = trace;
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for (i = 1; i <= instructions; i++) {
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// Step the 6502
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CTRL_PORT &= ~STEP_MASK;
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Delay_us(2);
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CTRL_PORT |= STEP_MASK;
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Delay_us(2);
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hwCmd(CMD_STEP, 0);
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if (i == instructions || (trace && (--j == 0))) {
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Delay_us(10);
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doCmdAddr();
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@ -232,9 +269,9 @@ void doCmdStep(char *params) {
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void doCmdReset(char *params) {
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log0("Resetting 6502\n");
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CTRL_PORT |= RESET_MASK;
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hwCmd(CMD_RESET, 1);
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Delay_us(100);
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CTRL_PORT &= ~RESET_MASK;
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hwCmd(CMD_RESET, 0);
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}
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void doCmdInterrupt(char *params) {
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@ -360,15 +397,7 @@ void shiftBreakpointRegister(unsigned int addr, unsigned int mode) {
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reg <<= 16;
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reg |= addr;
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for (i = 0; i < 20; i++) {
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CTRL_PORT &= ~BRKPT_CLOCK_MASK;
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if (reg & 1) {
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CTRL_PORT |= BRKPT_DATA_MASK;
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} else {
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CTRL_PORT &= ~BRKPT_DATA_MASK;
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}
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Delay_us(10);
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CTRL_PORT |= BRKPT_CLOCK_MASK;
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Delay_us(10);
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hwCmd(CMD_LOAD_REG, reg & 1);
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reg >>= 1;
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}
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}
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@ -379,7 +408,7 @@ void doCmdContinue(char *params) {
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doCmdBList(NULL);
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// Disable breakpoints to allow loading
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CTRL_PORT &= ~BRKPT_ENABLE_MASK;
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hwCmd(CMD_BRKPT_ENABLE, 0);
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// Load breakpoints into comparators
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for (i = 0; i < numbkpts; i++) {
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@ -389,8 +418,8 @@ void doCmdContinue(char *params) {
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shiftBreakpointRegister(0, 0);
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}
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// Enable breakpoints
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CTRL_PORT |= BRKPT_ENABLE_MASK;
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// Enable breakpoints
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hwCmd(CMD_BRKPT_ENABLE, 1);
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// Disable single stepping
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setSingle(0);
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@ -398,7 +427,7 @@ void doCmdContinue(char *params) {
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// Wait for breakpoint to become active
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log0("6502 free running...\n");
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do {
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status = CTRL_DIN;
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status = STATUS_DIN;
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} while (!(status & BRKPT_ACTIVE_MASK) && !(status && BRKPT_INTERRUPTED_MASK));
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// Output cause
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@ -413,19 +442,20 @@ void doCmdContinue(char *params) {
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setSingle(1);
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// Disable breakpoints
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CTRL_PORT &= ~BRKPT_ENABLE_MASK;
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hwCmd(CMD_BRKPT_ENABLE, 0);
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}
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void initialize() {
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CTRL_DDR = CTRL_MASK;
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AL_DDR = AL_MASK;
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AH_DDR = AH_MASK;
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CTRL_PORT &= 0;
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CTRL_DDR = 255;
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STATUS_DDR = 0;
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MUX_DDR = 0;
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CTRL_PORT = 0;
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Serial_Init(57600,57600);
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lcd_init();
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lcd_puts("Addr: xxxx");
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version();
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hwCmd(CMD_RESET, 0);
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setSingle(1);
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setTrace(1);
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log0("6502 paused...\n");
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@ -69,20 +69,26 @@ architecture behavioral of AtomBusMon is
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signal dy_counter : std_logic_vector(31 downto 0);
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signal dy_data : y2d_type ;
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signal mux : std_logic_vector(7 downto 0);
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signal muxsel : std_logic_vector(2 downto 0);
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signal cmd_edge : std_logic;
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signal cmd_edge1 : std_logic;
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signal cmd_edge2 : std_logic;
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signal cmd : std_logic_vector(3 downto 0);
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signal addr_sync : std_logic_vector(15 downto 0);
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signal addr_inst : std_logic_vector(15 downto 0);
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signal addr_break : std_logic_vector(15 downto 0);
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signal mode_break : std_logic_vector(7 downto 0);
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signal addr_watch : std_logic_vector(15 downto 0);
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signal mode_watch : std_logic_vector(7 downto 0);
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signal single : std_logic;
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signal reset : std_logic;
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signal step : std_logic;
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signal step1 : std_logic;
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signal step2 : std_logic;
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signal brkpt_enable : std_logic;
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signal brkpt_clock : std_logic;
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signal brkpt_clock1 : std_logic;
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signal brkpt_clock2 : std_logic;
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signal brkpt_data : std_logic;
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signal brkpt_active : std_logic;
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signal brkpt_active1 : std_logic;
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@ -135,28 +141,37 @@ begin
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portaout(6) => lcd_db_out(6),
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portaout(7) => lcd_db_out(7),
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-- Command Port
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portbin(0) => '0',
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portbin(1) => '0',
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portbin(2) => '0',
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portbin(3) => '0',
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portbin(4) => '0',
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portbin(5) => '0',
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portbin(6) => sw1,
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portbin(7) => brkpt_active1,
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portbout(0) => step,
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portbout(1) => single,
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portbout(2) => reset,
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portbout(3) => brkpt_enable,
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portbout(4) => brkpt_clock,
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portbout(5) => brkpt_data,
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portbout(6) => open,
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portbout(7) => open,
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portbin(6) => '0',
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portbin(7) => '0',
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portbout(0) => cmd(0),
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portbout(1) => cmd(1),
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portbout(2) => cmd(2),
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portbout(3) => cmd(3),
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portbout(4) => cmd_edge,
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portbout(5) => muxsel(0),
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portbout(6) => muxsel(1),
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portbout(7) => muxsel(2),
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portdin => addr_inst(7 downto 0),
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-- Status Port
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portdin(0) => '0',
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portdin(1) => '0',
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portdin(2) => '0',
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portdin(3) => '0',
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portdin(4) => '0',
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portdin(5) => '0',
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portdin(6) => sw1,
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portdin(7) => brkpt_active1,
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portdout => open,
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portein => addr_inst(15 downto 8),
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-- Mux Port
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portein => mux,
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porteout => open,
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spi_mosio => open,
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@ -171,8 +186,8 @@ begin
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lcd_db <= lcd_db_out when lcd_rw_int = '0' else (others => 'Z');
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lcd_db_in <= lcd_db;
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led3 <= '0'; -- red
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led6 <= '0'; -- red
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led3 <= nRST; -- red
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led6 <= not single; -- red
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led8 <= not brkpt_active; -- green
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nrst_avr <= nsw2;
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@ -181,9 +196,18 @@ begin
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dy_data(0) <= hex & "0000" & Addr(3 downto 0);
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dy_data(1) <= hex & "0000" & Addr(7 downto 4);
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dy_data(2) <= hex & "0000" & "00" & (not nsw2) & sw1;
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brkpr_active: process (brkpt_reg, brkpt_enable, Addr, Sync)
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mux <= addr_inst(7 downto 0) when muxsel = 0 else
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addr_inst(15 downto 8) when muxsel = 1 else
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addr_break(7 downto 0) when muxsel = 2 else
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addr_break(15 downto 8) when muxsel = 3 else
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addr_watch(7 downto 0) when muxsel = 4 else
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addr_watch(15 downto 8) when muxsel = 5 else
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mode_break when muxsel = 6 else
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mode_watch when muxsel = 7 else
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"10101010";
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brkpt_active_process: process (brkpt_reg, brkpt_enable, Addr, Sync)
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variable tmp : std_logic;
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variable i : integer;
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variable brkpt_addr : std_logic_vector(15 downto 0);
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@ -224,28 +248,49 @@ begin
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syncProcess: process (Phi2)
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begin
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if rising_edge(Phi2) then
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-- Command processing
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cmd_edge1 <= cmd_edge;
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cmd_edge2 <= cmd_edge1;
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if (cmd_edge2 = '0' and cmd_edge1 = '1') then
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-- 000x Enable/Disable single strpping
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-- 001x Enable/Disable breakpoints / watches
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-- 010x Load register
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-- 011x Reset
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-- 1000 Singe Step
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if (cmd(3 downto 1) = "000") then
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single <= cmd(0);
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end if;
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if (cmd(3 downto 1) = "001") then
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brkpt_enable <= cmd(0);
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end if;
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if (cmd(3 downto 1) = "010") then
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brkpt_reg <= cmd(0) & brkpt_reg(brkpt_reg'length - 1 downto 1);
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end if;
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if (cmd(3 downto 1) = "011") then
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reset <= cmd(0);
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end if;
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end if;
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if (reset = '1') then
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nRST <= '0';
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else
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nRST <= 'Z';
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end if;
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-- Address monitoring
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addr_sync <= Addr;
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if (Sync = '1') then
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addr_inst <= Addr;
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end if;
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-- Reset
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if (reset = '1') then
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nRST <= '0';
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else
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nRST <= 'Z';
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end if;
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-- Breakpoints
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brkpt_clock1 <= brkpt_clock;
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brkpt_clock2 <= brkpt_clock1;
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if (brkpt_enable = '0' and brkpt_clock2 = '0' and brkpt_clock1 = '1') then
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brkpt_reg <= brkpt_data & brkpt_reg(brkpt_reg'length - 1 downto 1);
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end if;
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brkpt_active1 <= brkpt_active;
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-- Single Stepping
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step1 <= step;
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step2 <= step1;
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if ((single = '0') or (step2 = '0' and step1 = '1')) then
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if ((single = '0') or (cmd_edge2 = '0' and cmd_edge1 = '1' and cmd = "1000")) then
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Rdy <= (not brkpt_active);
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else
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Rdy <= (not Sync);
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