mirror of
https://github.com/hoglet67/AtomBusMon.git
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129 lines
9.1 KiB
VHDL
129 lines
9.1 KiB
VHDL
-- *****************************************************************************************
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-- AVR constants
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-- Version 2.1
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-- Modified 08.01.2007
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-- Designed by Ruslan Lepetenok
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-- EIND register address is added
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-- type ext_mux_din_type and subtype ext_mux_en_type were removed
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-- LOG2 function was removed
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-- *****************************************************************************************
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library IEEE;
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use IEEE.std_logic_1164.all;
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package avr_adr_pack is
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constant PINF_address : integer := 16#00#; -- Input Pins Port F
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constant PINE_address : integer := 16#01#; -- Input Pins Port E
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constant DDRE_address : integer := 16#02#; -- Data Direction Regis Port E
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constant PORTE_address : integer := 16#03#; -- Data Register Port E
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constant ADCL_address : integer := 16#04#; -- ADC Data register(Low)
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constant ADCH_address : integer := 16#05#; -- ADC Data register(High)
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constant ADCSRA_address : integer := 16#06#; -- ADC Control and Status Register
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constant ADMUX_address : integer := 16#07#; -- ADC Multiplexer Selection Register
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constant ACSR_address : integer := 16#08#; -- Analog Comparator Control and Status Register
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constant UBRR0L_address : integer := 16#09#; -- USART0 Baud Rate Register Low
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constant UCSR0B_address : integer := 16#0A#; -- USART0 Control and Status Register B
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constant UCSR0A_address : integer := 16#0B#; -- USART0 Control and Status Register A
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constant UDR0_address : integer := 16#0C#; -- USART0 I/O Data Register
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constant SPCR_address : integer := 16#0D#; -- SPI Control Register
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constant SPSR_address : integer := 16#0E#; -- SPI Status Register
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constant SPDR_address : integer := 16#0F#; -- SPI I/O Data Register
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constant PIND_address : integer := 16#10#; -- Input Pins Port D
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constant DDRD_address : integer := 16#11#; -- Data Direction Regis Port D
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constant PORTD_address : integer := 16#12#; -- Data Register Port D
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constant PINC_address : integer := 16#13#; -- Input Pins Port C
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constant DDRC_address : integer := 16#14#; -- Data Direction Regis Port C
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constant PORTC_address : integer := 16#15#; -- Data Register Port C
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constant PINB_address : integer := 16#16#; -- Input Pins Port B
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constant DDRB_address : integer := 16#17#; -- Data Direction Regis Port B
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constant PORTB_address : integer := 16#18#; -- Data Register Port B
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constant PINA_address : integer := 16#19#; -- Input Pins Port A
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constant DDRA_address : integer := 16#1A#; -- Data Direction Regis Port A
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constant PORTA_address : integer := 16#1B#; -- Data Register Port A
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constant EECR_address : integer := 16#1C#; -- EEPROM Control Register
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constant EEDR_address : integer := 16#1D#; -- EEPROM Data Register
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constant EEARL_address : integer := 16#1E#; -- EEPROM Address Register(Low)
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constant EEARH_address : integer := 16#1F#; -- EEPROM Address Register(High)
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constant SFIOR_address : integer := 16#20#; -- Special Function I/O Register
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constant WDTCR_address : integer := 16#21#; -- Watchdog Timer Control Register
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constant OCDR_address : integer := 16#22#; -- On-Chip Debug Register
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constant OCR2_address : integer := 16#23#; -- Timer/Counter 2 Output Compare Register
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constant TCNT2_address : integer := 16#24#; -- Timer/Counter 2
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constant TCCR2_address : integer := 16#25#; -- Timer/Counter 2 Control Register
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constant ICR1L_address : integer := 16#26#; -- Timer/Counter 1 Input Capture Register(Low)
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constant ICR1H_address : integer := 16#27#; -- Timer/Counter 1 Input Capture Register(High)
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constant OCR1BL_address : integer := 16#28#; -- Timer/Counter 1 Output Compare Register B(Low)
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constant OCR1BH_address : integer := 16#29#; -- Timer/Counter 1 Output Compare Register B(High)
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constant OCR1AL_address : integer := 16#2A#; -- Timer/Counter 1 Output Compare Register A(Low)
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constant OCR1AH_address : integer := 16#2B#; -- Timer/Counter 1 Output Compare Register A(High)
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constant TCNT1L_address : integer := 16#2C#; -- Timer/Counter 1 Register(Low)
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constant TCNT1H_address : integer := 16#2D#; -- Timer/Counter 1 Register(High)
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constant TCCR1B_address : integer := 16#2E#; -- Timer/Counter 1 Control Register B
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constant TCCR1A_address : integer := 16#2F#; -- Timer/Counter 1 Control Register A
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constant ASSR_address : integer := 16#30#; -- Asynchronous mode Status Register
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constant OCR0_address : integer := 16#31#; -- Timer/Counter 0 Output Compare Register
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constant TCNT0_address : integer := 16#32#; -- Timer/Counter 0
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constant TCCR0_address : integer := 16#33#; -- Timer/Counter 0 Control Register
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constant MCUCSR_address : integer := 16#34#; -- MCU general Control and Status Register
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constant MCUCR_address : integer := 16#35#; -- MCU general Control Register
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constant TIFR_address : integer := 16#36#; -- Timer/Counter Interrupt Flag Register
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constant TIMSK_address : integer := 16#37#; -- Timer/Counter Interrupt Mask Register
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constant EIFR_address : integer := 16#38#; -- External Interrupt Flag Register
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constant EIMSK_address : integer := 16#39#; -- External Interrupt Mask Register
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constant EICRB_address : integer := 16#3A#; -- External Interrupt Control Register B
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constant RAMPZ_address : integer := 16#3B#; -- RAM Page Z Select Register
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constant XDIV_address : integer := 16#3C#; -- XTAL Divide Control Register
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constant SPL_address : integer := 16#3D#; -- Stack Pointer(Low)
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constant SPH_address : integer := 16#3E#; -- Stack Pointer(High)
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constant SREG_address : integer := 16#3F#; -- Status Register
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-- Extended I/O space
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constant DDRF_address : integer := 16#61#; -- Data Direction Regis Port F
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constant PORTF_address : integer := 16#62#; -- Data Register Port F
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constant PING_address : integer := 16#63#; -- Input Pins Port G
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constant DDRG_address : integer := 16#64#; -- Data Direction Regis Port G
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constant PORTG_address : integer := 16#65#; -- Data Register Port G
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constant SPMCSR_address : integer := 16#68#; -- Store Program Memory Control and Status Register
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constant EICRA_address : integer := 16#6A#; -- External Interrupt Control Register A
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constant XMCRB_address : integer := 16#6C#; -- External Memory Control Register B
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constant XMCRA_address : integer := 16#6D#; -- External Memory Control Register A
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constant OSCCAL_address : integer := 16#6F#; -- Oscillator Calibration Register
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constant TWBR_address : integer := 16#70#; -- TWI Bit Rate Register
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constant TWSR_address : integer := 16#71#; -- TWI Status Register
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constant TWAR_address : integer := 16#72#; -- TWI Address Register
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constant TWDR_address : integer := 16#73#; -- TWI Data Register
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constant TWCR_address : integer := 16#74#; -- TWI Control Register
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constant OCR1CL_address : integer := 16#78#; -- Timer/Counter 1 Output Compare Register C(Low)
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constant OCR1CH_address : integer := 16#79#; -- Timer/Counter 1 Output Compare Register C(High)
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constant TCCR1C_address : integer := 16#7A#; -- Timer/Counter 1 Control Register C
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constant ETIFR_address : integer := 16#7C#; -- Extended Timer/Counter Interrupt Flag Register
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constant ETIMSK_address : integer := 16#7D#; -- Extended Timer/Counter Interrupt Mask Register
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constant ICR3L_address : integer := 16#80#; -- Timer/Counter 3 Input Capture Register(Low)
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constant ICR3H_address : integer := 16#81#; -- Timer/Counter 3 Input Capture Register(High)
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constant OCR3CL_address : integer := 16#82#; -- Timer/Counter 3 Output Compare Register C(Low)
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constant OCR3CH_address : integer := 16#83#; -- Timer/Counter 3 Output Compare Register C(High)
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constant OCR3BL_address : integer := 16#84#; -- Timer/Counter 3 Output Compare Register B(Low)
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constant OCR3BH_address : integer := 16#85#; -- Timer/Counter 3 Output Compare Register B(High)
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constant OCR3AL_address : integer := 16#86#; -- Timer/Counter 3 Output Compare Register A(Low)
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constant OCR3AH_address : integer := 16#87#; -- Timer/Counter 3 Output Compare Register A(High)
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constant TCNT3L_address : integer := 16#88#; -- Timer/Counter 3 Register Low
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constant TCNT3H_address : integer := 16#89#; -- Timer/Counter 3 Register Low
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constant TCCR3B_address : integer := 16#8A#; -- Timer/Counter 3 Control Register B
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constant TCCR3A_address : integer := 16#8B#; -- Timer/Counter 3 Control Register A
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constant TCCR3C_address : integer := 16#8C#; -- Timer/Counter 3 Control Register C
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constant UBRR0H_address : integer := 16#90#; -- USART0 Baud Rate Register High
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constant UCSR0C_address : integer := 16#95#; -- USART0 Control and Status Register C
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constant UBRR1H_address : integer := 16#98#; -- USART1 Baud Rate Register High
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constant UBRR1L_address : integer := 16#99#; -- USART1 Baud Rate Register Low
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constant UCSR1B_address : integer := 16#9A#; -- USART1 Control and Status Register B
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constant UCSR1A_address : integer := 16#9B#; -- USART1 Control and Status Register A
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constant UDR1_address : integer := 16#9C#; -- USART1 I/O Data Register
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constant UCSR1C_address : integer := 16#9D#; -- USART1 Control and Status Register C
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-- Cores with 22 bit PC(I/O)
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constant EIND_Address : integer := 16#3C#; -- !!!TBD!!! Occupated by XDIV in Mega128
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end avr_adr_pack;
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