typos

Marc Jacobi 2019-10-23 17:21:50 +02:00
parent 5f6742f797
commit a299be1c17

@ -95,14 +95,14 @@ R14 and C15 provide an option for low pass filtering the clock signal. So far th
Components should be fitted in the following order:
- SMT ICs
- SMT Discretes
- Through-hold components
- Through-hole components
- 40 Pin SMT DIP Header
It is suggested to fit the ICs first, so they can be drag soldered without the nearby discrete components getting in the way.
Pay attention to the orientation of the 74LVC4245AD devices (U2-7) and they are not all the same. The orientation of U5 is not marked, but should be the same a U6 and U7.
Pay particular attention to the orientation of the two schottky diodes (D4,D5). The marked bar is quite faint, but this end should face the ouside of the board (allowing current to flow into the FPGA board from the adapter)
Pay particular attention to the orientation of the two schottky diodes (D4,D5). The marked bar is quite faint, but this end should face the outside of the board (allowing current to flow into the FPGA board from the adapter)
## FPGA Firmware