2019-09-27 16:08:31 +00:00
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; Vera Display Composer Assembly Language Routines for C02
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2019-09-29 01:59:58 +00:00
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; Requires External Routines GETVRG and SETDCX, SETDST
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2019-09-27 16:08:31 +00:00
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; and External Variables TEMP0, TEMP1, and TEMP2
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2019-09-29 01:59:58 +00:00
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;Display Composer Registers
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;$F0000 Video Control
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;$F0001 Horizontal Scale
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;$F0002 Vertical Scale
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;$F0003 Border Color
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;$F0004 Horizontal Start LSB
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;$F0005 Horizontal Stop LSB
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;$F0006 Vertical Start LSB
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;$F0007 Vertical Stop LSB
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;$F0008 Start/Stop High Bits
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;$F0009 IRQ Line LSB
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;$F000A IRQ Line MSB
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;getbdr() - Get Border Color
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2019-09-27 16:08:31 +00:00
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;Returns: A = Border Color Palette Index
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GETBDR: LDA #$03 ;Set Register Offset to Border Color
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2019-09-29 01:59:58 +00:00
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;getdcb(reg) - Read Single Display Composer Register
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2019-09-27 16:08:31 +00:00
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;Args: A = Register Offset
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;Affects: Y
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;Returns: A = Contents of Register
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; X = Current Data Port
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2019-09-29 01:59:58 +00:00
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GETDCB: LDY #$00 ;Set MSB to Display Composer Page
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2019-09-27 16:08:31 +00:00
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TAX ;Set LSB to Register Offset
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2019-09-29 01:59:58 +00:00
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JMP GETVRG ;and Execute Vera Register
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;getdcr(&array) - Read All Display Composer Registers
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;Args: Y,X = Address of Array
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;Affects: Y
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;Returns: A = Contents of Register
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; X = Current Data Port
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GETDCR: JSR SETDST ;Set Destination Pointer to Array
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JSR SETDCA ;Set Address to Display Composer
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LDA #11 ;Set Number of Registers to 11
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JMP GETMEA ;and Read Registers
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SETDCA: LDY #00 ;Set Page to Display Composer
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LDX #0 ;Set Register to 0
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JMP REGADR ;Set Vera Address to Register
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2019-09-27 16:08:31 +00:00
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;getiql() - Get Interrupt Line
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;Affects: A
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;Returns: Y,X = Interrupt Line#
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GETIQL: LDA #9 ;Set Register Offset to Interrupt Line
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.DC $2C ;Skip to SETDCX (BIT Absolute)
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;getscl() - Get Horizontal and Vertical Scale
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;Returns: A,X = Horizontal Scale
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; Y = Vertical Scale
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GETSCL: LDA #1 ;Set Register Offset to HSCALE,VSCALE
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;getdci() - Get Display Composer Register Pair
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;Args: A = Register Offset
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;Affects: Y
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;Returns: A,X = Integer LSB
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; Y = Integer LSB
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GETDCI: LDY #$00 ;Set MSB to Display Composer Page
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TAX ;Set LSB to Register Offset
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2019-09-29 01:59:58 +00:00
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JMP GETVRI ;Get Vera Register Pair
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2019-09-27 16:08:31 +00:00
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;getvid() - Get Video Output Mode
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;Returns: A = Video Mode
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; Y = Chroma Disabled
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; X = Current Field
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GETVID: LDA #$00 ;Set Register Offset to Video Output
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2019-09-29 01:59:58 +00:00
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JSR GETDCB ;Read from Display Composer
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2019-09-27 16:08:31 +00:00
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LDY #$00 ;Set Chroma Disabled to FALSE
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LDX #$00 ;Set Video Field to EVEN
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BIT GETVIM ;Test Chroma Disabled Bit
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BEQ GETVIE ;If Bit 3 is Set
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DEY ; Set Chroma Disabled to TRUE
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BIT GETVIM ;Test Chroma Disabled Bit
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GETVIE: BCC GETVIF ;If Bit 7 is Set
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DEX ; Set Video Field to ODD
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GETVIF: AND #$03 ;Isolate Bits 0-2 (Video Output Mode)
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RTS
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GETVIM: .DC $04 ;Chroma Disable Bit Mask
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;getvsp() - Get Vertical Stop
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;Affects: A
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;Returns: Y,X = Vertical Stop
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GETVSP: LDA #7 ;Set Reg Offset to Vertical Stop
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JSR GETHVS ;Read Registers
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LSR ;Shift Left One Bit
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2019-11-15 04:56:33 +00:00
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BRA GETVSS ;Then Four More Bits and Mask
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2019-09-27 16:08:31 +00:00
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;getvsr() - Get Vertical Start
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;Affects: A
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;Returns: Y,X = Vertical Start
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GETVSR: LDA #6 ;Set Reg Offset to Vertical Start
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JSR GETHVS ;Read Registers
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GETVSS: LSR ;Shift Left Four Bit
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LSR
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LSR
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LSR
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AND #$01 ;Isolate Bit 0
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TAY ;and Copy MSB to Y
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RTS
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;gethsp() - Get Horizontal Stop
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;Affects: A
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;Returns: Y,X = Horizontal Stop
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GETHSP: LDA #5 ;Set Lookup Index to Horizontal Start
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JSR GETHVS ;Read Registers
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LSR ;Shift Left Two Bits
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LSR
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2019-11-15 04:56:33 +00:00
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BRA GETHSS ;then Mask and Return
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2019-09-27 16:08:31 +00:00
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;gethsr() - Get Horizontal Start
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;Affects: A
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;Returns: Y,X = Horizontal Start
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GETHSR: LDA #4 ;Set Lookup Index to Horizontal Start
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JSR GETHVS ;Read Registers
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GETHSS: AND #$03 ;Isolate Bit 0
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TAY ;and Copy MSB to Y
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RTS
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;gethvs() - Get Start/Stop Low Byte and High Bits
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;Args: X = Low Register
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;Affects: Y
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;Returns: A = High Bits
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; X = Low Byte
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2019-09-29 01:59:58 +00:00
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GETHVS: JSR GETDCB ;Read LSB from Register
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2019-09-27 16:08:31 +00:00
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PHA ;and Save It
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LDA #8 ;Load Register Offset for High Bits
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2019-11-15 04:56:33 +00:00
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STA $9F20 ;Set As Address LSB
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2019-09-27 16:08:31 +00:00
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LDA $9F23,X ;and Read High Bits into A
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2019-11-15 04:56:33 +00:00
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PLX ;Restore LSB into X
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2019-09-27 16:08:31 +00:00
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RTS
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;setbdr() - Set Border Color
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;Args: A = Border Color Palette Index
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SETBDR: LDX #3 ;Set Register Offset to Border Color
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.DC $2C ;Skip to SETDCX (BIT Absolute)
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;setdcr() - Set Display Composer Register
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;Args: A = Register Offset
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; Y = Value to Write
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;Affects: Y
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;Returns: A = Value Written
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; X = Current Data Port
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SETDCR: TAX ;Set LSB to Register Offset
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TYA ;Move Write Value to Accumulator
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SETDCX: LDY #$00 ;Set MSB to Display Composer Page
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JMP SETREG ;Write to Register
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;setvid() - Set Video Output Mode
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;Args: A = Video Mode
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; Y = Chroma Disabled
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;Destroys: TEMP0
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SETVID: AND #3 ;Isolate Video Mode Bits
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CPY #0 ;Set Chroma Mask to
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BEQ SETVIF ; 0 if Y is Zero or
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LDY #4 ; 4 if it is not
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SETVIF: STY TEMP0 ;Save Chroma Bit
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ORA TEMP0 ;Combine with Video Mode Bits
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LDX #0 ;Set Register Offset to Video Mode
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BEQ SETDCX ;Write to Register
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;setiql() - Set IRQ Line
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;Args: Y,X = IRQ Line Number`
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;Sets: TEMP1,TEMP2 = IRQ Line Number
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;Affecta: A,Y,X
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SETIQL: TXA ;Copy LSB to Accumulator
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LDX #9 ;Set Register Offset to HSCALE,VSCALE
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.DC $2C ;Skip to SETDCP (BIT Absolute)
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;setscl() - Set Horizontal and Vertical Scale
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;Args: A = Horizontal Scale
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; Y = Vertical Scale
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SETSCL: LDX #1 ;Set Register Offset to HSCALE,VSCALE
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;setdcp() - Set Display Composer Register Pair
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;Args: A = First Register Value
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; Y = Second Register Value
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; X = Register Offset
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;Affects: A,Y
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;Returns: X = Current Data Port
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SETDCP: STA TEMP1 ;Store First Value as LSB
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STY TEMP2 ;Store Second Value as MSB
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LDY #$00 ;Set MSB to Display Composer Page
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JMP SETREI ;Set Register to Integer
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;sethsp() - Set Horizontal Stop
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;Args: Y,X = Horizontal Stop
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;Destroys TEMP1,TEMP2
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;Affects: A,X,Y
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SETHSP: TYA ;Convert MSB to High Bits
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AND #$03
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ASL
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ASL
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #5 ;Set Register Offset to Horizontal Start
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LDY #$F3 ;Set High Bits Mask
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BNE SETHVS ;OR in High Bits and Write Back
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;sethsr() - Set Horizontal Start
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;Args: Y,X = Horizontal Start
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;Destroys TEMP1,TEMP2
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;Affects: A,X,Y
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SETHSR: TYA ;Convert MSB to High Bits
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AND #$03
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #4 ;Set Register Offset to Horizontal Start
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LDY #$FC ;Set High Bits Mask
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2019-09-29 01:59:58 +00:00
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;sethvs() - Set Horizontal/Vertical Start/Stop
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2019-09-27 16:08:31 +00:00
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;Args: A = Start/Stop LSB
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; Y = High Bits and Mask
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; X = LSB Register Offset
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;Uses: TEMP1 = Start Stop High Bits
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;Destroys: TEMP2
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;Affects: A,X,Y
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SETHVS: STY TEMP2 ;Save
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JSR SETDCX ;Write LSB
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LDA #8 ;Load Register Offset for High Bits
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STA $9F20 ;Set As Address LSB
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LDA $9F23,X ;and Read High Bits into A
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AND TEMP2 ;Mask Start Stop High
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ORA TEMP1 ;OR in High Bits
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STA $9F23,X ;and Write back to Register
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RTS
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;setvsp() - Set Horizontal Stop
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;Args: Y,X = Horizontal Stop
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;Destroys TEMP1,TEMP2
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;Affects: A,X,Y
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SETVSP: TYA ;Convert MSB to High Bit
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AND #$01
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ASL
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ASL
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ASL
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ASL
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ASL
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #7 ;Set Register Offset to Horizontal Start
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LDY #$DF ;Set High Bits Mask
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BNE SETHVS ;OR in High Bits and Write Back
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;setvsr() - Set Horizontal Start
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;Args: Y,X = Horizontal Start
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;Destroys TEMP1,TEMP2
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;Affects: A,X,Y
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SETVSR: TYA ;Convert MSB to High Bit
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AND #$01
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ASL
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ASL
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ASL
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ASL
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #6 ;Set Register Offset to Horizontal Start
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LDY #$EF ;Set High Bits Mask
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BNE SETHVS ;OR in High Bits and Write Back
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