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Moved memory access functions to module veramem
This commit is contained in:
Curtis F Kaylor
parent
3b74138826
commit
7674e11b61
642
x16/include/vera-old.a02
Normal file
642
x16/include/vera-old.a02
Normal file
@ -0,0 +1,642 @@
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; C02 module vera.h02 assembly language subroutines
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; Requires External Functions NYBCAT, NYBCUT
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; and Variables TEMP0
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;getadr() - Get Vera Address
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;Args: A = Bank + Auto-Increment
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; Y,X = Address
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GETADR: LDX $9F20 ;Store Address LSB
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LDY $9F21 ;Store Address MSB
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LDA $9F22 ;Store Bank & Auto-Increment
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RTS
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;getvid() - Get Video Output Mode
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;Returns: A = Video Mode
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; Y = Chroma Disabled
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; X = Current Field
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GETVID: LDA #$00 ;Set Register Offset to Video Output
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JSR GETDCR ;Read from Display Composer
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LDY #$00 ;Set Chroma Disabled to FALSE
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LDX #$00 ;Set Video Field to EVEN
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BIT GETVIM ;Test Chroma Disabled Bit
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BEQ GETVIE ;If Bit 3 is Set
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DEY ; Set Chroma Disabled to TRUE
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BIT GETVIM ;Test Chroma Disabled Bit
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GETVIE: BCC GETVIF ;If Bit 7 is Set
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DEX ; Set Video Field to ODD
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GETVIF: AND #$03 ;Isolate Bits 0-2 (Video Output Mode)
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RTS
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GETVIM: .DC $04 ;Chroma Disable Bit Mask
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;getbdr() - Get Get Border Color
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;Returns: A = Border Color Palette Index
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GETBDR: LDA #$03 ;Set Register Offset to Border Color
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;getdcr() - Get Display Composer Register
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;Args: A = Register Offset
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;Affects: Y
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;Returns: A = Contents of Register
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; X = Current Data Port
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GETDCR: LDY #$00 ;Set MSB to Display Composer Page
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TAX ;Set LSB to Register Offset
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;and Execute GETREG
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;getreg(&addr);
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;Args: Y,X = Address
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;Returns: A = Mode
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; X = Current Data Port
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GETREG: LDA #$0F ;Set Bank to Registers
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GETBYT: JSR SETADR ;Set Vera Address
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LDX $9F25 ;Get Current Data Port
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LDA $9F23,X ;Read LSB from Data Port
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RTS
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;getmem(count, &addr) - Read Array From Vera Memory
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;Args: A = Number of Bytes to Read
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; Y,X = Address of Array to Read Into
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;Requires: setadr()
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;Sets: DSTLO,DSTHI = Address of Array
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; TEMP0 = Number of Bytes to Read
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;Affects: A
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;Returns: Y = Number of Bytes Read
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; X = Current Data Port
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GETMEM: JSR SETDST ;Save Destination Address
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GETMEA: STA TEMP0 ;Save Number of Bytes
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LDY #0 ;Initialize Counter
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LDX $9F25 ;Get Current Data Port
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GETMEL: LDA $9F23,X ;Read Byte from Data Port
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STA (DSTLO),Y ;Store in Memory
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INY ;Increment Counter
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CPY TEMP0 ;If Limit Not Reached
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BNE GETMEL ; Loop
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;getmod() - Get Layer 0/1 Mode
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;Args: A = Layer (0/1)
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;Affects: Y
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;Returns: A = Layer Mode
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; X = Current Data Port
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GETMOD: JSR GETLRC ;Read Register
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LSR ;Shift Left Five Bits
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LSR
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LSR
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LSR
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RTS
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;getenb() - Get Layer 0/1 Enabled
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;Args: A = Layer (0/1)
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;Affects: Y
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;Returns: A = $FF - Layer Enabled
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; $00 - Layer Disabled
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; X = Current Data Port
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GETENB: JSR GETLRC ;Read Register
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AND #$01 ;Isolate Bit 1
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BEQ GETENX ;If Set
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LDA #$FF ; Return TRUE
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GETENX: RTS ;Else Return FALSE
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;getlrc() - Get Layer 0/1 Control Register
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;Args: A = Layer (0/1)
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;Affects: Y
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;Returns: A = Control Register Contents
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; X = Current Data Port
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GETLRC: LDX #0 ;Set Offset to Control Register
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;getlrr() - Get Layer 0/1 Register
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;Args: A = Layer (0/1)
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; X = Register Offset
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;Affects: Y
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;Returns: A = Contents of Register
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; X = Current Data Port
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GETLRR: JSR GETLRP ;Get Layer Page in Y
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BNE GETREG ;and Read Register Contents
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;getlrp() - Get Layer 0/1 Register Page
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;Args: A = Layer (0/1)
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;Returns: A,Y = Layer Register Page
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GETLRP: AND #$01 ;Isolate Bit 1
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ASL ;Move to Left Nybble
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ASL
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ASL
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ASL
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ORA #$20 ;And Add to 2
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TAY ;Return Page in Y
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RTS
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;getchd(index, &array) - Read Character Data into Array
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;Args: A = Character Index
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; Y,X = Address of Array to Read into
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;Destroys: TEMP0,TEMP1,TEMP2
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;Returns: A = Number of Bytes Read
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GETCHD: JSR SETDST ;Store Address in Destination Pointer
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STA TEMP1 ;Set Offset LSB to Index
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LDA #0 ;Set Offset MSB to Zero
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ASL TEMP1 ;Multiple Offset by 2
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ROL
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STA TEMP2 ;and Store MSB
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JSR GETLRI ;Get Tile Base
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TXA ;Add Offset To Tile Base
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CLC
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ADC TEMP0
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STA TEMP0
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TYA
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ADC TEMP1
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STA TEMP1
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LDA #0
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ADC #0
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JSR GETMBX ;Multiply by 4
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ORA #$10 ;Set Auto-Increment to 1
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JSR SETADR ;and Set Vera Address
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LDA #8 ;Set Byte Count to 8
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BNE GETMEA ;and Read Bytes into Array
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;gettba() - Get Layer 0/1 Tile Base Address
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;Args: A = Layer (0/1)
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;Destroys: TEMP1,TEMP2
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;Returns: A = Tile Base Bank
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; Y,X = Tile Base Address
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GETTBA: LDX #4 ;Set Register Offset
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.DC $2C ;Read Register Pair and Rotate
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;getmba() - Get Layer 0/1 Map Base Address
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;Args: A = Layer (0/1)
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;Destroys: TEMP1,TEMP2
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;Returns: A = Map Base Bank
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; Y,X = Map Base Address
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GETMBA: LDX #2 ;Set Register Offset
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JSR GETLRI ;Read Register Pair as Integer
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LDA #0 ;Initialize Page to 0
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JSR SAVRXY ;Save Integer in TEMP1,TEMP2
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GETMBX: LDX #2 ;Do Twice
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GETMBL: ASL TEMP1 ; Rotate LSB
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ROL TEMP2 ; MSB and
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ROL ; Bank Left
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DEX
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BNE GETMBL
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JMP RESRXY ;Load LSB, MSB and Return
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;getvsc() - Get Layer 0/1 Vertical Scroll
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;Args: A = Layer (0/1)
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;Returns: A,X = Vertical Scroll LSB
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; Y = Vertical Scroll MSB
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GETVSC: LDX #8 ;Set Register Offset
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.DC $2C ;Skip to GETLRI (BIT Absolute)
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;gethsc() - Get Layer 0/1 Horizontal Scroll
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;Args: A = Layer (0/1)
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;Returns: A,X = Horizontal Scroll LSB
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; Y = Horizontal Scroll MSB
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GETHSC: LDX #6 ;Set Register Offset
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.DC $2C ;Skip to GETLRI (BIT Absolute)
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;gettbs() - Get Layer 0/1 Tile Base
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;Args: A = Layer (0/1)
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;Returns: A,X = Tile Base LSB
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; Y = Tile Base MSB
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GETTBS: LDX #4 ;Set Register Offset
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.DC $2C ;Skip to GETLRI (BIT Absolute)
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;getmbs() - Get Layer 0/1 Map Base
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;Args: A = Layer (0/1)
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;Returns: A,X = Map Base LSB
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; Y = Map Base MSB
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GETMBS: LDX #2 ;Set Register Offset
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;getlri() - Get Layer 0/1 Register Pair as Integer
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;Args: A = Layer (0/1)
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; X = Register Offset
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;Returns: A,X = Integer LSB
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; Y = Integer LSB
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GETLRI: JSR GETLRP ;Get Layer Page in Y
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BNE GETREI ;and Read Register Contents
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;mapsiz() - Convert Map Size Specifier to Pixels
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;Args: A = Map Size Specifier
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;Affects: A
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;Returns: Y,X Map Size in Pixels
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MAPSIZ: TAX ;Copy Map Size Specifier to X
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LDA MAPSIH,X ;Load Pixels MSB from Table
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TAY ;and Return in Y
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LDA MAPSIL,X ;Load Pixels LSB from Table
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TAX ;and Return in X
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MAPSIL: .DC $20,$40,$80,$00
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MAPSIH: .DC $00,$00,$00,$01
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;tilsiz() - Convert Tile Size Specifier to Pixels
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;Args: A = Tile Size Specifier
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;Affects: A
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;Returns: A Tile Size in Pixels
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TILSIZ: TAX ;Copy Map Size Specifier to X
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LDA TILSIT,X ;Load Pixels MSB from Table
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RTS
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TILSIT: .DC $08,$10
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;gettsz() - Get Layer 0/1 Tile Size
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;getmsz() - Get Layer 0/1 Map Size
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;Args: A = Layer (0/1)
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;Affects: X
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;Returns: A = Map Width Specifier
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; Y = Map Height Specifier
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;getvsp() - Get Vertical Stop
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;Affects: A
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;Returns: Y,X = Vertical Stop
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GETVSP: LDA #7 ;Set Reg Offset to Vertical Stop
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JSR GETHVS ;Read Registers
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LSR ;Shift Left One Bit
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JMP GETVSS ;Then Four More Bits and Mask
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;getvsr() - Get Vertical Start
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;Affects: A
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;Returns: Y,X = Vertical Start
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GETVSR: LDA #6 ;Set Reg Offset to Vertical Start
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JSR GETHVS ;Read Registers
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GETVSS: LSR ;Shift Left Four Bit
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LSR
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LSR
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LSR
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AND #$01 ;Isolate Bit 0
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TAY ;and Copy MSB to Y
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RTS
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;gethsp() - Get Horizontal Stop
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;Affects: A
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;Returns: Y,X = Horizontal Stop
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GETHSP: LDA #5 ;Set Lookup Index to Horizontal Start
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JSR GETHVS ;Read Registers
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LSR ;Shift Left Two Bits
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LSR
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JMP GETHSS ;then Mask and Return
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;gethsr() - Get Horizontal Start
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;Affects: A
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;Returns: Y,X = Horizontal Start
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GETHSR: LDA #4 ;Set Lookup Index to Horizontal Start
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JSR GETHVS ;Read Registers
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;.dc $ff ;debug
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GETHSS: AND #$03 ;Isolate Bit 0
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TAY ;and Copy MSB to Y
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RTS
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;gethvs() - Get Start/Stop Low Byte and High Bits
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;Args: X = Low Register
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;Affects: Y
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;Returns: A = High Bits
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; X = Low Byte
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GETHVS: JSR GETDCR ;Read LSB from Register
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;.dc $ff ;debug
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PHA ;and Save It
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LDA #8 ;Load Register Offset for High Bits
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STA $9F20 ;Set As Address LSB
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LDA $9F23,X ;and Read High Bits into A
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.DC $FA ;PLX ;Restore LSB into X
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RTS
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;getiql() - Get Interrupt Line
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;Affects: A
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;Returns: Y,X = Interrupt Line#
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GETIQL: LDA #9 ;Set Register Offset to Interrupt Line
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.DC $2C ;Skip to SETDCX (BIT Absolute)
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;getscl() - Get Horizontal and Vertical Scale
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;Returns: A,X = Horizontal Scale
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; Y = Vertical Scale
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GETSCL: LDA #1 ;Set Register Offset to HSCALE,VSCALE
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.DC $2C ;Skip SETDCI (BIT Absolute)
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;getdci() - Get Display Composer Register Pair
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;Args: A = Register Offset
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;Affects: Y
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;Returns: A,X = Integer LSB
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; Y = Integer LSB
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GETDCI: LDY #$00 ;Set MSB to Display Composer Page
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TAX ;Set LSB to Register Offset
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;and Execute GETREI
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;getrei(addr); Read Vera Register Pair
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;Args: Y,X = Address
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;Returns: A,X = Integer LSB
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; Y = Integer LSB
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GETREI: LDA #$0F ;Set Bank to Registers
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;getint(addr); Read Integer from Vera Memory
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;Args: A = Bank
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; Y,X = Address
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;Returns: A,X = Integer LSB
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; Y = Integer LSB
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GETINT: ORA #$10 ;Set Auto-Increment to 1
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JSR SETADR ;Set Vera Address
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LDX $9F25 ;Get Current Data Port
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LDA $9F23,X ;Read LSB from Data Port
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LDY $9F23,X ;Read MSB Data Port
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TAX ;Copy LSB to X
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RTS
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;setvsp() - Set Horizontal Stop
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;Args: Y,X = Horizontal Stop
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;Affects: A,X,Y
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SETVSP: TYA ;Convert MSB to High Bit
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AND #$01
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ASL
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ASL
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ASL
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ASL
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ASL
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #7 ;Set Register Offset to Horizontal Start
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LDY #$DF ;Set High Bits Mask
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JMP SETHST ;OR in High Bits and Write Back
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;setvsr() - Set Horizontal Start
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;Args: Y,X = Horizontal Start
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;Affects: A,X,Y
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SETVSR: TYA ;Convert MSB to High Bit
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AND #$01
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ASL
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ASL
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ASL
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ASL
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #6 ;Set Register Offset to Horizontal Start
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LDY #$EF ;Set High Bits Mask
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JMP SETHST ;OR in High Bits and Write Back
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;sethsp() - Set Horizontal Stop
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;Args: Y,X = Horizontal Stop
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;Affects: A,X,Y
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SETHSP: TYA ;Convert MSB to High Bits
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AND #$03
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ASL
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ASL
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #5 ;Set Register Offset to Horizontal Start
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LDY #$F3 ;Set High Bits Mask
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JMP SETHST ;OR in High Bits and Write Back
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;sethsr() - Set Horizontal St7art
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;Args: Y,X = Horizontal Start
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;Destroys TEMP0,TEMP1,TEMP2
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;Affects: A,X,Y
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SETHSR: TYA ;Convert MSB to High Bits
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AND #$03
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STA TEMP1 ;and Save
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TXA ;Copy LSB to Accumlator
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LDX #4 ;Set Register Offset to Horizontal Start
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LDY #$FC ;Set High Bits Mask
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SETHST: STY TEMP2 ;Save
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JSR SETHVS ;Write LSB and Get High Bits
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AND TEMP2 ;Mask Start Stop High
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ORA TEMP1 ;OR in High Bits
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STA $9F23,X ;and Write back to Register
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RTS
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SETHVS: JSR SETDCX ;Write LSB
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LDA #8 ;Load Register Offset for High Bits
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STA $9F20 ;Set As Address LSB
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LDA $9F23,X ;and Read High Bits into A
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RTS
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;setvid() - Set Video Output Mode
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;Args: A = Video Mode
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; Y = Chroma Disabled
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;Destroys: TEMP0
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SETVID: AND #3 ;Isolate Video Mode Bits
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CPY #0 ;Set Chroma Mask to
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BEQ SETVIF ; 0 if Y is Zero or
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LDY #4 ; 4 if it is not
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SETVIF: STY TEMP0 ;Save Chroma Bit
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ORA TEMP0 ;Combine with Video Mode Bits
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LDX #0 ;Set Register Offset to Video Mode
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BEQ SETDCX ;Write to Register
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;setbdr() - Set Border Color
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;Args: A = Border Color Palette Index
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SETBDR: LDX #3 ;Set Register Offset to Border Color
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.DC $2C ;Skip to SETDCX (BIT Absolute)
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;setdcr() - Set Display Composer Register
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;Args: A = Register Offset
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; Y = Value to Write
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;Affects: Y
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;Returns: A = Value Written
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; X = Current Data Port
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SETDCR: TAX ;Set LSB to Register Offset
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TYA ;Move Write Value to Accumulator
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SETDCX: LDY #$00 ;Set MSB to Display Composer Page
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;setreg(addr) - Set Register
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;Args: A = Value to Write
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; Y,X = Address
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;Sets: TEMP0 = Value to Write
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;Affects: Y
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;Returns: A = Value Written
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; X = Current Data Port
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SETREG: STA TEMP0 ;Save Value to Write
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SETREH: LDA #$0F ;Set Bank, Auto-Increment
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;setbyt(addr) - Write Byte to Vera Memory
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;Args: A = Bank
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; Y,X = Address
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;Uses: TEMP0 = Value to Write
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;Affects: Y
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;Returns: A = Value Written
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; X = Current Data Port
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SETBYT: JSR SETADR ;Set Vera Address
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LDA TEMP0 ;Retrieve Value to Write
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LDX $9F25 ;Get Current Data Port
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STA $9F23,X ;Write Value to Data Port
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RTS
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;settbs() - Set Layer 0/1 Map Base
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;Args: A = Layer (0/1)
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; Y,X = Map Base
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;Sets: TEMP1,TEMP2 = Map Base
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;Affecta: A,Y,X
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SETTBS: JSR SAVRXY ;Store Map Base in TEMP1,TEMP2
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LDX #4 ;Set Register Offset
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BNE SETLRI ;Write to Layer Register
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|
||||
;setmbs() - Set Layer 0/1 Map Base
|
||||
;Args: A = Layer (0/1)
|
||||
; Y,X = Map Base
|
||||
;Sets: TEMP1,TEMP2 = Map Base
|
||||
;Affecta: A,Y,X
|
||||
SETMBS: JSR SAVRXY ;Store Map Base in TEMP1,TEMP2
|
||||
LDX #2 ;Set Register Offset
|
||||
BNE SETLRI ;Write to Layer Register
|
||||
|
||||
;setvsc() - Set Layer 0/1 Vertical Scroll
|
||||
;Args: A = Layer (0/1)
|
||||
; Y,X = Map Base
|
||||
;Sets: TEMP1,TEMP2 = Vertical Scroll
|
||||
;Affecta: A,Y,X
|
||||
SETVSC: JSR SAVRXY ;Store Vertical Scroll in TEMP1,TEMP2
|
||||
LDX #8 ;Set Register Offset
|
||||
BNE SETLRI ;Write to Layer Register
|
||||
|
||||
;sethsc() - Set Layer 0/1 Horizontal Scroll
|
||||
;Args: A = Layer (0/1)
|
||||
; Y,X = Map Base
|
||||
;Sets: TEMP1,TEMP2 = Horizontal Scroll
|
||||
;Affecta: A,Y,X
|
||||
SETHSC: JSR SAVRXY ;Store Horizontal Scroll in TEMP1,TEMP2
|
||||
LDX #6 ;Set Register Offset
|
||||
|
||||
;setlri() - Write Integer to Get Layer 0/1 Register
|
||||
;Args: A = Layer (0/1)
|
||||
; X = Register Offset
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affecta: A,Y,X
|
||||
SETLRI: JSR GETLRP ;Get Layer Page in Y
|
||||
BNE SETREI ;and Write Integer to Register
|
||||
|
||||
;setiql() - Set IRQ Line
|
||||
;Args: Y,X = IRQ Line Number`
|
||||
;Sets: TEMP1,TEMP2 = IRQ Line Number
|
||||
;Affecta: A,Y,X
|
||||
SETIQL: TXA ;Copy LSB to Accumulator
|
||||
LDX #9 ;Set Register Offset to HSCALE,VSCALE
|
||||
.DC $2C ;Skip to SETDCP (BIT Absolute)
|
||||
|
||||
;setscl() - Set Horizontal and Vertical Scale
|
||||
;Args: A = Horizontal Scale
|
||||
; Y = Vertical Scale
|
||||
SETSCL: LDX #1 ;Set Register Offset to HSCALE,VSCALE
|
||||
|
||||
;setdcp() - Set Display Composer Register Pair
|
||||
;Args: A = First Register Value
|
||||
; Y = Second Register Value
|
||||
; X = Register Offset
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETDCP: STA TEMP1 ;Store First Value as LSB
|
||||
STY TEMP2 ;Store Second Value as MSB
|
||||
LDY #$00 ;Set MSB to Display Composer Page
|
||||
|
||||
;setrei(addr); Set Vera Register to Integer
|
||||
;Args: Y,X = Address
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETREI: LDA #$0F ;Set Bank to Registers
|
||||
|
||||
;setint(addr); Write Integer to Vera Memory
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETINT: ORA #$10 ;Set Auto-Increment to 1
|
||||
JSR SETADR ;Set Vera Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA TEMP1 ;Get LSB
|
||||
STA $9F23,X ;Write to Data Port
|
||||
LDA TEMP2 ;Get MSB
|
||||
STA $9F23,X ;Write to Data Port
|
||||
RTS
|
||||
|
||||
;setmem(count, &addr) - Write Array to Vera Memory
|
||||
;Args: A = Number of Bytes to Write
|
||||
; Y,X = Address of Array to Write From
|
||||
;Requires: setadr()
|
||||
;Sets: SRCLO,SRCHI = Address of Array
|
||||
; TEMP0 = Number of Bytes to Write
|
||||
;Affects: A
|
||||
;Returns: Y = Number of Bytes Written
|
||||
; X = Current Data Port
|
||||
SETMEM: STA TEMP0 ;Save Number of Bytes
|
||||
JSR SETSRC ;Save Destination Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDY #0 ;Initialize Counter
|
||||
SETMEL: LDA (SRCLO),Y ;Read Byte from Array
|
||||
STA $9F23,X ;Write Byte to Data Port
|
||||
INY ;Increment Counter
|
||||
CPY TEMP0 ;If Limit Not Reached
|
||||
BNE SETMEL ; Loop
|
||||
RTS
|
||||
|
||||
;rgbclr(r,g,b) - Convert RGB Values to Palette Color
|
||||
;Args: A = Red Value (0-15)
|
||||
; Y = Green Value (0-15)
|
||||
; X = Blue Value (0-15)
|
||||
;Affects: A
|
||||
;Returns: Y = Color MSB (0000RRRR)
|
||||
; X = Color LSB (GGGGBBBB)
|
||||
RGBCLR: PHA ;Save Red Value
|
||||
TYA ;Copy Green Value to Left Nybble
|
||||
.DC $DA ;PHX Copy Blue Value
|
||||
.DC $7A ;PLY to Right Nybble
|
||||
JSR NYBCAT ;Concatanate Green and Blue
|
||||
TAX ;and Return as LSB
|
||||
.DC $7A ;PLY Return Red as MSB
|
||||
RTS
|
||||
|
||||
;clrrgb(c) - Convert Palette Color to RGB Values
|
||||
;Args: Y = Color MSB (0000RRRR)
|
||||
; X = Color LSB (GGGGBBBB)
|
||||
;Returns: A = Red Value (0-15)
|
||||
; Y = Green Value (0-15)
|
||||
; X = Blue Value (0-15)
|
||||
CLRRGB: .DC $5A ;PHY Save MSB
|
||||
TXA ;Copy LSB into Accumulator
|
||||
JSR NYBCUT ;and Split into Nybbles
|
||||
.DC $5A ;PHY Return Blue Value
|
||||
.DC $FA ;PLX in X Register
|
||||
TAY ;Green Value in Y Register
|
||||
PLA ;and Red Value in Accumulator
|
||||
RTS
|
||||
|
||||
;getclr(idx) - Get Color Entry idx from Palette
|
||||
;Args: A = Color Entry Index
|
||||
;Affects: A
|
||||
;Returns: Y = Color MSB (0000RRRR)
|
||||
; X = Color LSB (GGGGBBBB)
|
||||
GETCLR: JSR SETIDX ;Set Vera Address to Palette Index
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA $9F23,X ;Read LSB from Data Port
|
||||
LDY $9F23,X ;Read MSB from Data Port
|
||||
TAX ;Copy LSB to X Register
|
||||
RTS
|
||||
|
||||
;setclr(idx) - Set Color Entry idx in Palette
|
||||
;Args: A = Color Entry Index
|
||||
; Y = Color MSB (0000RRRR)
|
||||
; X = Color LSB (GGGGBBBB)
|
||||
;Affects: A
|
||||
;Returns: Y,X = Color Entry Address
|
||||
SETCLR: JSR SAVRXY ;Save Color Value
|
||||
JSR SETIDX ;Set Vera Address to Palette Index
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA TEMP1 ;Retrieve Color Value LSB
|
||||
STA $9F23,X ;and Write to Data Port
|
||||
LDA TEMP2 ;Retrieve Color Value MSB
|
||||
STA $9F23,X ;Read MSB from Data Port
|
||||
RTS
|
||||
|
||||
;setidx(idx) - Set Vera Address to Palette Index
|
||||
;Args: A = Index
|
||||
;Returns: A = Bank + Auto-Increment
|
||||
; Y,X = Address
|
||||
SETIDX: ASL ;Multiply Index by 2
|
||||
TAX ;and Set as LSB
|
||||
LDA #$10 ;Get Palette Page
|
||||
ADC #$00 ;Add Carry from Multiply
|
||||
TAY ;and Set as MSB
|
||||
|
||||
|
||||
;regadr(opts,addr) - Set Vera Address to Internal Register
|
||||
;Args: Y,X = Register Address
|
||||
;Returns: A= Bank + Auto-Increment
|
||||
REGADR: LDA #$1F ;Set Bank and Auto-Increment
|
||||
|
||||
;setadr(opts,addr) - Set Vera Address
|
||||
;Args: A = Bank + Auto-Increment
|
||||
; Y,X = Address
|
||||
SETADR: STX $9F20 ;Store Address LSB
|
||||
STY $9F21 ;Store Address MSB
|
||||
STA $9F22 ;Store Bank & Auto-Increment
|
||||
RTS
|
||||
20
x16/include/vera-old.h02
Normal file
20
x16/include/vera-old.h02
Normal file
@ -0,0 +1,20 @@
|
||||
/***************************************************
|
||||
* vera.h02 - Commander X16 Routines for Vera chip *
|
||||
***************************************************/
|
||||
|
||||
/* Convert R, G, and B Values *
|
||||
* to Palette Color Value *
|
||||
* Args: r - Red Value (0-15) *
|
||||
* g - Green Value (0-15) *
|
||||
* b - Blue Value (0-15) *
|
||||
* Returns: int c - Color Value */
|
||||
char rgbclr();
|
||||
|
||||
/* Convert Palette Color Value *
|
||||
* to R, G, and B Values *
|
||||
* Args: int c - Color Value *
|
||||
* Returns: Red Value (0-15) *
|
||||
* Green Value (0-15) *
|
||||
* Blue Value (0-15) */
|
||||
char clrrgb();
|
||||
|
||||
@ -1,14 +1,4 @@
|
||||
; C02 module vera.h02 assembly language subroutines
|
||||
; Requires External Functions NYBCAT, NYBCUT
|
||||
; and Variables TEMP0
|
||||
|
||||
;getadr() - Get Vera Address
|
||||
;Args: A = Bank + Auto-Increment
|
||||
; Y,X = Address
|
||||
GETADR: LDX $9F20 ;Store Address LSB
|
||||
LDY $9F21 ;Store Address MSB
|
||||
LDA $9F22 ;Store Bank & Auto-Increment
|
||||
RTS
|
||||
|
||||
;getvid() - Get Video Output Mode
|
||||
;Returns: A = Video Mode
|
||||
@ -39,35 +29,7 @@ GETBDR: LDA #$03 ;Set Register Offset to Border Color
|
||||
; X = Current Data Port
|
||||
GETDCR: LDY #$00 ;Set MSB to Display Composer Page
|
||||
TAX ;Set LSB to Register Offset
|
||||
;and Execute GETREG
|
||||
;getreg(&addr);
|
||||
;Args: Y,X = Address
|
||||
;Returns: A = Mode
|
||||
; X = Current Data Port
|
||||
GETREG: LDA #$0F ;Set Bank to Registers
|
||||
GETBYT: JSR SETADR ;Set Vera Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA $9F23,X ;Read LSB from Data Port
|
||||
RTS
|
||||
|
||||
;getmem(count, &addr) - Read Array From Vera Memory
|
||||
;Args: A = Number of Bytes to Read
|
||||
; Y,X = Address of Array to Read Into
|
||||
;Requires: setadr()
|
||||
;Sets: DSTLO,DSTHI = Address of Array
|
||||
; TEMP0 = Number of Bytes to Read
|
||||
;Affects: A
|
||||
;Returns: Y = Number of Bytes Read
|
||||
; X = Current Data Port
|
||||
GETMEM: JSR SETDST ;Save Destination Address
|
||||
GETMEA: STA TEMP0 ;Save Number of Bytes
|
||||
LDY #0 ;Initialize Counter
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
GETMEL: LDA $9F23,X ;Read Byte from Data Port
|
||||
STA (DSTLO),Y ;Store in Memory
|
||||
INY ;Increment Counter
|
||||
CPY TEMP0 ;If Limit Not Reached
|
||||
BNE GETMEL ; Loop
|
||||
JMP GETREG ;and Execute GETREG
|
||||
|
||||
;getmod() - Get Layer 0/1 Mode
|
||||
;Args: A = Layer (0/1)
|
||||
@ -107,7 +69,7 @@ GETLRC: LDX #0 ;Set Offset to Control Register
|
||||
;Returns: A = Contents of Register
|
||||
; X = Current Data Port
|
||||
GETLRR: JSR GETLRP ;Get Layer Page in Y
|
||||
BNE GETREG ;and Read Register Contents
|
||||
JMP GETREG ;and Read Register Contents
|
||||
|
||||
;getlrp() - Get Layer 0/1 Register Page
|
||||
;Args: A = Layer (0/1)
|
||||
@ -146,7 +108,7 @@ GETCHD: JSR SETDST ;Store Address in Destination Pointer
|
||||
ORA #$10 ;Set Auto-Increment to 1
|
||||
JSR SETADR ;and Set Vera Address
|
||||
LDA #8 ;Set Byte Count to 8
|
||||
BNE GETMEA ;and Read Bytes into Array
|
||||
JMP GETMEA ;and Read Bytes into Array
|
||||
|
||||
;gettba() - Get Layer 0/1 Tile Base Address
|
||||
;Args: A = Layer (0/1)
|
||||
@ -206,8 +168,7 @@ GETMBS: LDX #2 ;Set Register Offset
|
||||
;Returns: A,X = Integer LSB
|
||||
; Y = Integer LSB
|
||||
GETLRI: JSR GETLRP ;Get Layer Page in Y
|
||||
BNE GETREI ;and Read Register Contents
|
||||
|
||||
JMP GETREI ;and Read Register Contents
|
||||
|
||||
;mapsiz() - Convert Map Size Specifier to Pixels
|
||||
;Args: A = Map Size Specifier
|
||||
@ -302,7 +263,6 @@ GETIQL: LDA #9 ;Set Register Offset to Interrupt Line
|
||||
;Returns: A,X = Horizontal Scale
|
||||
; Y = Vertical Scale
|
||||
GETSCL: LDA #1 ;Set Register Offset to HSCALE,VSCALE
|
||||
.DC $2C ;Skip to SETDCI (BIT Absolute)
|
||||
|
||||
;getdci() - Get Display Composer Register Pair
|
||||
;Args: A = Register Offset
|
||||
@ -311,26 +271,7 @@ GETSCL: LDA #1 ;Set Register Offset to HSCALE,VSCALE
|
||||
; Y = Integer LSB
|
||||
GETDCI: LDY #$00 ;Set MSB to Display Composer Page
|
||||
TAX ;Set LSB to Register Offset
|
||||
;and Execute GETREG
|
||||
|
||||
;getrei(addr); Read Vera Register Pair
|
||||
;Args: Y,X = Address
|
||||
;Returns: A,X = Integer LSB
|
||||
; Y = Integer LSB
|
||||
GETREI: LDA #$0F ;Set Bank to Registers
|
||||
|
||||
;getint(addr); Read Integer from Vera Memory
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Returns: A,X = Integer LSB
|
||||
; Y = Integer LSB
|
||||
GETINT: ORA #$10 ;Set Auto-Increment to 1
|
||||
JSR SETADR ;Set Vera Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA $9F23,X ;Read LSB from Data Port
|
||||
LDY $9F23,X ;Read MSB Data Port
|
||||
TAX ;Copy LSB to X
|
||||
RTS
|
||||
JMP GETREI ;Get Vera Register Pair
|
||||
|
||||
;setvsp() - Set Horizontal Stop
|
||||
;Args: Y,X = Horizontal Stop
|
||||
@ -427,29 +368,7 @@ SETBDR: LDX #3 ;Set Register Offset to Border Color
|
||||
SETDCR: TAX ;Set LSB to Register Offset
|
||||
TYA ;Move Write Value to Accumulator
|
||||
SETDCX: LDY #$00 ;Set MSB to Display Composer Page
|
||||
|
||||
;setreg(addr) - Set Register
|
||||
;Args: A = Value to Write
|
||||
; Y,X = Address
|
||||
;Sets: TEMP0 = Value to Write
|
||||
;Affects: Y
|
||||
;Returns: A = Value Written
|
||||
; X = Current Data Port
|
||||
SETREG: STA TEMP0 ;Save Value to Write
|
||||
SETREH: LDA #$0F ;Set Bank, Auto-Increment
|
||||
|
||||
;setbyt(addr) - Write Byte to Vera Memory
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Uses: TEMP0 = Value to Write
|
||||
;Affects: Y
|
||||
;Returns: A = Value Written
|
||||
; X = Current Data Port
|
||||
SETBYT: JSR SETADR ;Set Vera Address
|
||||
LDA TEMP0 ;Retrieve Value to Write
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
STA $9F23,X ;Write Value to Data Port
|
||||
RTS
|
||||
JMP SETREG ;Write to Register
|
||||
|
||||
;settbs() - Set Layer 0/1 Map Base
|
||||
;Args: A = Layer (0/1)
|
||||
@ -492,7 +411,7 @@ SETHSC: JSR SAVRXY ;Store Horizontal Scroll in TEMP1,TEMP2
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affecta: A,Y,X
|
||||
SETLRI: JSR GETLRP ;Get Layer Page in Y
|
||||
BNE SETREI ;and Write Integer to Register
|
||||
JMP SETREI ;and Write Integer to Register
|
||||
|
||||
;setiql() - Set IRQ Line
|
||||
;Args: Y,X = IRQ Line Number`
|
||||
@ -516,48 +435,8 @@ SETSCL: LDX #1 ;Set Register Offset to HSCALE,VSCALE
|
||||
SETDCP: STA TEMP1 ;Store First Value as LSB
|
||||
STY TEMP2 ;Store Second Value as MSB
|
||||
LDY #$00 ;Set MSB to Display Composer Page
|
||||
JMP SETREI ;Set Register to Integer
|
||||
|
||||
;setrei(addr); Set Vera Register to Integer
|
||||
;Args: Y,X = Address
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETREI: LDA #$0F ;Set Bank to Registers
|
||||
|
||||
;setint(addr); Write Integer to Vera Memory
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETINT: ORA #$10 ;Set Auto-Increment to 1
|
||||
JSR SETADR ;Set Vera Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA TEMP1 ;Get LSB
|
||||
STA $9F23,X ;Write to Data Port
|
||||
LDA TEMP2 ;Get MSB
|
||||
STA $9F23,X ;Write to Data Port
|
||||
RTS
|
||||
|
||||
;setmem(count, &addr) - Write Array to Vera Memory
|
||||
;Args: A = Number of Bytes to Write
|
||||
; Y,X = Address of Array to Write From
|
||||
;Requires: setadr()
|
||||
;Sets: SRCLO,SRCHI = Address of Array
|
||||
; TEMP0 = Number of Bytes to Write
|
||||
;Affects: A
|
||||
;Returns: Y = Number of Bytes Written
|
||||
; X = Current Data Port
|
||||
SETMEM: STA TEMP0 ;Save Number of Bytes
|
||||
JSR SETSRC ;Save Destination Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDY #0 ;Initialize Counter
|
||||
SETMEL: LDA (SRCLO),Y ;Read Byte from Array
|
||||
STA $9F23,X ;Write Byte to Data Port
|
||||
INY ;Increment Counter
|
||||
CPY TEMP0 ;If Limit Not Reached
|
||||
BNE SETMEL ; Loop
|
||||
RTS
|
||||
|
||||
;rgbclr(r,g,b) - Convert RGB Values to Palette Color
|
||||
;Args: A = Red Value (0-15)
|
||||
@ -626,17 +505,4 @@ SETIDX: ASL ;Multiply Index by 2
|
||||
LDA #$10 ;Get Palette Page
|
||||
ADC #$00 ;Add Carry from Multiply
|
||||
TAY ;and Set as MSB
|
||||
|
||||
|
||||
;regadr(opts,addr) - Set Vera Address to Internal Register
|
||||
;Args: Y,X = Register Address
|
||||
;Returns: A= Bank + Auto-Increment
|
||||
REGADR: LDA #$1F ;Set Bank and Auto-Increment
|
||||
|
||||
;setadr(opts,addr) - Set Vera Address
|
||||
;Args: A = Bank + Auto-Increment
|
||||
; Y,X = Address
|
||||
SETADR: STX $9F20 ;Store Address LSB
|
||||
STY $9F21 ;Store Address MSB
|
||||
STA $9F22 ;Store Bank & Auto-Increment
|
||||
RTS
|
||||
JMP REGADR ;and Set Address to Register
|
||||
|
||||
@ -2,14 +2,6 @@
|
||||
* vera.h02 - Commander X16 Routines for Vera chip *
|
||||
***************************************************/
|
||||
|
||||
/* Convert R, G, and B Values *
|
||||
* to Palette Color Value *
|
||||
* Args: r - Red Value (0-15) *
|
||||
* g - Green Value (0-15) *
|
||||
* b - Blue Value (0-15) *
|
||||
* Returns: int c - Color Value */
|
||||
char rgbclr();
|
||||
|
||||
/* Convert Palette Color Value *
|
||||
* to R, G, and B Values *
|
||||
* Args: int c - Color Value *
|
||||
@ -18,3 +10,33 @@ char rgbclr();
|
||||
* Blue Value (0-15) */
|
||||
char clrrgb();
|
||||
|
||||
/* Read Color Value from Palette *
|
||||
* Args: char i - Palette Index *
|
||||
* Returns: int c - Color Value */
|
||||
char getclr();
|
||||
|
||||
/* Read Display Controller Register *
|
||||
* Args: char r - Register Offset *
|
||||
* Returns: char v - Register Value */
|
||||
char getdcr();
|
||||
|
||||
/* Read Video Output Mode *
|
||||
* Returns: m - Output Mode *
|
||||
* c - Chroma Disabled *
|
||||
* f - Current Field */
|
||||
char getvid();
|
||||
|
||||
/* Convert R, G, and B Values *
|
||||
* to Palette Color Value *
|
||||
* Args: r - Red Value (0-15) *
|
||||
* g - Green Value (0-15) *
|
||||
* b - Blue Value (0-15) *
|
||||
* Returns: int c - Color Value */
|
||||
char rgbclr();
|
||||
|
||||
/* Write Color Value to Palette *
|
||||
* Args: i - Index into Palette *
|
||||
* int c - Color Value *
|
||||
* Returns: int d = Entry Address */
|
||||
char setclr();
|
||||
|
||||
|
||||
153
x16/include/veramem.a02
Normal file
153
x16/include/veramem.a02
Normal file
@ -0,0 +1,153 @@
|
||||
; Vera Memory Access Assembly Language Routines for C02
|
||||
; Requires External Routines RESRXY, SETDST, and SETSRC
|
||||
; and External Variables TEMP0 and TEMP1
|
||||
|
||||
;getadr() - Get Vera Address
|
||||
;Args: A = Bank + Auto-Increment
|
||||
; Y,X = Address
|
||||
GETADR: LDX $9F20 ;Store Address LSB
|
||||
LDY $9F21 ;Store Address MSB
|
||||
LDA $9F22 ;Store Bank & Auto-Increment
|
||||
RTS
|
||||
|
||||
;getreg(&addr) - Read Vera Internal Register
|
||||
;Args: Y,X = Address
|
||||
;Returns: A = Mode
|
||||
; X = Current Data Port
|
||||
GETREG: LDA #$0F ;Set Bank to Registers
|
||||
;and Execute GETBYT
|
||||
|
||||
;getbyt(&addr);
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Affects: Y
|
||||
;Returns: A = Contents of Memory
|
||||
; X = Current Data Port
|
||||
GETBYT: JSR SETADR ;Set Vera Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA $9F23,X ;Read LSB from Data Port
|
||||
RTS
|
||||
|
||||
;getmem(count, &addr) - Read Array From Vera Memory
|
||||
;Args: A = Number of Bytes to Read
|
||||
; Y,X = Address of Array to Read Into
|
||||
;Requires: setadr()
|
||||
;Sets: DSTLO,DSTHI = Address of Array
|
||||
; TEMP0 = Number of Bytes to Read
|
||||
;Affects: A
|
||||
;Returns: Y = Number of Bytes Read
|
||||
; X = Current Data Port
|
||||
GETMEM: JSR SETDST ;Save Destination Address
|
||||
GETMEA: STA TEMP0 ;Save Number of Bytes
|
||||
LDY #0 ;Initialize Counter
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
GETMEL: LDA $9F23,X ;Read Byte from Data Port
|
||||
STA (DSTLO),Y ;Store in Memory
|
||||
INY ;Increment Counter
|
||||
CPY TEMP0 ;If Limit Not Reached
|
||||
BNE GETMEL ; Loop
|
||||
|
||||
;getrei(addr); Read Vera Register Pair
|
||||
;Args: Y,X = Address
|
||||
;Returns: A,X = Integer LSB
|
||||
; Y = Integer LSB
|
||||
GETREI: LDA #$0F ;Set Bank to Registers
|
||||
|
||||
;getint(addr); Read Integer from Vera Memory
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Returns: A,X = Integer LSB
|
||||
; Y = Integer LSB
|
||||
GETINT: AND #$0F ;Set Auto-Increment to 1
|
||||
ORA #$10
|
||||
JSR SETADR ;Set Vera Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDA $9F23,X ;Read LSB from Data Port
|
||||
LDY $9F23,X ;Read MSB Data Port
|
||||
TAX ;Copy LSB to X
|
||||
RTS
|
||||
|
||||
;regadr(opts,addr) - Set Vera Address to Internal Register
|
||||
;Args: Y,X = Register Address
|
||||
;Returns: A= Bank + Auto-Increment
|
||||
REGADR: LDA #$1F ;Set Bank and Auto-Increment
|
||||
|
||||
;setadr(opts,addr) - Set Vera Address
|
||||
;Args: A = Bank + Auto-Increment
|
||||
; Y,X = Address
|
||||
SETADR: STX $9F20 ;Store Address LSB
|
||||
STY $9F21 ;Store Address MSB
|
||||
STA $9F22 ;Store Bank & Auto-Increment
|
||||
RTS
|
||||
|
||||
;setreg(addr) - Set Register
|
||||
;Args: A = Value to Write
|
||||
; Y,X = Address
|
||||
;Sets: TEMP0 = Value to Write
|
||||
;Affects: Y
|
||||
;Returns: A = Value Written
|
||||
; X = Current Data Port
|
||||
SETREG: STA TEMP0 ;Save Value to Write
|
||||
SETREH: LDA #$0F ;Set Bank, Auto-Increment
|
||||
|
||||
;setbyt(addr) - Write Byte to Vera Memory
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Uses: TEMP0 = Value to Write
|
||||
;Affects: Y
|
||||
;Returns: A = Value Written
|
||||
; X = Current Data Port
|
||||
SETBYT: JSR SETADR ;Set Vera Address
|
||||
LDA TEMP0 ;Retrieve Value to Write
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
STA $9F23,X ;Write Value to Data Port
|
||||
RTS
|
||||
|
||||
;setrei(addr) - Set Vera Register to Integer
|
||||
;Args: Y,X = Address
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETREI: LDA #$0F ;Set Bank to Registers
|
||||
|
||||
;setina(addr) - Write Integer to Vera Address
|
||||
;Args: A = Bank
|
||||
; Y,X = Address
|
||||
;Uses: TEMP1,TEMP2 = Integer Value
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETINA: ORA #$10 ;Set Auto-Increment to 1
|
||||
JSR SETADR ;Set Vera Address
|
||||
JSR RESRXY ;Restore Integer into Y,X
|
||||
|
||||
;setint(addr) - Write Integer to Vera Memory
|
||||
;Args: Y,X = Integer to Write
|
||||
;Requires: setadr();
|
||||
;Affects: A,Y
|
||||
;Returns: X = Current Data Port
|
||||
SETINT: TXA ;Copy LSB to Accumlator
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
STA $9F23,X ;Write to Data Port
|
||||
TYA ;Copy MSB to Accumlator
|
||||
STA $9F23,X ;Write to Data Port
|
||||
RTS
|
||||
|
||||
;setmem(count, &addr) - Write Array to Vera Memory
|
||||
;Args: A = Number of Bytes to Write
|
||||
; Y,X = Address of Array to Write From
|
||||
;Requires: setadr()
|
||||
;Sets: SRCLO,SRCHI = Address of Array
|
||||
; TEMP0 = Number of Bytes to Write
|
||||
;Affects: A
|
||||
;Returns: Y = Number of Bytes Written
|
||||
; X = Current Data Port
|
||||
SETMEM: STA TEMP0 ;Save Number of Bytes
|
||||
JSR SETSRC ;Save Destination Address
|
||||
LDX $9F25 ;Get Current Data Port
|
||||
LDY #0 ;Initialize Counter
|
||||
SETMEL: LDA (SRCLO),Y ;Read Byte from Array
|
||||
STA $9F23,X ;Write Byte to Data Port
|
||||
INY ;Increment Counter
|
||||
CPY TEMP0 ;If Limit Not Reached
|
||||
BNE SETMEL ; Loop
|
||||
RTS
|
||||
54
x16/include/veramem.h02
Normal file
54
x16/include/veramem.h02
Normal file
@ -0,0 +1,54 @@
|
||||
/*********************************************
|
||||
* veramem.h02 - Memory Access Functions for *
|
||||
* Commander X16 VERA Chip *
|
||||
*********************************************/
|
||||
|
||||
/* Get Vera Memory Address *
|
||||
* Returns: char bank - Address Bits 16-19 *
|
||||
* int addr - Address Bits 0-15 */
|
||||
char getadr();
|
||||
|
||||
/* Read Byte from Vera Memory *
|
||||
* Args: char bank - Address Bits 16-19 *
|
||||
* int addr - Address Bits 0-15 *
|
||||
* Returns: char byte - Contents of Memory */
|
||||
char getbyt();
|
||||
|
||||
/* Read Integer from Vera Memory *
|
||||
* Args: char bank - Address Bits 16-19 *
|
||||
* int addr - Address Bits 0-15 *
|
||||
* Returns: int byte - Contents of Memory */
|
||||
char getint();
|
||||
|
||||
/* Read from Vera Memory into Array *
|
||||
* Args: char opts - Bank | Auto-Increment *
|
||||
* int addr - Address Bits 0-15 *
|
||||
* Returns: char count - Bytes Written */
|
||||
char getmem();
|
||||
|
||||
/* Read Vera Internal Register Pair *
|
||||
* Args: int addr - Register Address *
|
||||
* Returns: char byte - Register LSB *
|
||||
* int word - Register Contents */
|
||||
char getrei();
|
||||
|
||||
/* Set Vera Memory Address *
|
||||
* Args: char opts - Bank | Auto-Increment *
|
||||
* int addr - Address *
|
||||
char setadr();
|
||||
|
||||
/* Write Byte to Vera Memory *
|
||||
* Args: char byte - Byte to Write *
|
||||
* Requires: setadr(bank,addr) */
|
||||
char setbyt();
|
||||
|
||||
/* Write Integer to Vera Memory *
|
||||
* Args: int word - Integer to Write *
|
||||
* Requires: setadr(bank,addr) */
|
||||
char setint();
|
||||
|
||||
/* Write from Array to Vera Memory *
|
||||
* Args: int word - Integer to Write *
|
||||
* Requires: setadr(bank,addr) *
|
||||
* Returns: char count - Bytes Written */
|
||||
char setmem();
|
||||
@ -1,5 +1,5 @@
|
||||
/*****************************************************
|
||||
* HELLO - Test/Demo program for C02 Standard Header *
|
||||
* TESTVERA *
|
||||
* Prints "HELLO WORLD" and exits *
|
||||
*****************************************************/
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
#include <stdiox.h02>
|
||||
#include <memory.h02>
|
||||
#include <nybble.h02>
|
||||
#include "include/veramem.h02"
|
||||
#include "include/vera.h02"
|
||||
|
||||
const char abcdef = {1,2,3,4,5,6};
|
||||
@ -59,13 +60,6 @@ void prtadr() {
|
||||
|
||||
void prtayx(aa,yy,xx) {prhex(aa); prhex(yy); prhex(xx); putspc(); putspc();}
|
||||
|
||||
void prthvs() {
|
||||
setdst(hstart);printf("HSTART=%w, "); //$0000
|
||||
setdst(hstop);printf("HSTOP=%w, "); //$0280 (640)
|
||||
setdst(vstart);printf("VSTART=%w, "); //$0000
|
||||
setdst(vstop);printf("VSTOP=%w%n"); //$01E0 (480)
|
||||
}
|
||||
|
||||
void prttmp() {
|
||||
printf(temp0, "TEMP0=$%h%n");
|
||||
printf(temp1, "TEMP1=$%h%n");
|
||||
@ -136,7 +130,7 @@ main:
|
||||
do {
|
||||
setscl(i,j);
|
||||
hscale,vscale = getscl();
|
||||
//prtscl();
|
||||
//prtscl;
|
||||
if (hscale<>i or vscale<>j) xerror("ERROR IN GETSCL()/SETSCL()");
|
||||
j<<;
|
||||
} while (j);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user