mirror of https://github.com/RevCurtisP/C02.git
141 lines
5.5 KiB
C
141 lines
5.5 KiB
C
/* Definitions for A02 Assembler */
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#define MAXSTR 128 //Maximum String Length
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#define MAXLBL 8 //Maximum Symbol Length
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#define MAXSYM 1024 //Maximum Number of Labels
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//#define NULL &0
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#define FALSE 0
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#define TRUE -1
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/* Address Mode Bit Masks */
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#define RGSTR 0x0000 //Register (Sweet 16)
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#define ACMLT 0x0001 //Accumulator [$xA]
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#define IMMDT 0x0002 //*Immediate [w/Acc]
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#define ZPAGE 0x0004 //Zero Page
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#define ZPAGX 0x0008 //*Zero Page,X
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#define RGIND 0x0010 //Register or Imderect (Sweet 16)
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#define ABSLT 0x0020 //Absolute
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#define ABSLX 0x0040 //*Absolute,X [fixops()]
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#define ABSLY 0x0080 //Absolute,Y
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#define IMPLD 0x0100 //*Implied [x0001]
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#define INDCT 0x0200 //(Indirect)
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#define INDCX 0x0400 //(Indirect,X)
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#define INDCY 0x0800 //(Indirect),Y
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#define RELTV 0x1000 //Relative
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char zpgabs[][9] = {"Absolute", "ZeroPage"};
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/* Address Mode Descriptions */
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struct amd {int amode; char desc[12];};
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struct amd amdesc[] = {
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{ACMLT, "Accumulator"},
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{IMMDT, "Immediate"},
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{ZPAGE, "Zero Page"},
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{ZPAGX, "Zero Page,X"},
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{ABSLT, "Absolute"},
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{RGSTR, "Register"},
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{ABSLX, "Absolute,X"},
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{ABSLY, "Absolute,Y"},
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{IMPLD, "Implied"},
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{INDCT, "(Indirect)"},
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{INDCX, "(Indirect,X)"},
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{INDCY, "(Indirect),Y"},
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{RELTV, "Relative"},
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{0, ""}
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};
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struct opc {char name[5], token; int amode;};
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struct opc psolst[] = {
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{"BYTE", 'B', 0}, {"HEX", 'H'}, {"WORD", 'W', 0}, {"EQU", '=', 0}, {"FILL", 'F', 0},
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{"INCL", 'I', 0}, {"SUBR", 'S', 0}, {"DC", 'B', 0}, {"DS", 'F', 0}, {"ALIG", 'A', 0},
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{"ORG", '*', 0}, {"PROC", 'P', 0}, {"END", 'E', 0}, {"ENDS", 'M', 0}, {"EXEC", 'X', 0},
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{"DW", 'W', 0}, {"", 0, 0}
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};
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struct opc opclst[] = {
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{"BRK", 0x00, 0x0100}, {"NOP", 0xEA, 0x0100}, {"STP", 0xDB, 0x0100}, {"WAI", 0xCB, 0x0100},
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{"DEX", 0xCA, 0x0100}, {"DEY", 0x88, 0x0100}, {"INX", 0xE8, 0x0100}, {"INY", 0xC8, 0x0100},
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{"PHA", 0x48, 0x0100}, {"PHP", 0x08, 0x0100}, {"PHX", 0xDA, 0x0100}, {"PHY", 0x5A, 0x0100},
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{"PLA", 0x68, 0x0100}, {"PLP", 0x28, 0x0100}, {"PLX", 0xFA, 0x0100}, {"PLY", 0x7A, 0x0100},
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{"CLC", 0x18, 0x0100}, {"CLD", 0xD8, 0x0100}, {"CLI", 0x58, 0x0100}, {"CLV", 0xB8, 0x0100},
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{"SEC", 0x38, 0x0100}, {"SED", 0xF8, 0x0100}, {"SEI", 0x78, 0x0100},
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{"TAX", 0xAA, 0x0100}, {"TAY", 0xA8, 0x0100}, {"TSX", 0xBA, 0x0100},
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{"TXA", 0x8A, 0x0100}, {"TYA", 0x98, 0x0100}, {"TXS", 0x9A, 0x0100},
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{"RTI", 0x40, 0x0100}, {"RTS", 0x60, 0x0100},
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{"BCS", 0xB0, 0x1000}, {"BEQ", 0xF0, 0x1000}, {"BMI", 0x30, 0x1000}, {"BVS", 0x70, 0x1000},
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{"BCC", 0x90, 0x1000}, {"BNE", 0xD0, 0x1000}, {"BPL", 0x10, 0x1000}, {"BVC", 0x50, 0x1000},
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{"BRA", 0x80, 0x1000},
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{"LDA", 0xA1, 0x0EFE}, {"ADC", 0x61, 0x0EFE}, {"AND", 0x21, 0x0EFE}, {"CMP", 0xC1, 0x0EFE},
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{"STA", 0x81, 0x0EFE}, {"SBC", 0xE1, 0x0EFE}, {"ORA", 0x01, 0x0EFE}, {"EOR", 0x41, 0x0EFE},
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{"ASL", 0x02, 0x007D}, {"ROL", 0x22, 0x007D}, {"INC", 0xE2, 0x007D}, {"LSR", 0x42, 0x007D},
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{"ROR", 0x62, 0x007D}, {"DEC", 0xC2, 0x007D},
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{"RMB0", 0x07, 0x0004}, {"RMB1", 0x17, 0x0004}, {"RMB2", 0x27, 0x0004}, {"RMB3", 0x37, 0x0004},
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{"RMB4", 0x47, 0x0004}, {"RMB5", 0x57, 0x0004}, {"RMB6", 0x67, 0x0004}, {"RMB7", 0x77, 0x0004},
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{"SMB0", 0x87, 0x0004}, {"SMB1", 0x97, 0x0004}, {"SMB2", 0xA7, 0x0004}, {"SMB3", 0xB7, 0x0004},
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{"SMB4", 0xC7, 0x0004}, {"SMB5", 0xD7, 0x0004}, {"SMB6", 0xE7, 0x0004}, {"SMB7", 0xF7, 0x0004},
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{"RMB", 0x07, 0x0004}, {"SMB", 0x87, 0x0004},
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{"BBR0", 0x0F, 0x1004}, {"BBR1", 0x1F, 0x1004}, {"BBR2", 0x2F, 0x1004}, {"BBR3", 0x3F, 0x1004},
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{"BBR4", 0x4F, 0x1004}, {"BBR5", 0x5F, 0x1004}, {"BBR6", 0x6F, 0x1004}, {"BBR7", 0x7F, 0x1004},
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{"BBS0", 0x8F, 0x1004}, {"BBS1", 0x9F, 0x1004}, {"BBS2", 0xAF, 0x1004}, {"BBS3", 0xBF, 0x1004},
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{"BBS4", 0xCF, 0x1004}, {"BBS5", 0xDF, 0x1004}, {"BBS6", 0xEF, 0x1004}, {"BBS7", 0xFF, 0x1004},
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{"BBR", 0x0F, 0x1004}, {"BBS", 0x8F, 0x1004},
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{"TRB", 0x10, 0x0024}, {"TSB", 0x00, 0x0024},
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{"CPX", 0xE0, 0x0026}, {"CPY", 0xC0, 0x0026},
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{"LDX", 0xA2, 0x00A6}, {"STX", 0x82, 0x00A6},
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{"BIT", 0x20, 0x006E},
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{"STZ", 0x60, 0x006C},
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{"JMP", 0x4C, 0x0620},
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{"JSR", 0x14, 0x0020},
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{"LDY", 0xA0, 0x006E},
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{"STY", 0x80, 0x002C},
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{"", 0, 0}
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};
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struct opf {unsigned char token, opmod, opcode;};
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struct opf opfix[] = {
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{0x20, 0x08, 0x89},
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{0xE0, 0x08, 0xE0},
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{0xC0, 0x08, 0xC0},
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{0xA0, 0x08, 0xA0},
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{0xA2, 0x08, 0xA2},
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{0xC2, 0x08, 0x3A},
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{0xE2, 0x08, 0x1A},
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{0x60, 0x0C, 0x9C},
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{0x60, 0x1C, 0x9E},
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{0xA2, 0x18, 0xBE},
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{0x82, 0x18, 0xBC},
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{0x4C, 0x0C, 0x4C},
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{0x4C, 0x11, 0x6C},
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{0x4C, 0x00, 0x7C},
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{0,0,0}
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};
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/* Sweet 16 Address Modes
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IMPLD - Implied (No Argument)
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RGSTR - Register
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INDCT - Register Indirect
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ABSLT - Register Absolute
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RKLTV - Relative (Branch)
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RGIND - Register or Indirect
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*/
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/* Sweet 16 OpCodes */
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struct opc swolst[] = {
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{"RTN", 0x00, IMPLD}, {"BR", 0x01, RELTV}, {"BNC", 0x02, RELTV}, {"BC", 0x03, RELTV},
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{"BP", 0x04, RELTV}, {"BM", 0x05, RELTV}, {"BZ", 0x06, RELTV}, {"BNZ", 0x07, RELTV},
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{"BM1", 0x08, RELTV}, {"BNM1", 0x09, RELTV}, {"BK", 0x0A, IMPLD}, {"RS", 0x0B, IMPLD},
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{"BS", 0x0C, RELTV}, {"SET", 0x10, ABSLT}, {"LD", 0x20, RGIND}, {"ST", 0x30, RGIND},
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{"LD", 0x40, INDCT}, {"ST", 0x50, INDCT}, {"LDD", 0x60, INDCT}, {"STD", 0x70, INDCT},
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{"POP", 0x80, INDCT}, {"STP", 0x90, INDCT}, {"ADD", 0xA0, RGSTR}, {"SUB", 0xB0, RGSTR},
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{"POPD", 0xC0, INDCT}, {"CPR", 0xD0, RGSTR}, {"INR", 0xE0, RGSTR}, {"DCR", 0xF0, RGSTR}
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};
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