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https://github.com/TomHarte/CLK.git
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951 lines
20 KiB
HTML
951 lines
20 KiB
HTML
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<!DOCTYPE html>
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<html>
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<head>
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<meta charset="UTF-8">
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<title>80386 Opcode Map</title>
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<style>
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table, table th, table td {
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border: 1px solid;
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border-collapse: collapse;
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text-align: center;
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}
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.codetable, .codetable th, .codetable td {
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border: 0px;
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border-collapse: collapse;
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padding-right: 1em;
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text-align: left;
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vertical-align: top;
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}
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.optable th, .optable td {
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width: 5em;
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}
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.optable tr:nth-child(even) {
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border-top: 3px solid;
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}
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.grouptable, .grouptable th, .grouptable td {
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border-bottom: 3px solid;
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}
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.grouptable th, .grouptable td {
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width: 4em;
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}
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.skiprow {
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background-color: darkgray;
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}
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</style>
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</head>
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<body>
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<h1>Codes for Addressing Method</h1>
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<table class="codetable">
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<tr>
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<td>A</td>
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<td>Direct address; the instruction has no MODRM field; the address of the operand is encoded in the instruction; no base register, index register, or scaling factor can be applied; e.g., far JMP (EA).</td>
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</tr>
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<tr>
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<td>C</td>
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<td>The reg field of the MODRM field selects a control register; e.g., MOV (0F20, 0F22).</td>
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</tr>
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<tr>
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<td>D</td>
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<td>The reg field of the MODRM field selects a debug register; e.g., MOV (0F21, 0F23).</td>
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</tr>
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<tr>
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<td>E</td>
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<td>A MODRM field follows the opcode and specifies the operand. The operand is either a general register or a memory address. If it is a memory address, the address is computed from a segment register and any of the following values: a base register, an index register, a scaling factor, a displacement.</td>
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</tr>
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<tr>
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<td>F</td>
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<td>Flags register</td>
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</tr>
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<tr>
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<td>G</td>
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<td>The reg field of the MODRM field selects a general register; e.g,. ADD (00).</td>
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</tr>
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<tr>
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<td>I</td>
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<td>Immediate data. The value of the operand is encoded in subsequent bytes of the instruction.</td>
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</tr>
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<tr>
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<td>J</td>
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<td>The instruction contains a relative offset to be added to the instruction-pointer register; e.g., JMP short, LOOP.</td>
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</tr>
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<tr>
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<td>M</td>
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<td>The MODRM field may refer only to memory; e.g., BOUND, LES, LDS, LSS, LFS, LGS.</td>
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</tr>
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<tr>
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<td>O</td>
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<td>The instruction has no MODRM field; the offset of the operand is coded as a word or dword (depending on address sie attribute) in the instruction. No base register, index register, or scaling factor can be applied; e.g., MOV (A0–A3).</td>
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</tr>
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<tr>
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<td>R</td>
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<td>The mod field of the MODRM field may refer only to a general register; e.g., MOV(0F20–0F24, 0F26).</td>
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</tr>
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<tr>
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<td>S</td>
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<td>The reg field of the MODRM field selects a segment register; e.g., MOV (8C, 8E).</td>
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</tr>
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<tr>
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<td>T</td>
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<td>The reg field of the MODRM field selects a test register; e.g., MOV (0F24, 0F26).</td>
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</tr>
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<tr>
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<td>X</td>
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<td>Memory addressed by DS:SI; e.g., MOVS, COMPS, OUTS, LODS, SCAS.</td>
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</tr>
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<tr>
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<td>Y</td>
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<td>Memory addressed by ES:DI; e.g., MOVS, CMPS, INS, STOS.</td>
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</tr>
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</table>
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<h1>Codes for Operand Type</h1>
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<table class="codetable">
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<tr>
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<td>a</td>
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<td>Two one-word operands in memory or two dword operands in memory, depending on operand size attribute (used only by BOUND).</td>
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</tr>
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<tr>
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<td>b</td>
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<td>Byte (regardless of operand size attribute).</td>
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</tr>
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<tr>
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<td>c</td>
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<td>Byte or word, depending on operand size attribute.</td>
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</tr>
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<tr>
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<td>d</td>
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<td>Dword (regardless of operand size attribute).</td>
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</tr>
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<tr>
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<td>p</td>
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<td>32-bit or 48-bit pointer, depending on operand size attribute.</td>
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</tr>
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<tr>
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<td>s</td>
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<td>Six-byte pesudo-descriptor.</td>
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</tr>
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<tr>
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<td>v</td>
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<td>Word or dword, depending on operand size attribute.</td>
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</tr>
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<tr>
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<td>w</td>
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<td>Word (regardless of operand size attribute).</td>
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</tr>
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</table>
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<h1>Register Codes</h1>
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When an operand is a specific register encoded in the opcode, the register is identifed by its name; e.g., AX, CL, or ESI. The name of the register indicates whether the register is 32, 16, or 8 bits wide. A register identifier of the form eXX is used when the width of the register depends on the operand size attribute. For example, eAX indicates that the AX register is used when the operand size attribute is 16, and the EAX register is used when the operand size attribute is 32.
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<h1>One-byte 80386 Opcode Map</h1>
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<table class="optable">
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<tr>
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<th></th>
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<th>0</th>
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<th>1</th>
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<th>2</th>
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<th>3</th>
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<th>4</th>
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<th>5</th>
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<th>6</th>
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<th>7</th>
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<th>8</th>
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<th>9</th>
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<th>A</th>
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<th>B</th>
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<th>C</th>
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<th>D</th>
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<th>E</th>
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<th>F</th>
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</tr>
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<tr>
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<th rowspan=2>0</th>
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<td colspan=6>ADD</td>
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<td rowspan=2>PUSH ES</td>
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<td rowspan=2>POP ES</td>
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<td colspan=6>OR</td>
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<td rowspan=2>PUSH CS</td>
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<td rowspan=2>2-byte escape codes</td>
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</tr>
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<tr>
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<!-- ADD -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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<!-- OR -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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</tr>
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<tr>
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<th rowspan=2>1</th>
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<td colspan=6>ADC</td>
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<td rowspan=2>PUSH SS</td>
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<td rowspan=2>POP SS</td>
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<td colspan=6>SBB</td>
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<td rowspan=2>PUSH DS</td>
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<td rowspan=2>POP DS</td>
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</tr>
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<tr>
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<!-- ADC -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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<!-- SBB -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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</tr>
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<tr>
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<th rowspan=2>2</th>
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<td colspan=6>AND</td>
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<td rowspan=2>SEG =ES</td>
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<td rowspan=2>POP ES</td>
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<td colspan=6>SUB</td>
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<td rowspan=2>SEG =CS</td>
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<td rowspan=2>DAS</td>
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</tr>
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<tr>
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<!-- AND -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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<!-- SUB -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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</tr>
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<tr>
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<th rowspan=2>3</th>
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<td colspan=6>XOR</td>
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<td rowspan=2>SEG =SS</td>
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<td rowspan=2>AAA</td>
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<td colspan=6>CMP</td>
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<td rowspan=2>SEG =DS</td>
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<td rowspan=2>AAS</td>
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</tr>
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<tr>
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<!-- XOR -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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<!-- CMP -->
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<td>Eb, Gb</td>
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<td>Ev, Gv</td>
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<td>Gb, Eb</td>
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<td>Gv, Ev</td>
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<td>AL, Ib</td>
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<td>eAX, Iv</td>
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</tr>
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<tr>
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<th rowspan=2>4</th>
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<td colspan=8>INC general register</td>
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<td colspan=8>DEC general register</td>
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</tr>
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<tr>
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<!-- INC general register -->
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<td>eAX</td>
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<td>eCX</td>
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<td>eDX</td>
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<td>eBX</td>
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<td>eSP</td>
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<td>eBP</td>
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<td>eSI</td>
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<td>eDI</td>
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<!-- DEC general register -->
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<td>eAX</td>
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<td>eCX</td>
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<td>eDX</td>
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<td>eBX</td>
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<td>eSP</td>
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<td>eBP</td>
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<td>eSI</td>
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<td>eDI</td>
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</tr>
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<tr>
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<th rowspan=2>5</th>
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<td colspan=8>PUSH general register</td>
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<td colspan=8>POP general register</td>
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</tr>
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<tr>
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<!-- PUSH general register -->
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<td>eAX</td>
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<td>eCX</td>
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<td>eDX</td>
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<td>eBX</td>
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<td>eSP</td>
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<td>eBP</td>
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<td>eSI</td>
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<td>eDI</td>
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<!-- POP general register -->
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<td>eAX</td>
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<td>eCX</td>
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<td>eDX</td>
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<td>eBX</td>
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<td>eSP</td>
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<td>eBP</td>
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<td>eSI</td>
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<td>eDI</td>
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</tr>
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<tr>
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<th rowspan=2>6</th>
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<td rowspan=2>PUSHA</td>
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<td rowspan=2>POPA</td>
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<td rowspan=2>BOUND Gv, Ma</td>
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<td rowspan=2>ARPL Gv, Ma</td>
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<td rowspan=2>SEG =FS</td>
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<td rowspan=2>SEG =GS</td>
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<td rowspan=2>Operand Size</td>
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<td rowspan=2>Address Size</td>
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<td rowspan=2>PUSH Iv</td>
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<td rowspan=2>IMUL GvEvIv</td>
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<td rowspan=2>PUSH Ib</td>
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<td rowspan=2>IMUL GvEvIb</td>
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<td rowspan=2>INSB Yb, Dx</td>
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<td rowspan=2>INSW/D Yv, Dx</td>
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<td rowspan=2>OUTSB Dx, Xb</td>
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<td rowspan=2>OUTSW/D Dx, Xb</td>
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</tr>
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<tr></tr>
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<tr>
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<th rowspan=2>7</th>
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<td colspan=16>Short-displacement jump on condition (Jb)</td>
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</tr>
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<tr>
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<!-- Short-displacement jump on condition (Jb) -->
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<td>JO</td>
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<td>JNO</td>
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<td>JB</td>
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<td>JNB</td>
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<td>JZ</td>
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<td>JNZ</td>
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<td>JBE</td>
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<td>JNBE</td>
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<td>JS</td>
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<td>JNS</td>
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<td>JP</td>
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<td>JNP</td>
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<td>JP</td>
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<td>JNL</td>
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<td>JLE</td>
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<td>JNLE</td>
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</tr>
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<tr>
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<th rowspan=2>8</th>
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<td colspan=2>Immediate Grp1</td>
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<td rowspan=2></td>
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<td rowspan=2>Grp1 Ev, Ib</td>
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<td colspan=2>TEST</td>
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<td colspan=2>XCHG</td>
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<td colspan=4>MOV</td>
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<td rowspan=2>MOV Ew, Sw</td>
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<td rowspan=2>LEA Gv, M</td>
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<td rowspan=2>MOV Sw, Ew</td>
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<td rowspan=2>POP Ev</td>
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</tr>
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<tr>
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<!-- Immediate Grp1 -->
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<td>Eb, Ib</td>
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<td>Ev, Iv</td>
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<!-- TEST -->
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|
<td>Eb, Gb</td>
|
|||
|
<td>Ev, Gv</td>
|
|||
|
|
|||
|
<!-- XCHG -->
|
|||
|
<td>Eb, Gb</td>
|
|||
|
<td>Ev, Gv</td>
|
|||
|
|
|||
|
<!-- MOV -->
|
|||
|
<td>Eb, Gb</td>
|
|||
|
<td>Ev, Gv</td>
|
|||
|
<td>Gb, Eb</td>
|
|||
|
<td>Gv, Ev</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>9</th>
|
|||
|
|
|||
|
<td rowspan=2>NOP</td>
|
|||
|
<td colspan=7>XCHG word or double-word register with eAX</td>
|
|||
|
<td rowspan=2>CBW</td>
|
|||
|
<td rowspan=2>CWD</td>
|
|||
|
<td rowspan=2>CALL Ap</td>
|
|||
|
<td rowspan=2>WAIT</td>
|
|||
|
<td rowspan=2>PUSHF Fv</td>
|
|||
|
<td rowspan=2>POPF Fv</td>
|
|||
|
<td rowspan=2>SAHF</td>
|
|||
|
<td rowspan=2>LAHF</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- XCHG -->
|
|||
|
<td>eCX</td>
|
|||
|
<td>eDX</td>
|
|||
|
<td>eBX</td>
|
|||
|
<td>eSP</td>
|
|||
|
<td>eBP</td>
|
|||
|
<td>eSI</td>
|
|||
|
<td>eDI</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>A</th>
|
|||
|
|
|||
|
<td colspan=4>MOV</td>
|
|||
|
<td rowspan=2>MOVSB Xb, Yv</td>
|
|||
|
<td rowspan=2>MOVSW/D Xv, Yv</td>
|
|||
|
<td rowspan=2>CMPSB Xb, Yb</td>
|
|||
|
<td rowspan=2>CMPSW/D Xv, Yv</td>
|
|||
|
<td colspan=2>TEST</td>
|
|||
|
<td rowspan=2>STOSB Yb, AL</td>
|
|||
|
<td rowspan=2>STOSW/D Yv, eAX</td>
|
|||
|
<td rowspan=2>LDSB AL, Xb</td>
|
|||
|
<td rowspan=2>LDSW/D eAX, Yv</td>
|
|||
|
<td rowspan=2>SCASB AL, Xb</td>
|
|||
|
<td rowspan=2>SCASW/D eAX, Xv</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- MOV -->
|
|||
|
<td>AL, Ob</td>
|
|||
|
<td>eAX, Ov</td>
|
|||
|
<td>Ob, AL</td>
|
|||
|
<td>Ov, eAX</td>
|
|||
|
|
|||
|
<!-- TEST -->
|
|||
|
<td>AL, Ib</td>
|
|||
|
<td>eAX, Iv</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>B</th>
|
|||
|
|
|||
|
<td colspan=8>MOV immediate byte into byte register</td>
|
|||
|
<td colspan=8>MOV immediate word or double into word or double register</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<td>AL</td>
|
|||
|
<td>CL</td>
|
|||
|
<td>DL</td>
|
|||
|
<td>BL</td>
|
|||
|
<td>AH</td>
|
|||
|
<td>CH</td>
|
|||
|
<td>DH</td>
|
|||
|
<td>BH</td>
|
|||
|
|
|||
|
<td>eAX</td>
|
|||
|
<td>eCX</td>
|
|||
|
<td>eDX</td>
|
|||
|
<td>eBX</td>
|
|||
|
<td>eSP</td>
|
|||
|
<td>eBP</td>
|
|||
|
<td>eSI</td>
|
|||
|
<td>eDI</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>C</th>
|
|||
|
|
|||
|
<td colspan=2>Shift Grp2</td>
|
|||
|
<td colspan=2>RET near</td>
|
|||
|
<td rowspan=2>LES Gv, Mp</td>
|
|||
|
<td rowspan=2>LDS Gv, Mp</td>
|
|||
|
<td colspan=2>MOV</td>
|
|||
|
<td rowspan=2>ENTER</td>
|
|||
|
<td rowspan=2>LEAVE</td>
|
|||
|
<td colspan=2>RET far</td>
|
|||
|
<td rowspan=2>INT 3</td>
|
|||
|
<td rowspan=2>INT Ib</td>
|
|||
|
<td rowspan=2>INTO</td>
|
|||
|
<td rowspan=2>IRET</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<td>Eb, Ib</td>
|
|||
|
<td>Ev, Iv</td>
|
|||
|
<td>Iw</td>
|
|||
|
<td></td>
|
|||
|
<td>Eb, Ib</td>
|
|||
|
<td>Ev, Iv</td>
|
|||
|
<td>Iw</td>
|
|||
|
<td></td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>D</th>
|
|||
|
|
|||
|
<td colspan=4>Shift Grp2</td>
|
|||
|
<td rowspan=2>AAM</td>
|
|||
|
<td rowspan=2>AAD</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>XLAT</td>
|
|||
|
<td colspan=8 rowspan=2>ESC (Escape to coprocessor instruction set)</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<td>Eb, 1</td>
|
|||
|
<td>Ev, 1</td>
|
|||
|
<td>Eb, CL</td>
|
|||
|
<td>Ev, CL</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>E</th>
|
|||
|
|
|||
|
<td rowspan=2>LOOPNE Jb</td>
|
|||
|
<td rowspan=2>LOOPE Jb</td>
|
|||
|
<td rowspan=2>LOOP Jb</td>
|
|||
|
<td rowspan=2>JCXZ Jb</td>
|
|||
|
<td colspan=2>IN</td>
|
|||
|
<td colspan=2>OUT</td>
|
|||
|
<td rowspan=2>CALL Av</td>
|
|||
|
<td colspan=3>JMP</td>
|
|||
|
<td colspan=2>IN</td>
|
|||
|
<td colspan=2>OUT</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- IN -->
|
|||
|
<td>AL, Ib</td>
|
|||
|
<td>eAX, Ib</td>
|
|||
|
|
|||
|
<!-- OUT -->
|
|||
|
<td>Ib, AL</td>
|
|||
|
<td>Ib, eAX</td>
|
|||
|
|
|||
|
<!-- JMP -->
|
|||
|
<td>Jv</td>
|
|||
|
<td>Ap</td>
|
|||
|
<td>Jb</td>
|
|||
|
|
|||
|
<!-- IN -->
|
|||
|
<td>AL, DX</td>
|
|||
|
<td>eAX, DX</td>
|
|||
|
|
|||
|
<!-- OUT -->
|
|||
|
<td>DX, AL</td>
|
|||
|
<td>DX, eAX</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>F</th>
|
|||
|
|
|||
|
<td rowspan=2>LOCK</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>REPNE</td>
|
|||
|
<td rowspan=2>REP / REPE</td>
|
|||
|
<td rowspan=2>HLT</td>
|
|||
|
<td rowspan=2>CMC</td>
|
|||
|
<td colspan=2>Unary Grp3</td>
|
|||
|
<td rowspan=2>CLC</td>
|
|||
|
<td rowspan=2>STC</td>
|
|||
|
<td rowspan=2>CLI</td>
|
|||
|
<td rowspan=2>STI</td>
|
|||
|
<td rowspan=2>CLD</td>
|
|||
|
<td rowspan=2>STD</td>
|
|||
|
<td rowspan=2>INC/DEC Grp4</td>
|
|||
|
<td rowspan=2>Indirect Grp5</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- Unary Grp3 -->
|
|||
|
<td>Eb</td>
|
|||
|
<td>Ev</td>
|
|||
|
</tr>
|
|||
|
</table>
|
|||
|
|
|||
|
<h1>Two-Byte 80386 Opcode Map (First byte is 0FH)</h1>
|
|||
|
<table class="optable">
|
|||
|
<tr>
|
|||
|
<th></th>
|
|||
|
<th>0</th>
|
|||
|
<th>1</th>
|
|||
|
<th>2</th>
|
|||
|
<th>3</th>
|
|||
|
<th>4</th>
|
|||
|
<th>5</th>
|
|||
|
<th>6</th>
|
|||
|
<th>7</th>
|
|||
|
<th>8</th>
|
|||
|
<th>9</th>
|
|||
|
<th>A</th>
|
|||
|
<th>B</th>
|
|||
|
<th>C</th>
|
|||
|
<th>D</th>
|
|||
|
<th>E</th>
|
|||
|
<th>F</th>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>0</th>
|
|||
|
|
|||
|
<td rowspan=2>Grp6</td>
|
|||
|
<td rowspan=2>Grp7</td>
|
|||
|
<td rowspan=2>LAR Gv, Ew</td>
|
|||
|
<td rowspan=2>LSL Gv, Ew</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>CLTS</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>1</th>
|
|||
|
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>2</th>
|
|||
|
|
|||
|
<td rowspan=2>MOV Cr, Rd</td>
|
|||
|
<td rowspan=2>MOV Dd, Rd</td>
|
|||
|
<td rowspan=2>MOV Rd, Cd</td>
|
|||
|
<td rowspan=2>MOV Rd, Dd</td>
|
|||
|
<td rowspan=2>MOV Td, Rd</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>MOV Rd, Td</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
<tr class="skiprow">
|
|||
|
<th rowspan=2>≈</th>
|
|||
|
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>8</th>
|
|||
|
|
|||
|
<td colspan=16>Long-displacement jump on condition (Jv)</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- Long-displacement jump on condition (Jv) -->
|
|||
|
<td>JO</td>
|
|||
|
<td>JNO</td>
|
|||
|
<td>JB</td>
|
|||
|
<td>JNB</td>
|
|||
|
<td>JZ</td>
|
|||
|
<td>JNZ</td>
|
|||
|
<td>JBE</td>
|
|||
|
<td>JNBE</td>
|
|||
|
<td>JS</td>
|
|||
|
<td>JNS</td>
|
|||
|
<td>JP</td>
|
|||
|
<td>JNP</td>
|
|||
|
<td>JP</td>
|
|||
|
<td>JNL</td>
|
|||
|
<td>JLE</td>
|
|||
|
<td>JNLE</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>9</th>
|
|||
|
|
|||
|
<td colspan=8>Byte set on condition (Eb)</td>
|
|||
|
<td rowspan=2>SETS</td>
|
|||
|
<td rowspan=2>SETNS</td>
|
|||
|
<td rowspan=2>SETP</td>
|
|||
|
<td rowspan=2>SETNP</td>
|
|||
|
<td rowspan=2>SETL</td>
|
|||
|
<td rowspan=2>SETNL</td>
|
|||
|
<td rowspan=2>SETLE</td>
|
|||
|
<td rowspan=2>SETNLE</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- Byte set on condition (Eb) -->
|
|||
|
<td>SETO</td>
|
|||
|
<td>SETNO</td>
|
|||
|
<td>SETB</td>
|
|||
|
<td>SETNB</td>
|
|||
|
<td>SETZ</td>
|
|||
|
<td>SETNZ</td>
|
|||
|
<td>SETBE</td>
|
|||
|
<td>SETNBE</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>A</th>
|
|||
|
|
|||
|
<td rowspan=2>PUSH FS</td>
|
|||
|
<td rowspan=2>POP FS</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>BT Ev, Gv</td>
|
|||
|
<td rowspan=2>SHLD EvGvIb</td>
|
|||
|
<td rowspan=2>SHLD EvGcCL</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>PUSH GS</td>
|
|||
|
<td rowspan=2>POP GS</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>BTS Ev, Gv</td>
|
|||
|
<td rowspan=2>SHRD EvGvIb</td>
|
|||
|
<td rowspan=2>SHRD EvGvCL</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>IMUL Gv, Ev</td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>B</th>
|
|||
|
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>LSS Mp</td>
|
|||
|
<td rowspan=2>BTR Ev, Gv</td>
|
|||
|
<td rowspan=2>LFS Mp</td>
|
|||
|
<td rowspan=2>LGS Mp</td>
|
|||
|
<td colspan=2>MOVZX</td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2>Grp8 Ev, Ib</td>
|
|||
|
<td rowspan=2>BTC Ev, Gv</td>
|
|||
|
<td rowspan=2>BSF Gv, Ev</td>
|
|||
|
<td rowspan=2>BSR Gv, Ev</td>
|
|||
|
<td colspan=2>MOVSX</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<!-- MOVZX -->
|
|||
|
<td>Gv, Eb</td>
|
|||
|
<td>Gv, Ew</td>
|
|||
|
|
|||
|
<!-- MOVSX -->
|
|||
|
<td>Gv, Eb</td>
|
|||
|
<td>Gv, Ew</td>
|
|||
|
</tr>
|
|||
|
<tr class="skiprow">
|
|||
|
<th rowspan=2>≈</th>
|
|||
|
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
<td rowspan=2>≈</td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
<tr>
|
|||
|
<th rowspan=2>F</th>
|
|||
|
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
<td rowspan=2></td>
|
|||
|
</tr>
|
|||
|
<tr></tr>
|
|||
|
</table>
|
|||
|
<h1>Opcodes Determined by Bits 5, 4, 3 of MODRM Field</h1>
|
|||
|
<table>
|
|||
|
<tr>
|
|||
|
<td>mod</td>
|
|||
|
<td>nnn</td>
|
|||
|
<td>R/M</td>
|
|||
|
</tr>
|
|||
|
</table>
|
|||
|
<br />
|
|||
|
<table class="grouptable">
|
|||
|
<tr>
|
|||
|
<th></th>
|
|||
|
<th>000</th>
|
|||
|
<th>001</th>
|
|||
|
<th>010</th>
|
|||
|
<th>011</th>
|
|||
|
<th>100</th>
|
|||
|
<th>101</th>
|
|||
|
<th>110</th>
|
|||
|
<th>111</th>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 1</th>
|
|||
|
|
|||
|
<td>ADD</td>
|
|||
|
<td>OR</td>
|
|||
|
<td>ADC</td>
|
|||
|
<td>SBB</td>
|
|||
|
<td>AND</td>
|
|||
|
<td>SUB</td>
|
|||
|
<td>XOR</td>
|
|||
|
<td>CMP</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 2</th>
|
|||
|
|
|||
|
<td>ROL</td>
|
|||
|
<td>ROR</td>
|
|||
|
<td>RCL</td>
|
|||
|
<td>RCR</td>
|
|||
|
<td>SHL</td>
|
|||
|
<td>SHR</td>
|
|||
|
<td></td>
|
|||
|
<td>SAR</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 3</th>
|
|||
|
|
|||
|
<td>TEST Ib/Iv</td>
|
|||
|
<td></td>
|
|||
|
<td>NOT</td>
|
|||
|
<td>NEG</td>
|
|||
|
<td>MUL AL/eAX</td>
|
|||
|
<td>IMUL AL/EAX</td>
|
|||
|
<td>DIV AL/eAX</td>
|
|||
|
<td>IDIV AL/eAX</td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 4</th>
|
|||
|
|
|||
|
<td>INC Eb</td>
|
|||
|
<td>DEC Eb</td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 5</th>
|
|||
|
|
|||
|
<td>INC Ev</td>
|
|||
|
<td>DEC Ev</td>
|
|||
|
<td>CALL Ev</td>
|
|||
|
<td>CALL Ep</td>
|
|||
|
<td>JMP Ev</td>
|
|||
|
<td>JMP Ep</td>
|
|||
|
<td>PUSH Ev</td>
|
|||
|
<td></td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 6</th>
|
|||
|
|
|||
|
<td>SLDT Ew</td>
|
|||
|
<td>STR Ew</td>
|
|||
|
<td>LLDT Ew</td>
|
|||
|
<td>LTR Ew</td>
|
|||
|
<td>VERR Ew</td>
|
|||
|
<td>VERW Ew</td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 7</th>
|
|||
|
|
|||
|
<td>SGDT Ms</td>
|
|||
|
<td>SIDT Ms</td>
|
|||
|
<td>LGDT Ms</td>
|
|||
|
<td>LIDT Ms</td>
|
|||
|
<td></td>
|
|||
|
<td>LMSW Ew</td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
</tr>
|
|||
|
<tr>
|
|||
|
<th>Group 6</th>
|
|||
|
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td></td>
|
|||
|
<td>BT</td>
|
|||
|
<td>BTS</td>
|
|||
|
<td>BTR</td>
|
|||
|
<td>BTC</td>
|
|||
|
</tr>
|
|||
|
</table>
|
|||
|
</body>
|
|||
|
</html>
|