2019-03-09 05:00:23 +00:00
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//
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// 68000Storage.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 08/03/2019.
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// Copyright © 2019 Thomas Harte. All rights reserved.
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//
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#include "../68000.hpp"
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using namespace CPU::MC68000;
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ProcessorStorage::ProcessorStorage() {
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2019-03-12 02:47:58 +00:00
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// Create the reset program.
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2019-03-10 21:27:34 +00:00
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reset_program_ = assemble_program("n- n- n- n- n- nn nF nf nV nv np np");
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2019-03-12 02:47:58 +00:00
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// TODO: install access patterns.
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// Install operations.
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for(int c = 0; c < 65536; ++c) {
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install_instruction(c);
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}
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2019-03-10 21:27:34 +00:00
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// Set initial state. Largely TODO.
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active_program_ = reset_program_.data();
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effective_address_ = 0;
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2019-03-10 21:42:13 +00:00
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is_supervisor_ = 1;
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2019-03-09 05:00:23 +00:00
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}
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2019-03-10 21:27:34 +00:00
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// TODO: allow actions to be specified, of course.
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2019-03-09 05:00:23 +00:00
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std::vector<ProcessorStorage::Step> ProcessorStorage::assemble_program(const char *access_pattern) {
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std::vector<Step> steps;
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// Parse the access pattern to build microcycles.
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while(*access_pattern) {
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Step step;
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switch(*access_pattern) {
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2019-03-10 21:27:34 +00:00
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case '\t': case ' ': // White space acts as a no-op; it's for clarity only.
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++access_pattern;
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2019-03-09 05:00:23 +00:00
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break;
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2019-03-10 21:27:34 +00:00
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case 'n': // This might be a plain NOP cycle, in which some internal calculation occurs,
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// or it might pair off with something afterwards.
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switch(access_pattern[1]) {
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default: // This is probably a pure NOP; if what comes after this 'n' isn't actually
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// valid, it should be caught in the outer switch the next time around the loop.
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steps.push_back(step);
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++access_pattern;
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break;
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case '-': // This is two NOPs in a row.
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steps.push_back(step);
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steps.push_back(step);
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access_pattern += 2;
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break;
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case 'F': // Fetch SSP MSW.
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case 'f': // Fetch SSP LSW.
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step.microcycle.length = HalfCycles(5);
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2019-03-10 21:42:13 +00:00
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step.microcycle.operation = Microcycle::Address | Microcycle::ReadWrite | Microcycle::IsProgram; // IsProgram is a guess.
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2019-03-10 21:27:34 +00:00
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step.microcycle.address = &effective_address_;
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step.microcycle.value = isupper(access_pattern[1]) ? &stack_pointers_[1].halves.high : &stack_pointers_[1].halves.low;
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steps.push_back(step);
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step.microcycle.length = HalfCycles(3);
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step.microcycle.operation |= Microcycle::LowerData | Microcycle::UpperData;
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step.action = Step::Action::IncrementEffectiveAddress;
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steps.push_back(step);
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access_pattern += 2;
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break;
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case 'V': // Fetch exception vector low.
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case 'v': // Fetch exception vector high.
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step.microcycle.length = HalfCycles(5);
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step.microcycle.operation = Microcycle::Address | Microcycle::ReadWrite | Microcycle::IsProgram; // IsProgram is a guess.
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step.microcycle.address = &effective_address_;
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step.microcycle.value = isupper(access_pattern[1]) ? &program_counter_.halves.high : &program_counter_.halves.low;
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steps.push_back(step);
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step.microcycle.length = HalfCycles(3);
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step.microcycle.operation |= Microcycle::LowerData | Microcycle::UpperData;
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step.action = Step::Action::IncrementEffectiveAddress;
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steps.push_back(step);
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access_pattern += 2;
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break;
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case 'p': // Fetch from the program counter into the prefetch queue.
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step.microcycle.length = HalfCycles(5);
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step.microcycle.operation = Microcycle::Address | Microcycle::ReadWrite | Microcycle::IsProgram;
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step.microcycle.address = &program_counter_.full;
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step.microcycle.value = &prefetch_queue_[1];
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step.action = Step::Action::AdvancePrefetch;
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steps.push_back(step);
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step.microcycle.length = HalfCycles(3);
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step.microcycle.operation |= Microcycle::LowerData | Microcycle::UpperData;
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step.action = Step::Action::IncrementProgramCounter;
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steps.push_back(step);
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access_pattern += 2;
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break;
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}
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2019-03-09 05:00:23 +00:00
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break;
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2019-03-10 21:27:34 +00:00
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default:
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std::cerr << "MC68000 program builder; Unknown access type " << *access_pattern << std::endl;
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assert(false);
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2019-03-09 05:00:23 +00:00
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}
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}
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2019-03-10 21:27:34 +00:00
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// Add a final 'ScheduleNextProgram' sentinel.
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Step end_program;
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end_program.action = Step::Action::ScheduleNextProgram;
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steps.push_back(end_program);
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2019-03-09 05:00:23 +00:00
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return steps;
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}
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2019-03-12 02:47:58 +00:00
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/*
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install_instruction acts, in effect, in the manner of a disassembler. So this class is
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formulated to run through all potential 65536 instuction encodings and attempt to
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disassemble each, rather than going in the opposite direction.
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This has two benefits:
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(i) which addressing modes go with which instructions falls out automatically;
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(ii) it is a lot easier during the manual verification stage of development to work
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from known instructions to their disassembly rather than vice versa; especially
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(iii) given that there are plentiful disassemblers against which to test work in progress.
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*/
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void ProcessorStorage::install_instruction(int instruction) {
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enum class Operation {
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ABCD, ADD, ADDA, ADDI, ADDQ, ADDX, AND, ANDI,
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ASL, ASLrmw, ASR, ASRrmw, Bcc,
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TODO
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};
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struct PatternMapping {
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uint16_t mask, value;
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Operation operation;
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};
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/*
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Credit here is due to 'wrm' (https://github.com/wrm-za I assume) for his public
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domain 68000 disassembler, from which the table below was largely sourced.
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Manual legwork has been extended to check this table against the M68000
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Programmer's Reference Manual, currently available at
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https://www.nxp.com/files-static/archives/doc/ref_manual/M68000PRM.pdf
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*/
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const std::vector<PatternMapping> mappings = {
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{0xf1f0, 0xc100, Operation::ABCD}, {0xf000, 0xd000, Operation::ADD},
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{0xf0c0, 0xd0c0, Operation::ADDA}, {0xff00, 0x0600, Operation::ADDI},
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{0xf100, 0x5000, Operation::ADDQ}, {0xf130, 0xd100, Operation::ADDX},
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{0xf000, 0xc000, Operation::AND}, {0xff00, 0x0200, Operation::ANDI},
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{0xf118, 0xe100, Operation::ASL}, {0xffc0, 0xe1c0, Operation::ASLrmw},
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{0xf118, 0xe000, Operation::ASR}, {0xffc0, 0xe0c0, Operation::ASRrmw},
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{0xf000, 0x6000, Operation::Bcc}, {0xf1c0, 0x0140, Operation::TODO},
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{0xffc0, 0x0840, Operation::TODO}, {0xf1c0, 0x0180, Operation::TODO},
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{0xffc0, 0x0880, Operation::TODO}, {0xf1c0, 0x01c0, Operation::TODO},
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{0xffc0, 0x08c0, Operation::TODO}, {0xf1c0, 0x0100, Operation::TODO},
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{0xffc0, 0x0800, Operation::TODO}, {0xf1c0, 0x4180, Operation::TODO},
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{0xff00, 0x4200, Operation::TODO}, {0xf100, 0xb000, Operation::TODO},
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{0xf0c0, 0xb0c0, Operation::TODO}, {0xff00, 0x0c00, Operation::TODO},
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{0xf138, 0xb108, Operation::TODO}, {0xf0f8, 0x50c8, Operation::TODO},
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{0xf1c0, 0x81c0, Operation::TODO}, {0xf1c0, 0x80c0, Operation::TODO},
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{0xf100, 0xb100, Operation::TODO}, {0xff00, 0x0a00, Operation::TODO},
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{0xf100, 0xc100, Operation::TODO}, {0xffb8, 0x4880, Operation::TODO},
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{0xffc0, 0x4ec0, Operation::TODO}, {0xffc0, 0x4e80, Operation::TODO},
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{0xf1c0, 0x41c0, Operation::TODO}, {0xfff8, 0x4e50, Operation::TODO},
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{0xf118, 0xe108, Operation::TODO}, {0xffc0, 0xe3c0, Operation::TODO},
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{0xf118, 0xe008, Operation::TODO}, {0xffc0, 0xe2c0, Operation::TODO},
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{0xc000, 0x0000, Operation::TODO}, {0xffc0, 0x44c0, Operation::TODO},
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{0xffc0, 0x46c0, Operation::TODO}, {0xffc0, 0x40c0, Operation::TODO},
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{0xfff0, 0x4e60, Operation::TODO}, {0xc1c0, 0x0040, Operation::TODO},
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{0xfb80, 0x4880, Operation::TODO}, {0xf138, 0x0108, Operation::TODO},
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{0xf100, 0x7000, Operation::TODO}, {0xf1c0, 0xc1c0, Operation::TODO},
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{0xf1c0, 0xc0c0, Operation::TODO}, {0xffc0, 0x4800, Operation::TODO},
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{0xff00, 0x4400, Operation::TODO}, {0xff00, 0x4000, Operation::TODO},
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{0xffff, 0x4e71, Operation::TODO}, {0xff00, 0x4600, Operation::TODO},
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{0xf000, 0x8000, Operation::TODO}, {0xff00, 0x0000, Operation::TODO},
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{0xffc0, 0x4840, Operation::TODO}, {0xffff, 0x4e70, Operation::TODO},
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{0xf118, 0xe118, Operation::TODO}, {0xffc0, 0xe7c0, Operation::TODO},
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{0xf118, 0xe018, Operation::TODO}, {0xffc0, 0xe6c0, Operation::TODO},
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{0xf118, 0xe110, Operation::TODO}, {0xffc0, 0xe5c0, Operation::TODO},
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{0xf118, 0xe010, Operation::TODO}, {0xffc0, 0xe4c0, Operation::TODO},
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{0xffff, 0x4e73, Operation::TODO}, {0xffff, 0x4e77, Operation::TODO},
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{0xffff, 0x4e75, Operation::TODO}, {0xf1f0, 0x8100, Operation::TODO},
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{0xf0c0, 0x50c0, Operation::TODO}, {0xffff, 0x4e72, Operation::TODO},
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{0xf000, 0x9000, Operation::TODO}, {0xf0c0, 0x90c0, Operation::TODO},
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{0xff00, 0x0400, Operation::TODO}, {0xf100, 0x5100, Operation::TODO},
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{0xf130, 0x9100, Operation::TODO}, {0xfff8, 0x4840, Operation::TODO},
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{0xffc0, 0x4ac0, Operation::TODO}, {0xfff0, 0x4e40, Operation::TODO},
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{0xffff, 0x4e76, Operation::TODO}, {0xff00, 0x4a00, Operation::TODO},
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{0xfff8, 0x4e58, Operation::TODO}
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};
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// Perform a linear search of the mappings above for this instruction.
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for(const auto &mapping: mappings) {
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if((instruction & mapping.mask) == mapping.value) {
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if(mapping.operation == Operation::TODO) {
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std::cout << std::hex << std::setw(4) << std::setfill('0');
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std::cout << "Yet to implement, instruction matching: x & " << mapping.mask << " == " << mapping.value << std::endl;
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}
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break;
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}
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}
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}
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