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53 lines
1.6 KiB
C++
53 lines
1.6 KiB
C++
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// SCSICard.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 22/08/2022.
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// Copyright © 2022 Thomas Harte. All rights reserved.
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//
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#include "SCSICard.hpp"
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#include "../../../Components/5380/ncr5380.hpp"
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// Per the documentation around the GGLabs Apple II SCSI card clone:
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//
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// A 5380 is mapped to the first eight bytes of slot IO:
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//
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// $c0x0 R current SCSI data register
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// $c0x0 W output data register
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// $c0x1 R/W initiator command register
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// $c0x2 R/W mode select register
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// $c0x3 R/W target command register
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// $c0x4 R SCSI bus status
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// $c0x4 W select enable register
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// $c0x5 R bus and status register
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// $c0x6 R input data register
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// $c0x7 R reset parity and interrupts
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// (i.e. the 5380's standard registers in their usual order)
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//
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// The remaining eight are used for control functions:
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//
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// $c0x8 R/W PDMA/DACK
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// $c0x9 R SCSI device ID
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// $c0xa W memory bank select register
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// $c0xb W reset 5380 SCSI chip
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// $c0xc - [unused]
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// $c0xd W PDMA mode enable
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// $c0xe R read DRQ status through bit 7
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// $c0xf - [unused]
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//
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// Further, per that card's schematic:
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//
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// BANK REGISTER: bit 0..3 ROM Addr, 4..6 RAM Addr, 7 RSVD
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//
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// Which relates to the description:
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//
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// The card is also equipped with 16K of ROM and 8K of RAM.
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// These are mapped in the $C800-$CFFF card memory using a banking
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// scheme. The $C0xA bank register selects the which bank of RAM
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// and ROM are mapped. RAM is always at $C800-$CBFF and ROM is
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// at $CC00-$CFFF. The boot code in the first 256 bytes of ROM
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// bank 0 is also mapped in the IOSEL space ($Cn00-$CnFF).
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//
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