2021-01-15 23:16:01 +00:00
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//
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// Decoder.hpp
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// Clock Signal
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//
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2021-01-17 03:09:19 +00:00
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// Created by Thomas Harte on 30/12/20.
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2021-01-15 23:16:01 +00:00
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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2024-01-17 04:34:46 +00:00
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#pragma once
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2021-01-15 23:16:01 +00:00
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#include "Instruction.hpp"
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2023-05-10 21:02:18 +00:00
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namespace InstructionSet::PowerPC {
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2021-01-15 23:16:01 +00:00
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enum class Model {
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/// i.e. 32-bit, with POWER carry-over instructions.
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MPC601,
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/// i.e. 32-bit, no POWER instructions.
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MPC603,
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/// i.e. 64-bit.
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MPC620,
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};
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2024-12-01 22:51:20 +00:00
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constexpr bool is64bit(const Model model) {
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2022-03-21 14:41:17 +00:00
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return model == Model::MPC620;
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}
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2024-12-01 22:51:20 +00:00
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constexpr bool is32bit(const Model model) {
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2022-03-21 14:41:17 +00:00
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return !is64bit(model);
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}
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2024-12-01 22:51:20 +00:00
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constexpr bool is601(const Model model) {
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2022-03-21 14:41:17 +00:00
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return model == Model::MPC601;
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}
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2021-01-15 23:16:01 +00:00
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/*!
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Implements PowerPC instruction decoding.
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2022-04-05 15:23:54 +00:00
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@c model Indicates the instruction set to decode.
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2021-01-15 23:16:01 +00:00
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2022-04-05 15:23:54 +00:00
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@c validate_reserved_bits If set to @c true, check that all
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2022-04-10 13:37:18 +00:00
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reserved bits are 0 or 1 as required and produce an invalid opcode if not.
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Otherwise does no inspection of reserved bits.
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2021-01-15 23:16:01 +00:00
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2022-04-05 15:23:54 +00:00
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TODO: determine what specific models of PowerPC do re: reserved bits.
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*/
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template <Model model, bool validate_reserved_bits = false> struct Decoder {
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Instruction decode(uint32_t);
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};
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}
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