2016-06-07 01:56:02 +00:00
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//
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// 6522.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 06/06/2016.
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// Copyright © 2016 Thomas Harte. All rights reserved.
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//
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#ifndef _522_hpp
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#define _522_hpp
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#include <cstdint>
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2016-06-08 02:01:14 +00:00
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#include <cstdio>
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2016-06-07 01:56:02 +00:00
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namespace MOS {
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2016-06-07 23:15:18 +00:00
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template <class T> class MOS6522 {
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2016-06-10 02:37:59 +00:00
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private:
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enum InterruptFlag: uint8_t {
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CA2ActiveEdge = 1 << 0,
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CA1ActiveEdge = 1 << 1,
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ShiftRegister = 1 << 2,
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CB2ActiveEdge = 1 << 3,
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CB1ActiveEdge = 1 << 4,
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Timer2 = 1 << 5,
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Timer1 = 1 << 6,
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};
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2016-06-07 01:56:02 +00:00
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public:
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2016-06-08 02:01:14 +00:00
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void set_register(int address, uint8_t value)
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{
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2016-06-09 02:15:24 +00:00
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address &= 0xf;
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2016-06-11 11:57:04 +00:00
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// printf("6522 %p: %d <- %02x\n", this, address, value);
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switch(address)
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{
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case 0x0:
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_registers.output[1] = value;
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static_cast<T *>(this)->set_port_output(1, value); // TODO: handshake
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break;
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case 0x1:
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_registers.output[0] = value;
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static_cast<T *>(this)->set_port_output(0, value); // TODO: handshake
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break;
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case 0xf:
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// No handshake, so write directly
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_registers.output[0] = value;
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static_cast<T *>(this)->set_port_output(0, value);
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break;
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2016-06-11 17:06:01 +00:00
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case 0x2:
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_registers.data_direction[1] = value;
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break;
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case 0x3:
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_registers.data_direction[0] = value;
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break;
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2016-06-09 02:15:24 +00:00
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// Timer 1
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2016-06-11 17:06:01 +00:00
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case 0x6: case 0x4: _registers.timer_latch[0] = (_registers.timer_latch[0]&0xff00) | value; break;
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case 0x5: case 0x7:
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2016-06-11 11:12:55 +00:00
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_registers.timer_latch[0] = (_registers.timer_latch[0]&0x00ff) | (uint16_t)(value << 8);
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_registers.interrupt_flags &= ~InterruptFlag::Timer1;
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if(address == 0x05)
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{
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_registers.timer[0] = _registers.timer_latch[0];
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_timer_is_running[0] = true;
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}
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2016-06-10 02:37:59 +00:00
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reevaluate_interrupts();
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2016-06-09 02:15:24 +00:00
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break;
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// Timer 2
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2016-06-11 17:06:01 +00:00
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case 0x8: _registers.timer_latch[1] = value; break;
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case 0x9:
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_registers.interrupt_flags &= ~InterruptFlag::Timer2;
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_registers.timer[1] = _registers.timer_latch[1] | (uint16_t)(value << 8);
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_timer_is_running[1] = true;
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reevaluate_interrupts();
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break;
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2016-06-11 11:12:55 +00:00
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// Shift
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case 0xa: _registers.shift = value; break;
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// Control
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case 0xb: _registers.auxiliary_control = value; break;
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case 0xc: _registers.peripheral_control = value; break;
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// Interrupt control
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case 0xd:
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2016-06-11 11:58:32 +00:00
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_registers.interrupt_flags &= ~value;
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reevaluate_interrupts();
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break;
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case 0xe:
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if(value&0x80)
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_registers.interrupt_enable |= value;
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else
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_registers.interrupt_enable &= ~value;
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reevaluate_interrupts();
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break;
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2016-06-09 02:15:24 +00:00
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}
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2016-06-08 02:01:14 +00:00
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}
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2016-06-08 02:01:14 +00:00
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uint8_t get_register(int address)
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{
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address &= 0xf;
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2016-06-11 11:57:04 +00:00
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// printf("6522 %p: %d\n", this, address);
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switch(address)
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{
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2016-06-11 17:06:01 +00:00
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// case 0x0: return (_registers.auxiliary_control & 0x40) ? _registers.input[1] : static_cast<T *>(this)->get_port_input(1);
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case 0x0: return _registers.output[1];//static_cast<T *>(this)->get_port_input(1);
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case 0xf: // TODO: handshake, latching
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case 0x1: return static_cast<T *>(this)->get_port_input(0);
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2016-06-11 15:34:39 +00:00
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2016-06-11 17:06:01 +00:00
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case 0x2: return _registers.data_direction[1];
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case 0x3: return _registers.data_direction[0];
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2016-06-09 02:15:24 +00:00
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// Timer 1
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case 0x4:
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_registers.interrupt_flags &= ~InterruptFlag::Timer1;
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reevaluate_interrupts();
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return _registers.timer[0] & 0x00ff;
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case 0x5: return _registers.timer[0] >> 8;
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case 0x6: return _registers.timer_latch[0] & 0x00ff;
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case 0x7: return _registers.timer_latch[0] >> 8;
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// Timer 2
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case 0x8:
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_registers.interrupt_flags &= ~InterruptFlag::Timer2;
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reevaluate_interrupts();
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return _registers.timer[1] & 0x00ff;
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case 0x9: return _registers.timer[1] >> 8;
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2016-06-11 17:06:01 +00:00
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case 0xa: return _registers.shift;
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2016-06-11 17:06:01 +00:00
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case 0xb: return _registers.auxiliary_control;
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case 0xc: return _registers.peripheral_control;
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2016-06-11 17:06:01 +00:00
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case 0xd: return _registers.interrupt_flags | (get_interrupt_line() ? 0x80 : 0x00);
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case 0xe: return _registers.interrupt_enable | 0x80;
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2016-06-09 02:15:24 +00:00
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}
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2016-06-08 02:01:14 +00:00
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return 0xff;
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}
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2016-06-07 23:15:18 +00:00
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2016-06-11 15:34:39 +00:00
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void set_control_line_input(int port, int line, bool value)
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{
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}
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2016-06-18 17:57:10 +00:00
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void run_for_half_cycles(unsigned int number_of_cycles)
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{
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while(number_of_cycles--)
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{
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if(_is_phase2)
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{
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2016-06-18 18:30:23 +00:00
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_registers.last_timer[0] = _registers.timer[0];
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_registers.last_timer[1] = _registers.timer[1];
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2016-06-18 18:30:23 +00:00
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if(_registers.timer_needs_reload)
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{
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_registers.timer_needs_reload = false;
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_registers.timer[0] = _registers.timer_latch[0];
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}
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else
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_registers.timer[0] --;
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_registers.timer[1] --;
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}
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else
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{
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// IRQ is raised on the half cycle after overflow
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if((_registers.timer[1] == 0xffff) && !_registers.last_timer[1] && _timer_is_running[1])
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{
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_timer_is_running[1] = false;
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_registers.interrupt_flags |= InterruptFlag::Timer2;
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reevaluate_interrupts();
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}
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2016-06-18 18:30:23 +00:00
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if((_registers.timer[0] == 0xffff) && !_registers.last_timer[0] && _timer_is_running[0])
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2016-06-18 17:57:10 +00:00
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{
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_registers.interrupt_flags |= InterruptFlag::Timer1;
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reevaluate_interrupts();
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if(_registers.auxiliary_control&0x40)
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2016-06-18 18:30:23 +00:00
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_registers.timer_needs_reload = true;
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2016-06-18 17:57:10 +00:00
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else
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_timer_is_running[0] = false;
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}
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}
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_is_phase2 ^= true;
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2016-06-10 02:37:59 +00:00
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}
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}
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bool get_interrupt_line()
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{
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2016-06-11 11:49:07 +00:00
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uint8_t interrupt_status = _registers.interrupt_flags & _registers.interrupt_enable & 0x7f;
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2016-06-10 02:37:59 +00:00
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return !!interrupt_status;
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2016-06-09 02:15:24 +00:00
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}
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2016-06-11 11:49:07 +00:00
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MOS6522() :
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_timer_is_running{false, false},
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_last_posted_interrupt_status(false),
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_is_phase2(false)
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{}
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2016-06-07 23:15:18 +00:00
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private:
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// Intended to be overridden
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uint8_t get_port_input(int port) { return 0xff; }
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void set_port_output(int port, uint8_t value) {}
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2016-06-18 17:57:10 +00:00
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// void set_interrupt_status(bool status) {}
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// Phase toggle
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bool _is_phase2;
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// Delegate and communications
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bool _last_posted_interrupt_status;
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inline void reevaluate_interrupts()
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{
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2016-06-11 11:49:07 +00:00
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bool new_interrupt_status = get_interrupt_line();
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if(new_interrupt_status != _last_posted_interrupt_status)
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{
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_last_posted_interrupt_status = new_interrupt_status;
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2016-06-18 12:51:18 +00:00
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static_cast<T *>(this)->set_interrupt_status(new_interrupt_status);
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2016-06-11 11:49:07 +00:00
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}
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2016-06-10 02:37:59 +00:00
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}
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2016-06-11 15:34:39 +00:00
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// The registers
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struct Registers {
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uint8_t output[2], input[2], data_direction[2];
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uint16_t timer[2], timer_latch[2], last_timer[2];
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uint8_t shift;
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uint8_t auxiliary_control, peripheral_control;
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uint8_t interrupt_flags, interrupt_enable;
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2016-06-18 18:30:23 +00:00
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bool timer_needs_reload;
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2016-06-09 02:15:24 +00:00
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2016-06-11 15:34:39 +00:00
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// "A low reset (RES) input clears all R6522 internal registers to logic 0"
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2016-06-11 11:57:04 +00:00
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Registers() :
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output{0, 0}, input{0, 0}, data_direction{0, 0},
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auxiliary_control(0), peripheral_control(0),
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2016-06-18 18:30:23 +00:00
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interrupt_flags(0), interrupt_enable(0),
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last_timer{0, 0}, timer_needs_reload(false) {}
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2016-06-11 11:12:55 +00:00
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} _registers;
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2016-06-11 15:34:39 +00:00
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// Internal state other than the registers
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2016-06-11 11:12:55 +00:00
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bool _timer_is_running[2];
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2016-06-07 01:56:02 +00:00
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};
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2016-06-18 12:51:18 +00:00
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class MOS6522IRQDelegate {
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public:
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class Delegate {
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public:
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virtual void mos6522_did_change_interrupt_status(void *mos6522) = 0;
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};
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void set_delegate(Delegate *delegate)
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{
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_delegate = delegate;
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}
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void set_interrupt_status(bool new_status)
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{
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if(_delegate) _delegate->mos6522_did_change_interrupt_status(this);
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}
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private:
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Delegate *_delegate;
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};
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2016-06-07 01:56:02 +00:00
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}
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#endif /* _522_hpp */
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