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CLK/InstructionSets/M50740/Parser.hpp

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//
// Parser.hpp
// Clock Signal
//
// Created by Thomas Harte on 16/01/21.
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// Copyright © 2021 Thomas Harte. All rights reserved.
//
#pragma once
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#include <cstdint>
#include "Decoder.hpp"
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#include "../AccessType.hpp"
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namespace InstructionSet::M50740 {
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template<typename Target, bool include_entries_and_accesses> struct Parser {
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void parse(Target &target, const uint8_t *storage, uint16_t start, uint16_t closing_bound) {
Decoder decoder;
while(start <= closing_bound) {
const auto next = decoder.decode(&storage[start], 1 + closing_bound - start);
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if(next.first <= 0) {
// If there weren't enough bytes left before the closing bound to complete
// an instruction, but implicitly there were some bytes left, announce overflow
// and terminate.
target.announce_overflow(start);
return;
} else {
// Pass on the instruction.
target.announce_instruction(start, next.second);
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if constexpr(!include_entries_and_accesses) {
// Do a simplified test: is this a terminating operation?
switch(next.second.operation) {
case Operation::RTS: case Operation::RTI: case Operation::BRK:
case Operation::JMP: case Operation::BRA:
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return;
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default: break;
}
} else {
// Check for end of stream and potential new entry points.
switch(next.second.operation) {
// Terminating instructions.
case Operation::RTS: case Operation::RTI: case Operation::BRK:
return;
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// Terminating operations, possibly with implied additional entry point.
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case Operation::JMP:
if(next.second.addressing_mode == AddressingMode::Absolute) {
target.add_entry(uint16_t(storage[start + 1] | (storage[start + 2] << 8)));
}
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return;
case Operation::BRA:
target.add_entry(uint16_t(start + 2 + int8_t(storage[start + 1])));
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return;
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// Instructions that suggest another entry point but don't terminate parsing.
case Operation::BCC: case Operation::BCS:
case Operation::BVC: case Operation::BVS:
case Operation::BMI: case Operation::BPL:
case Operation::BNE: case Operation::BEQ:
target.add_entry(uint16_t(start + 2 + int8_t(storage[start + 1])));
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break;
case Operation::JSR:
switch(next.second.addressing_mode) {
default: break;
case AddressingMode::Absolute:
target.add_entry(uint16_t(storage[start + 1] | (storage[start + 2] << 8)));
break;
case AddressingMode::SpecialPage:
target.add_entry(uint16_t(storage[start + 1] | 0x1f00));
break;
}
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break;
case Operation::BBS0: case Operation::BBS1: case Operation::BBS2: case Operation::BBS3:
case Operation::BBS4: case Operation::BBS5: case Operation::BBS6: case Operation::BBS7:
case Operation::BBC0: case Operation::BBC1: case Operation::BBC2: case Operation::BBC3:
case Operation::BBC4: case Operation::BBC5: case Operation::BBC6: case Operation::BBC7:
switch(next.second.addressing_mode) {
default: break;
case AddressingMode::AccumulatorRelative:
target.add_entry(uint16_t(start + 2 + int8_t(storage[start + 1])));
break;
case AddressingMode::ZeroPageRelative:
target.add_entry(uint16_t(start + 3 + int8_t(storage[start + 2])));
break;
}
break;
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default: break;
}
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// Provide any fixed address accesses.
switch(next.second.addressing_mode) {
case AddressingMode::Absolute:
target.add_access(uint16_t(storage[start + 1] | (storage[start + 2] << 8)), access_type(next.second.operation));
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break;
case AddressingMode::ZeroPage: case AddressingMode::ZeroPageRelative:
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target.add_access(storage[start + 1], access_type(next.second.operation));
break;
case AddressingMode::ImmediateZeroPage:
target.add_access(storage[start + 2], access_type(next.second.operation));
break;
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default: break;
}
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}
// Advance.
start += next.first;
}
}
}
};
}