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https://github.com/TomHarte/CLK.git
synced 2024-12-23 20:29:42 +00:00
Fix exclusive fill, sizing, eliminate ECS call-ins.
The clock test now proceeds further, but still doesn't seem to pass.
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@ -54,8 +54,12 @@ void Blitter::set_last_word_mask(uint16_t value) {
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}
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void Blitter::set_size(uint16_t value) {
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width_ = (width_ & ~0x3f) | (value & 0x3f);
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height_ = (height_ & ~0x3ff) | (value >> 6);
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// width_ = (width_ & ~0x3f) | (value & 0x3f);
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// height_ = (height_ & ~0x3ff) | (value >> 6);
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width_ = value & 0x3f;
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if(!width_) width_ = 0x40;
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height_ = value >> 6;
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if(!height_) height_ = 1024;
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LOG("Set size to " << std::dec << width_ << ", " << height_);
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// Current assumption: writing this register informs the
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@ -67,14 +71,14 @@ void Blitter::set_minterms(uint16_t value) {
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minterms_ = value & 0xff;
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}
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void Blitter::set_vertical_size([[maybe_unused]] uint16_t value) {
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LOG("Set vertical size " << PADHEX(4) << value);
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// TODO. This is ECS only, I think. Ditto set_horizontal_size.
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}
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void Blitter::set_horizontal_size([[maybe_unused]] uint16_t value) {
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LOG("Set horizontal size " << PADHEX(4) << value);
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}
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//void Blitter::set_vertical_size([[maybe_unused]] uint16_t value) {
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// LOG("Set vertical size " << PADHEX(4) << value);
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// // TODO. This is ECS only, I think. Ditto set_horizontal_size.
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//}
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//
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//void Blitter::set_horizontal_size([[maybe_unused]] uint16_t value) {
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// LOG("Set horizontal size " << PADHEX(4) << value);
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//}
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void Blitter::set_data(int channel, uint16_t value) {
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LOG("Set data " << channel << " to " << PADHEX(4) << value);
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@ -242,7 +246,7 @@ bool Blitter::advance_dma() {
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uint16_t a, b;
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// The barrel shifter shifts to the right in ascending address mode,
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// but to the left othrwise
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// but to the left otherwise
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if(!one_dot_) {
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a = uint16_t(a32_ >> shifts_[0]);
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b = uint16_t(b32_ >> shifts_[1]);
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@ -277,6 +281,8 @@ bool Blitter::advance_dma() {
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if(inclusive_fill_) {
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pre_toggle &= ~flag; // Accept bits that would transition to set immediately.
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post_toggle &= flag; // Accept bits that would transition to clear after the fact.
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} else {
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post_toggle = 0; // Just do the pre toggle.
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}
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flag ^= pre_toggle;
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@ -31,8 +31,8 @@ class Blitter: public DMADevice<4, 4> {
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void set_size(uint16_t value);
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void set_minterms(uint16_t value);
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void set_vertical_size(uint16_t value);
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void set_horizontal_size(uint16_t value);
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// void set_vertical_size(uint16_t value);
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// void set_horizontal_size(uint16_t value);
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void set_data(int channel, uint16_t value);
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uint16_t get_status();
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@ -929,8 +929,8 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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case Write(0x058): blitter_.set_size(cycle.value16()); break;
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case Write(0x05a): blitter_.set_minterms(cycle.value16()); break;
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case Write(0x05c): blitter_.set_vertical_size(cycle.value16()); break;
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case Write(0x05e): blitter_.set_horizontal_size(cycle.value16()); break;
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// case Write(0x05c): blitter_.set_vertical_size(cycle.value16()); break;
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// case Write(0x05e): blitter_.set_horizontal_size(cycle.value16()); break;
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case Write(0x060): blitter_.set_modulo<2>(cycle.value16()); break;
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case Write(0x062): blitter_.set_modulo<1>(cycle.value16()); break;
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@ -40,7 +40,7 @@ using WriteVector = std::vector<std::pair<uint32_t, uint16_t>>;
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- (BOOL)verifyWrites:(WriteVector &)writes blitter:(Amiga::Blitter &)blitter ram:(uint16_t *)ram {
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// Run for however much time the Blitter wants.
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while(blitter.get_status() & 0x4000) {
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blitter.advance();
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blitter.advance_dma();
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}
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for(const auto &write: writes) {
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