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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-24 12:30:17 +00:00

Fix exclusive fill, sizing, eliminate ECS call-ins.

The clock test now proceeds further, but still doesn't seem to pass.
This commit is contained in:
Thomas Harte 2021-11-24 17:25:32 -05:00
parent 55af6681af
commit 012084b37b
4 changed files with 22 additions and 16 deletions

View File

@ -54,8 +54,12 @@ void Blitter::set_last_word_mask(uint16_t value) {
}
void Blitter::set_size(uint16_t value) {
width_ = (width_ & ~0x3f) | (value & 0x3f);
height_ = (height_ & ~0x3ff) | (value >> 6);
// width_ = (width_ & ~0x3f) | (value & 0x3f);
// height_ = (height_ & ~0x3ff) | (value >> 6);
width_ = value & 0x3f;
if(!width_) width_ = 0x40;
height_ = value >> 6;
if(!height_) height_ = 1024;
LOG("Set size to " << std::dec << width_ << ", " << height_);
// Current assumption: writing this register informs the
@ -67,14 +71,14 @@ void Blitter::set_minterms(uint16_t value) {
minterms_ = value & 0xff;
}
void Blitter::set_vertical_size([[maybe_unused]] uint16_t value) {
LOG("Set vertical size " << PADHEX(4) << value);
// TODO. This is ECS only, I think. Ditto set_horizontal_size.
}
void Blitter::set_horizontal_size([[maybe_unused]] uint16_t value) {
LOG("Set horizontal size " << PADHEX(4) << value);
}
//void Blitter::set_vertical_size([[maybe_unused]] uint16_t value) {
// LOG("Set vertical size " << PADHEX(4) << value);
// // TODO. This is ECS only, I think. Ditto set_horizontal_size.
//}
//
//void Blitter::set_horizontal_size([[maybe_unused]] uint16_t value) {
// LOG("Set horizontal size " << PADHEX(4) << value);
//}
void Blitter::set_data(int channel, uint16_t value) {
LOG("Set data " << channel << " to " << PADHEX(4) << value);
@ -242,7 +246,7 @@ bool Blitter::advance_dma() {
uint16_t a, b;
// The barrel shifter shifts to the right in ascending address mode,
// but to the left othrwise
// but to the left otherwise
if(!one_dot_) {
a = uint16_t(a32_ >> shifts_[0]);
b = uint16_t(b32_ >> shifts_[1]);
@ -277,6 +281,8 @@ bool Blitter::advance_dma() {
if(inclusive_fill_) {
pre_toggle &= ~flag; // Accept bits that would transition to set immediately.
post_toggle &= flag; // Accept bits that would transition to clear after the fact.
} else {
post_toggle = 0; // Just do the pre toggle.
}
flag ^= pre_toggle;

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@ -31,8 +31,8 @@ class Blitter: public DMADevice<4, 4> {
void set_size(uint16_t value);
void set_minterms(uint16_t value);
void set_vertical_size(uint16_t value);
void set_horizontal_size(uint16_t value);
// void set_vertical_size(uint16_t value);
// void set_horizontal_size(uint16_t value);
void set_data(int channel, uint16_t value);
uint16_t get_status();

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@ -929,8 +929,8 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
case Write(0x058): blitter_.set_size(cycle.value16()); break;
case Write(0x05a): blitter_.set_minterms(cycle.value16()); break;
case Write(0x05c): blitter_.set_vertical_size(cycle.value16()); break;
case Write(0x05e): blitter_.set_horizontal_size(cycle.value16()); break;
// case Write(0x05c): blitter_.set_vertical_size(cycle.value16()); break;
// case Write(0x05e): blitter_.set_horizontal_size(cycle.value16()); break;
case Write(0x060): blitter_.set_modulo<2>(cycle.value16()); break;
case Write(0x062): blitter_.set_modulo<1>(cycle.value16()); break;

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@ -40,7 +40,7 @@ using WriteVector = std::vector<std::pair<uint32_t, uint16_t>>;
- (BOOL)verifyWrites:(WriteVector &)writes blitter:(Amiga::Blitter &)blitter ram:(uint16_t *)ram {
// Run for however much time the Blitter wants.
while(blitter.get_status() & 0x4000) {
blitter.advance();
blitter.advance_dma();
}
for(const auto &write: writes) {