mirror of
https://github.com/TomHarte/CLK.git
synced 2024-11-23 03:32:32 +00:00
Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
(Rather than a preserved but ignored top byte)
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@ -98,6 +98,7 @@ class ConcreteMachine:
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forceinline Cycles perform_bus_operation(const CPU::WDC65816::BusOperation operation, const uint32_t address, uint8_t *const value) {
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const auto ®ion = MemoryMapRegion(memory_, address);
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static bool log = false;
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// TODO: potentially push time to clock_.
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@ -106,7 +107,8 @@ class ConcreteMachine:
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const bool is_read = isReadOperation(operation);
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memory_.access(uint16_t(address), is_read);
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switch(address & 0xffff) {
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const auto address_suffix = address & 0xffff;
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switch(address_suffix) {
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// New video register.
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case 0xc029:
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@ -193,7 +195,7 @@ class ConcreteMachine:
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#undef LanguageRead
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#undef SwitchRead
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// Video switches.
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// Video switches (and annunciators).
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case 0xc050: case 0xc051:
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video_.set_text(address & 1);
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break;
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@ -206,6 +208,11 @@ class ConcreteMachine:
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case 0xc056: case 0xc057:
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video_.set_high_resolution(address&1);
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break;
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case 0xc058: case 0xc059:
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case 0xc05a: case 0xc05b:
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case 0xc05c: case 0xc05d:
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// Annunciators 0, 1 and 2.
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break;
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case 0xc05e: case 0xc05f:
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video_.set_annunciator_3(!(address&1));
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break;
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@ -271,20 +278,106 @@ class ConcreteMachine:
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case 0xc071: case 0xc072: case 0xc073: case 0xc074: case 0xc075: case 0xc076: case 0xc077:
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case 0xc078: case 0xc079: case 0xc07a: case 0xc07b: case 0xc07c: case 0xc07d: case 0xc07e: case 0xc07f:
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if(is_read) {
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*value = rom_[rom_.size() - 65536 + (address & 0xffff)];
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*value = rom_[rom_.size() - 65536 + address_suffix];
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}
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break;
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// Analogue inputs. All TODO.
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case 0xc060: case 0xc061: case 0xc062: case 0xc063:
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// Joystick buttons (and keyboard modifiers).
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if(is_read) {
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*value = 0x00;
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}
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break;
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case 0xc064: case 0xc065: case 0xc066: case 0xc067:
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// Analogue inputs.
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if(is_read) {
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*value = 0x00;
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}
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break;
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case 0xc070:
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// TODO: begin analogue channel charge.
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break;
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case 0xc02d:
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// TODO: slot register selection.
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// b7: 0 = internal ROM code for slot 7;
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// b6: 0 = internal ROM code for slot 6;
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// b5: 0 = internal ROM code for slot 5;
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// b4: 0 = internal ROM code for slot 4;
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// b3: reserved;
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// b2: internal ROM code for slot 2;
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// b1: internal ROM code for slot 1;
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// b0: reserved.
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if(is_read) {
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*value = card_mask_;
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} else {
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card_mask_ = *value;
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}
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break;
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// Addresses that seemingly map to nothing; provided as a separate break out for now,
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// while I have an assert on unknown reads.
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case 0xc049: case 0xc04a: case 0xc04b: case 0xc04c: case 0xc04d: case 0xc04e: case 0xc04f:
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case 0xc069: case 0xc06a: case 0xc06b: case 0xc06c:
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printf("Ignoring %04x\n", address_suffix);
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log = true;
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break;
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// 'Test Mode', whatever that is (?)
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case 0xc06e: case 0xc06f:
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test_mode_ = address & 1;
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break;
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case 0xc06d:
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if(is_read) {
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*value = test_mode_ * 0x80;
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}
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break;
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default:
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if((address & 0xffff) < 0xc100) {
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// TODO: all other IO accesses.
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printf("Unhandled IO: %04x\n", address & 0xffff);
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assert(false);
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// Check for a card access.
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if(address_suffix >= 0xc080 && address_suffix < 0xc800) {
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// This is an abridged version of the similar code in AppleII.cpp from
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// line 653; it would be good to factor that out and support cards here.
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// For now just either supply the internal ROM or nothing as per the
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// current card mask.
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size_t card_number = 0;
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if(address >= 0xc100) {
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/*
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Decode the area conventionally used by cards for ROMs:
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0xCn00 to 0xCnff: card n.
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*/
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card_number = (address - 0xc000) >> 8;
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} else {
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// Card IO. Not implemented!
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if(isReadOperation(operation)) {
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/*
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Decode the area conventionally used by cards for registers:
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C0n0 to C0nF: card n - 8.
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*/
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card_number = (address - 0xc080) >> 4;
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}
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const uint8_t permitted_card_mask_ = card_mask_ & 0xf6;
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if(permitted_card_mask_ & (1 << card_number)) {
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// TODO: Access an actual card.
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if(is_read) {
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*value = 0xff;
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}
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} else {
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// TODO: disk-port soft switches should be in COEx.
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printf("Internal card-area access: %04x\n", address_suffix);
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if(is_read) {
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*value = rom_[rom_.size() - 65536 + address_suffix];
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}
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}
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} else {
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if(address_suffix < 0xc080) {
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// TODO: all other IO accesses.
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printf("Unhandled IO: %04x\n", address_suffix);
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assert(false);
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}
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}
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}
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} else {
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@ -299,20 +392,23 @@ class ConcreteMachine:
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}
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}
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// printf("%06x %s %02x", address, isReadOperation(operation) ? "->" : "<-", *value);
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// if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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// printf(" a:%04x x:%04x y:%04x s:%04x e:%d p:%02x db:%02x pb:%02x d:%04x\n",
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// m65816_.get_value_of_register(CPU::WDC65816::Register::A),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::X),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::Y),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::StackPointer),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::EmulationFlag),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::Flags),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::DataBank),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::ProgramBank),
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// m65816_.get_value_of_register(CPU::WDC65816::Register::Direct)
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// );
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// } else printf("\n");
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// log |= (address >= 0xffa6d9) && (address < 0xffa6ec);
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if(log) {
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printf("%06x %s %02x", address, isReadOperation(operation) ? "->" : "<-", *value);
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if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
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printf(" a:%04x x:%04x y:%04x s:%04x e:%d p:%02x db:%02x pb:%02x d:%04x\n",
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m65816_.get_value_of_register(CPU::WDC65816::Register::A),
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m65816_.get_value_of_register(CPU::WDC65816::Register::X),
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m65816_.get_value_of_register(CPU::WDC65816::Register::Y),
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m65816_.get_value_of_register(CPU::WDC65816::Register::StackPointer),
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m65816_.get_value_of_register(CPU::WDC65816::Register::EmulationFlag),
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m65816_.get_value_of_register(CPU::WDC65816::Register::Flags),
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m65816_.get_value_of_register(CPU::WDC65816::Register::DataBank),
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m65816_.get_value_of_register(CPU::WDC65816::Register::ProgramBank),
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m65816_.get_value_of_register(CPU::WDC65816::Register::Direct)
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);
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} else printf("\n");
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}
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Cycles duration = Cycles(5);
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@ -333,9 +429,7 @@ class ConcreteMachine:
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CPU::WDC65816::Processor<ConcreteMachine, false> m65816_;
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MemoryMap memory_;
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Apple::Clock::ParallelClock clock_;
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Apple::IIgs::Video::Video video_;
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Apple::IIgs::ADB::GLU adb_glu_;
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// MARK: - Timing.
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int fast_access_phase_ = 0;
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int slow_access_phase_ = 0;
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@ -348,7 +442,18 @@ class ConcreteMachine:
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std::vector<uint8_t> rom_;
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// MARK: - Other components.
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Apple::Clock::ParallelClock clock_;
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Apple::IIgs::Video::Video video_;
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Apple::IIgs::ADB::GLU adb_glu_;
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Zilog::SCC::z8530 scc_;
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// MARK: - Cards.
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// TODO: most of cards.
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uint8_t card_mask_ = 0x00;
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bool test_mode_ = false;
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};
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}
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@ -185,7 +185,7 @@ class MemoryMap {
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const uint8_t diff = value ^ shadow_register_;
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shadow_register_ = value;
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if(diff & 0x40) { // IO/language-card inhibit
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if(diff & 0x40) { // IO/language-card inhibit.
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set_language_card_paging();
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set_card_paging();
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}
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@ -1097,7 +1097,6 @@ void ProcessorStorage::set_emulation_mode(bool enabled) {
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if(enabled) {
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set_m_x_flags(true, true);
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registers_.x.halves.high = registers_.y.halves.high = 0;
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registers_.e_masks[0] = 0xff00;
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registers_.e_masks[1] = 0x00ff;
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} else {
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@ -1109,17 +1108,24 @@ void ProcessorStorage::set_emulation_mode(bool enabled) {
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}
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void ProcessorStorage::set_m_x_flags(bool m, bool x) {
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// true/1 => 8bit for both flags.
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registers_.mx_flags[0] = m;
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registers_.mx_flags[1] = x;
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// Reset the top byte of x and y if _exiting_ 8-bit mode.
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// TODO: rationalise this sort of logic, both here and
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// with regards to the stack pointer.
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if(!x && registers_.mx_flags[1]) {
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registers_.x.halves.high = registers_.y.halves.high = 0;
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}
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registers_.x_masks[0] = x ? 0xff00 : 0x0000;
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registers_.x_masks[1] = x ? 0x00ff : 0xffff;
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registers_.x_shift = x ? 0 : 8;
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registers_.m_masks[0] = m ? 0xff00 : 0x0000;
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registers_.m_masks[1] = m ? 0x00ff : 0xffff;
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registers_.m_shift = m ? 0 : 8;
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registers_.x_masks[0] = x ? 0xff00 : 0x0000;
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registers_.x_masks[1] = x ? 0x00ff : 0xffff;
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registers_.x_shift = x ? 0 : 8;
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// true/1 => 8bit for both flags.
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registers_.mx_flags[0] = m;
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registers_.mx_flags[1] = x;
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}
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uint8_t ProcessorStorage::get_flags() const {
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