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Corrects memptr behaviour of OTIR/OTDR and INIR/INDR.
This seemingly perfects memptr.
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26de5be07c
commit
01faffd5bf
@ -85,15 +85,16 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler {
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runTest("z80docflags")
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}
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func testFlags() {
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runTest("z80flags")
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}
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func testFull() {
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runTest("z80full")
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// Current status: 002 of 152 tests failed.
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// Specifically: BIT N,(HL) and BIT N,[R,(HL)], i.e. MEMPTR by proxy.
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}
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func testMemptr() {
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runTest("z80memptr")
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// Current status: 2 of 152 tests failed.
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}
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func testMachine(_ testMachine: CSTestMachine, didTrapAtAddress address: UInt16) {
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@ -553,7 +553,16 @@ template < class T,
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#undef CPxR_STEP
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#undef REPEAT
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#define REPEAT(test) \
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if(test) { \
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pc_.full -= 2; \
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} else { \
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advance_operation(); \
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}
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#define INxR_STEP(dir) \
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memptr_.full = uint16_t(bc_.full + dir); \
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bc_.halves.high--; \
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hl_.full += dir; \
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\
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@ -586,12 +595,10 @@ template < class T,
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} break;
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case MicroOp::IND: {
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memptr_.full = bc_.full - 1;
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INxR_STEP(-1);
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} break;
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case MicroOp::INI: {
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memptr_.full = bc_.full + 1;
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INxR_STEP(1);
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} break;
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@ -599,6 +606,7 @@ template < class T,
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#define OUTxR_STEP(dir) \
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bc_.halves.high--; \
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memptr_.full = uint16_t(bc_.full + dir); \
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hl_.full += dir; \
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\
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sign_result_ = zero_result_ = bit53_result_ = bc_.halves.high; \
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@ -622,12 +630,10 @@ template < class T,
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case MicroOp::OUTD: {
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OUTxR_STEP(-1);
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memptr_.full = bc_.full - 1;
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} break;
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case MicroOp::OUTI: {
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OUTxR_STEP(1);
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memptr_.full = bc_.full + 1;
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} break;
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#undef OUTxR_STEP
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