1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 08:49:37 +00:00

Added the ability to set a port input, and relaxed bus state testing. I think my on-demand bus reactions here are inappropriate, so more work to do here probably.

This commit is contained in:
Thomas Harte 2017-08-01 18:04:51 -04:00
parent 2e4577f741
commit 0267bc237f
2 changed files with 12 additions and 2 deletions

View File

@ -231,6 +231,10 @@ uint8_t AY38910::get_port_output(bool port_b) {
return registers_[port_b ? 15 : 14];
}
void AY38910::set_port_input(bool port_b, uint8_t value) {
registers_[port_b ? 15 : 14] = value;
}
void AY38910::set_data_input(uint8_t r) {
data_input_ = r;
}
@ -252,7 +256,7 @@ void AY38910::set_control_lines(ControlLines control_lines) {
case (int)(BDIR | BC2): new_state = Write; break;
}
if(new_state != control_state_) {
// if(new_state != control_state_) {
control_state_ = new_state;
switch(new_state) {
default: break;
@ -260,5 +264,5 @@ void AY38910::set_control_lines(ControlLines control_lines) {
case Write: set_register_value(data_input_); break;
case Read: data_output_ = get_register_value(); break;
}
}
// }
}

View File

@ -47,6 +47,12 @@ class AY38910: public ::Outputs::Filter<AY38910> {
*/
uint8_t get_port_output(bool port_b);
/*!
Sets the value that would appear on the requested interface port if it were in output mode.
@parameter port_b @c true to get the value for Port B, @c false to get the value for Port A.
*/
void set_port_input(bool port_b, uint8_t value);
// to satisfy ::Outputs::Speaker (included via ::Outputs::Filter; not for public consumption
void get_samples(unsigned int number_of_samples, int16_t *target);