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Translate BSET.
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@ -246,13 +246,15 @@ template <uint8_t op> uint32_t Predecoder<model>::invalid_operands() {
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Quick
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>::value;
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case OpT(Operation::BCHG): case OpT(Operation::BCLR):
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case OpT(Operation::BCHG):
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case OpT(Operation::BCLR):
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case OpT(Operation::BSET):
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return ~TwoOperandMask<
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Dn,
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AlterableAddressingModesNoAn
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>::value;
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case BCHGI: case BCLRI:
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case BCHGI: case BCLRI: case BSETI:
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return ~TwoOperandMask<
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Imm,
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AlterableAddressingModesNoAn
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@ -294,6 +296,7 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
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case OpT(Operation::Bccb): case OpT(Operation::Bccw): case OpT(Operation::Bccl):
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case OpT(Operation::BCHG): case BCHGI:
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case OpT(Operation::BCLR): case BCLRI:
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case OpT(Operation::BSET): case BSETI:
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case OpT(Operation::NBCD): {
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const auto invalid = invalid_operands<op>();
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const auto observed = operand_mask(original);
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@ -477,8 +480,6 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
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return Preinstruction();
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}
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// ADDA, SUBA.
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// case OpT(Operation::ADDAw): case OpT(Operation::ADDAl):
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case OpT(Operation::SUBAw): case OpT(Operation::SUBAl):
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switch(original.mode<0>()) {
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default: break;
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@ -519,18 +520,6 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
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return Preinstruction();
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}
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case OpT(Operation::BSET): case BSETI:
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switch(original.mode<1>()) {
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default: return original;
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case AddressingMode::None:
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case AddressingMode::AddressRegisterDirect:
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case AddressingMode::ProgramCounterIndirectWithDisplacement:
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case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
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case AddressingMode::ImmediateData:
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return Preinstruction();
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}
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case BTSTI:
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switch(original.mode<1>()) {
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default: return original;
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