mirror of
https://github.com/TomHarte/CLK.git
synced 2024-11-26 08:49:37 +00:00
Fixes 8-bit read/write.
This commit is contained in:
parent
e4459b6256
commit
03d1aff6c0
@ -93,7 +93,7 @@ class ClockStorage {
|
|||||||
// Either a register access or an extended instruction.
|
// Either a register access or an extended instruction.
|
||||||
if(command & 0x08) {
|
if(command & 0x08) {
|
||||||
address_ = (command & 0x7) << 5;
|
address_ = (command & 0x7) << 5;
|
||||||
phase_ = (command & 0x80) ? Phase::SecondAddressByteWrite : Phase::SecondAddressByteRead;
|
phase_ = (command & 0x80) ? Phase::SecondAddressByteRead : Phase::SecondAddressByteWrite;
|
||||||
return NoResult;
|
return NoResult;
|
||||||
} else {
|
} else {
|
||||||
address_ = (command & 4) ? RegisterWriteProtect : RegisterTest;
|
address_ = (command & 4) ? RegisterWriteProtect : RegisterTest;
|
||||||
|
Loading…
Reference in New Issue
Block a user