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https://github.com/TomHarte/CLK.git
synced 2024-11-26 08:49:37 +00:00
It sounds like the two sync signals are exclusive ORd.
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@ -199,11 +199,6 @@ void Machine::output_pixels(unsigned int count)
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}
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}
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}
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}
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// logic: if in vsync, output that; otherwise if in vblank then output that;
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// otherwise output a pixel
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if(_vSyncEnabled) {
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state = (_horizontalTimer < start_of_sync) ? OutputState::Sync : OutputState::Blank;
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} else {
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// blank is decoded as 68 counts; sync and colour burst as 16 counts
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// blank is decoded as 68 counts; sync and colour burst as 16 counts
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@ -224,6 +219,10 @@ void Machine::output_pixels(unsigned int count)
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else if (_horizontalTimer < end_of_sync) state = OutputState::Blank;
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else if (_horizontalTimer < end_of_sync) state = OutputState::Blank;
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else if (_horizontalTimer < start_of_sync) state = OutputState::Sync;
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else if (_horizontalTimer < start_of_sync) state = OutputState::Sync;
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else state = OutputState::Blank;
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else state = OutputState::Blank;
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// logic: if vsync is enabled, output the opposite of the automatic hsync output
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if(_vSyncEnabled) {
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state = (state = OutputState::Sync) ? OutputState::Blank : OutputState::Sync;
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}
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}
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_lastOutputStateDuration++;
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_lastOutputStateDuration++;
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