mirror of
https://github.com/TomHarte/CLK.git
synced 2025-02-20 14:29:11 +00:00
Merge pull request #912 from TomHarte/128kDecoding
Corrects Spectrum 128kb partial decoding.
This commit is contained in:
commit
06cedb2e50
@ -355,6 +355,9 @@ template<Model model> class ConcreteMachine:
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
// Partial port decodings here and in ::Input are as documented
|
||||||
|
// at https://worldofspectrum.org/faq/reference/ports.htm
|
||||||
|
|
||||||
case PartialMachineCycle::Output:
|
case PartialMachineCycle::Output:
|
||||||
// Test for port FE.
|
// Test for port FE.
|
||||||
if(!(address&1)) {
|
if(!(address&1)) {
|
||||||
@ -369,8 +372,10 @@ template<Model model> class ConcreteMachine:
|
|||||||
}
|
}
|
||||||
|
|
||||||
// Test for classic 128kb paging register (i.e. port 7ffd).
|
// Test for classic 128kb paging register (i.e. port 7ffd).
|
||||||
if constexpr (model >= Model::OneTwoEightK) {
|
if (
|
||||||
if((address & 0xc002) == 0x4000) {
|
(model >= Model::OneTwoEightK && model <= Model::Plus2 && (address & 0x8002) == 0x0000) ||
|
||||||
|
(model >= Model::Plus2a && (address & 0xc002) == 0x4000)
|
||||||
|
) {
|
||||||
port7ffd_ = *cycle.value;
|
port7ffd_ = *cycle.value;
|
||||||
update_memory_map();
|
update_memory_map();
|
||||||
|
|
||||||
@ -381,7 +386,6 @@ template<Model model> class ConcreteMachine:
|
|||||||
// port values have taken effect.
|
// port values have taken effect.
|
||||||
disable_paging_ |= *cycle.value & 0x20;
|
disable_paging_ |= *cycle.value & 0x20;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
// Test for +2a/+3 paging (i.e. port 1ffd).
|
// Test for +2a/+3 paging (i.e. port 1ffd).
|
||||||
if constexpr (model >= Model::Plus2a) {
|
if constexpr (model >= Model::Plus2a) {
|
||||||
@ -398,24 +402,26 @@ template<Model model> class ConcreteMachine:
|
|||||||
|
|
||||||
// Route to the AY if one is fitted.
|
// Route to the AY if one is fitted.
|
||||||
if constexpr (model >= Model::OneTwoEightK) {
|
if constexpr (model >= Model::OneTwoEightK) {
|
||||||
if((address & 0xc002) == 0xc000) {
|
switch(address & 0xc002) {
|
||||||
|
case 0xc000:
|
||||||
// Select AY register.
|
// Select AY register.
|
||||||
update_audio();
|
update_audio();
|
||||||
GI::AY38910::Utility::select_register(ay_, *cycle.value);
|
GI::AY38910::Utility::select_register(ay_, *cycle.value);
|
||||||
}
|
break;
|
||||||
|
|
||||||
if((address & 0xc002) == 0x8000) {
|
case 0x8000:
|
||||||
// Write to AY register.
|
// Write to AY register.
|
||||||
update_audio();
|
update_audio();
|
||||||
GI::AY38910::Utility::write_data(ay_, *cycle.value);
|
GI::AY38910::Utility::write_data(ay_, *cycle.value);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Check for FDC accesses.
|
// Check for FDC accesses.
|
||||||
if constexpr (model == Model::Plus3) {
|
if constexpr (model == Model::Plus3) {
|
||||||
switch(address) {
|
switch(address & 0xf002) {
|
||||||
default: break;
|
default: break;
|
||||||
case 0x3ffd: case 0x2ffd:
|
case 0x3000: case 0x2000:
|
||||||
fdc_->write((address >> 12) & 1, *cycle.value);
|
fdc_->write((address >> 12) & 1, *cycle.value);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -476,15 +482,15 @@ template<Model model> class ConcreteMachine:
|
|||||||
}
|
}
|
||||||
|
|
||||||
if constexpr (model == Model::Plus3) {
|
if constexpr (model == Model::Plus3) {
|
||||||
switch(address) {
|
switch(address & 0xf002) {
|
||||||
default: break;
|
default: break;
|
||||||
case 0x3ffd: case 0x2ffd:
|
case 0x3000: case 0x2000:
|
||||||
*cycle.value &= fdc_->read((address >> 12) & 1);
|
*cycle.value &= fdc_->read((address >> 12) & 1);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if constexpr (model < Model::Plus2) {
|
if constexpr (model <= Model::Plus2) {
|
||||||
if(!did_match) {
|
if(!did_match) {
|
||||||
*cycle.value = video_->get_floating_value();
|
*cycle.value = video_->get_floating_value();
|
||||||
}
|
}
|
||||||
|
Loading…
x
Reference in New Issue
Block a user