From 06fb50204719c498a25c88580be97ef9c0af6a45 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Fri, 22 Apr 2022 09:47:16 -0400
Subject: [PATCH] Add MUL/DIV tests and exclusions.

---
 InstructionSets/68k/Decoder.cpp                      | 10 ++++++++++
 OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm |  8 +++++---
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/InstructionSets/68k/Decoder.cpp b/InstructionSets/68k/Decoder.cpp
index 74cc72c9a..ad48bd3cc 100644
--- a/InstructionSets/68k/Decoder.cpp
+++ b/InstructionSets/68k/Decoder.cpp
@@ -408,6 +408,16 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
 				case AddressingMode::None:
 					return Preinstruction();
 			}
+
+		case OpT(Operation::DIVU): case OpT(Operation::DIVS):
+		case OpT(Operation::MULU): case OpT(Operation::MULS):
+			switch(original.mode<0>()) {
+				default: return original;
+
+				case AddressingMode::AddressRegisterDirect:
+				case AddressingMode::None:
+					return Preinstruction();
+			}
 	}
 }
 
diff --git a/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm b/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm
index 21a52bcdd..01397129c 100644
--- a/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm	
+++ b/OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm	
@@ -241,12 +241,14 @@ template <int index> NSString *operand(Preinstruction instruction, uint16_t opco
 //			case Operation::ORw:	instruction = @"OR.w";	break;
 //			case Operation::ORl:	instruction = @"OR.l";	break;
 
+			case Operation::MULU:	instruction = @"MULU";	break;
+			case Operation::MULS:	instruction = @"MULS";	break;
+			case Operation::DIVU:	instruction = @"DIVU";	break;
+			case Operation::DIVS:	instruction = @"DIVS";	break;
+
 			/*
 				TODO:
 
-				MULU,	MULS,
-				DIVU,	DIVS,
-
 				RTE,	RTR,
 
 				TRAP,	TRAPV,